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  A printed circuit board, also known as PCB, is the electrical connection provider of electronic components. It has been developed for more than 100 years; its key point is about layout design. The main advantage of using circuit board is to greatly reduce wiring and assembly errors, improve the level of automation and productivity.   In today's blog, we are going to introduce PCB systematically to show you what is PCB, what's its features, and its manufacturing method and wiring technique and so many more.     Catalog   PCB Introduction PCB Form PCB Features PCB Advantages PCB Basic Manufacturing How to Designing Your Own PCBs PCB Function Testing PCB Design PCB Wiring How Does PCB Works PCB Recycle FAQ PCB Introduction   A printed circuit board, also known as PCB, is the electrical connection provider of electronic components. It has been developed for more than 100 years; its key point is about layout design. The main advantage of using circuit board is to greatly reduce wiring and assembly errors, improve the level of automation and productivity.   Since printed circuit boards are not general end products, there is a slight confusion in the definition of it. For example, the motherboard for personal computers is called the motherboard and cannot be called the circuit board directly, although there is a circuit board in the motherboard. They are not the same, so the relationship between the two cannot be said to be the same when evaluating the industry.   Another example: because integrated circuit parts are mounted on a circuit board, the news media call it IC board, but in essence, it is not equal to a printed circuit board. We commonly refer to PCB as a bare board which components are not on it.   The number of PCB layers can be divided into a single panel, double panel, four-layer board, six-layer board and multilayer board.   PCB Material Common materials of PCB boards are electric boards, glass fiberboards, and various types of plastic boards. PCB manufacturers generally use an insulating portion consists of glass fibre, non-fabric, and resin, then pressed with epoxy resin and copper foil to form a prepreg.   PCB Metallic Coating The metal coating is where the substrate line meets the electronic component. Furthermore, metal solderability, contact, resistance, and so on will have a direct impact on the component's effectiveness. And different metals have a direct impact on production costs.   Copper, tin (the thickness is usually 5 to 15 m), lead-tin alloy (or tin-copper alloy, that is solder, the thickness is 5 to 25 m, about 63 percent is tin), gold (usually plated on the interface), and silver are the most commonly used metallic coatings (usually plated on the interface, or as a whole is silver alloy).   PCB Line Design Software Simple layout design can be completed by hand, but complex circuit design is usually realized through computer-aided design (CAD), and well-known design software includes CAD, Pads (that is PowerPCB), Altium designer (that is Protel), FreePCB, CAM350, and others.   PCB Form   The current circuit boards are primarily made up of the following components:   The Line and Pattern: A line is a tool used to connect the original parts. The large copper surface will be designed as the grounding and power supply layer in the design. The wiring route is created concurrently with the pattern.   Dielectric is used to keep lines and layers insulated.   Through-hole / via: it can switch the lines above the two layers on and off, larger ones are used to set components, and non-through holes (nPTH) are typically used as surface mounting positioning and fixing screws for assembly.   Solder resistant / Solder Mask: not all copper surfaces needed solder parts with sin, so the non-tin soldering area will print something to separate tin (usually epoxy resin), to avoid a short circuit. According to different processes, this can be divided into green oil, red oil and blue oil to distinguish different functional areas.   Legend / Marking/ Silk screen: it is not necessary. Its main function is to mark the name and position of each part on the circuit board for easy maintenance and identification after assembly.   Surface Finish: because the copper surface is easy to oxidize in the general environment, leading to failure to solder tin ( or solder poor), therefore, it will make the copper surface protection which needing to solder sin. The methods of protection include HASL, ENIG, Immersion Silver, tin, Immersion Tin, and OSP, which are generally called surface treatment, having their own advantages and disadvantages.   PCB Features   Bare panels (no parts on them) are also known as "Printed Wiring Board (PWB)". The board itself is made of insulating, non-bending material. The thin wire material that can be seen on the surface is copper foil, which is originally covered on the whole board but is etched away in the manufacturing process, and the remaining part becomes a small net line. These lines are called conductor pattern or wiring and are used to provide electrical connections to parts on the PCB.   The colour of PCB is usually green or brown, which is the colour of the solder mask. It is an insulating protective layer that protects copper wire, prevents short circuit caused by wave welding, and saves solder consumption. Also, a silkscreen will be printed on the solder mask layer. Text and symbols (most are white) are usually printed on them to indicate the location of each part on the board. Silkscreen is also called a legend.   Integrated circuits, transistors, diodes, passive components (such as resistors, capacitors, connectors, etc.) and a variety of other electronic components are installed when the final product made. By connecting wires, electronic signals can be connected and their functions can be work.   PCB Advantages   (1) Because of the reproducibility and consistency of the graphics, the errors in wiring and assembly are reduced, and the maintenance, debugging and checking the time of the equipment are saved;   (2) The design can be standardized and interchangeable;   (3) High density of wiring, small size, lightweight, which is beneficial to the miniaturization of electronic equipment;   (4) It is beneficial to mechanization and automatic production, increasing labour productivity and reducing the cost of electronic equipment     PCB Basic Manufacturing   PCB manufacturing methods are classified into two types: subtractive and additive. At the moment, the subtractive etching copper foil method is primarily used in mass industrial production.   Basic Manufacturing Procedure: First, we’ll need a blank circuit board (a circuit board with complete metal foil), and the rest are required circuit boards.   Screen printing: a screen mask is made from a pre-designed circuit diagram. The screen's unnecessary circuit is covered with wax or waterproof material. Following that, the screen mask is placed on a blank circuit board, with a protective agent applied to the screen to prevent corrosion. Finally, immerse the circuit board in the corrosion solution; the part not covered by the protective agent will be corroded away, leaving only the rest to be cleaned away.   Photosensitive board: a pre-designed circuit diagram is printed on a transparent film mask (the simplest method is to print the film with a printer), and the required part is printed in an opaque color in the same way. Then, apply photosensitive pigment to the blank circuit board, place the prepared film mask on the board while it is blazing for a few minutes, remove the mask, and use a developer to display the pattern on the board.   Engraving: use a milling machine or laser engraving machine to remove unnecessary parts of a blank line directly.   Other Manufacture Procedure:   （1）Additive The additive, is a pre-coated copper substrate coated with a photoresistor (D/F), exposed to ultraviolet light and exposed where it is needed. Then using electroplating to thicken the copper of the formal circuit line to the required specification, and plating a layer of anti-corrosion thin tin, and finally remove the photoresist (this process is called film removal), and then etch the copper foil layer under the photoresist.   （2）Layer Method The lamination method is one of the methods of making multilayer printed circuit board. The outer layer is made after the inner layer is wrapped, and the outer layer is treated by the subtractive or additive method. The sequential layer method can be used to get the multi-layer printed circuit board with multiple layers by repeating the action of the stacking method. 1. Making inner layer 2. Laminated formation( bonding different layers) 3. Layer completion ( Outer metal-containing foil film by subtractive method, mixing with the additive method) 4. Drilling   （3）Panel Method 1. Whole PCB electroplating 2. Add a barrier layer where the surface is to be retained 3. Etching4. Removal of barrier layer   （4）Pattern Method 1. Add a barrier layer to the area where the surface is not required 2. Electroplating requires with thickness 3. Removal of barrier layer4. Etching into unnecessary foil film to disappear   （5）Complete Addition Method 1. Add a barrier layer where there is no conductor 2. Circuit consisting of no electrolytic copper   （6）Partial Addition Method 1. Covered with electrolytic copper PCB 2. Add a barrier layer where there is no conductor 3. Electrolytic copper plating 4. Removal of barrier layer 5. No electrolytic copper disappeared until etched under the original barrier layer.   （7）ALIVH ALIVH (Any Layer Interstitial Via Hole，Any Layer IVA), this is using aramid fiber fabric as the substrate. 1. Prepreg: dip the fabric in an epoxy resin to form a “Adhesive sheet”. 2. Laser drilling. 3. Filling the hole with conductive paste. 4. Attaching copper foil to the outer layer. 5. Making Circuit pattern by etching on copper foi. 6. Gluing the copper foil on the semi-finished product after the second step. 7. Laminated formation 8. Repeating steps 5 to 7 until completed.   （8）B2it (Buried Bump Interconnection Technology) 1. First make a double panel or multilayer board. 2. Printing silver paste as cone on copper foil. 3. To place the adhesive on a silver paste, making silver cone to penetrate the adhesive. 4. Attaching the previous adhesive to the board of the first step. 5. Etching the copper foil of the adhesive into a circuit pattern. 6. Repeat the second to fourth steps until it completed.   How to Designing Your Own PCBs   How do you go about designing your own PCB? The ins and outs of PCB design are way too in-depth to get into here, but if you really want to get started, here are some pointers:   1. Find a CAD package: there are a lot of low-cost or free options out there on the market for PCB design. Things to consider when choosing a package:   Community support: are there a lot of people using the package? The more people using it, the more likely you are to find ready-made libraries with the parts you need.   Ease-of-use: if it's painful to use it, you won't.   Capability: some programs place limitations on your design- number of layers, number of components, size of the board, etc. Most of them allow you to pay for a license to upgrade their capability.   Portability: some free programs do not allow you to export or convert your designs, locking you into one supplier only. Maybe that’s a fair price to pay for convenience and price, maybe not.   2. Look at other people’s layouts to see what they have done. Open Source Hardware makes this easier than ever.   3. More practice.   4. Maintain low expectations. Your first board design will have lots of problems. Your 20th board design will have fewer, but will still have some. You’ll never get rid of them all.   5. Schematics are important. Trying to design a board without a good schematic in place first is an exercise in futility.   Finally, a few words on the utility of designing your own circuit boards. If you plan on making more than one or two of a given project, the payback on designing a board is pretty good- point-to-point wiring circuits on a protoboard is a hassle, and they tend to be less robust than purpose-designed boards.   PCB Function Testing   More intensive PCB, with the higher bus speed and analog RF circuits, pose unprecedented challenges to the testing, where efficient testing requires careful design, thoughtful testing methods and appropriate tools which can provide credible test results.   In high-density UUT, if calibration or diagnosis is required, manual work is likely to be required. This is because the machine is limited and the test requires faster (the UUT can collect data quickly with a probe instead of feedback the information to the edge connector), in this case, that the operator is required to probe the test points on the UUT to make sure the test points are clearly marked.   Testing Issues include: （1） Is the probe bigger than the test point? （2）Is the probe in danger of shorting several test points and damaging UUT? （3） Is there a shock hazard to the operator? （4）Can each operator find out the test point quickly and check it out? （5）Are test points large and easy to identify? （6）How long does it take the operator to press the probe on the test point to get an accurate reading? （7）If the time is too long, there will be some trouble in the small test area, for example, the operator's hand will slide, so it is recommended to expand the test area to avoid this problem.   After considering the above problems, the test engineer should re-evaluate the type of the test probe, modify the test file to better identify the location of the test point or even change the requirements for the operator.   PCB Automatic Exploration In some cases, the use of automated probes may be required, such as when PCB is difficult to detect manually, or when the test speed is significantly reduced due to the technical limitations of the operator, under this case which an automated approach should be considered.   The automatic probe can eliminate human error, reduce the possibility of short circuit at several test points, and speed up test operation. However, it should be noted that there may be some limitations to automated probes, depending on the vendor's design, including:   （1）A size of UUT （2）Number of synchronous probes （3）How close are the two test points? （4）Positioning accuracy of the testing probe （5）Can the system detect UUT on both sides? （6）How fast does the probe move to the next test point? （7）What is the actual interval required for the probe system? (it is generally larger than an offline functional test system.)   Automatic detection usually does not touch test points with probe and is generally slower than the production line, so two steps may be required: if the detector is used only for diagnosis, the traditional function test system can be used in the production line, and the detector should be put on the side of the production line as the diagnostic system. If the purpose of the detector is using the UUT to calibrate, it is necessary to use multiple systems, which is still much faster than manual operation.   Another key issue is how to integrate the test system into the production line. Is there still room on the production line? Can the system be connected to the conveyor belt? Fortunately, many new detection systems are compatible with the SMEMA standard, so they work in an online environment.   PCB Boundary Scan Because it requires specialized components to perform the task, this technology should have been discussed prior to the product design phase. Devices with IEEE1194 (boundary-scan) support can be purchased in UUT with a digital circuit, allowing most diagnostic problems to be solved with little or no detection. However, because it expands the area of each compatible device, boundary scanning reduces the overall functionality of the UUT (4 to 5 pins per chip and some wires).   When selecting this technology, the goal is to improve diagnosis. Furthermore, it is emphasized that boundary scans can be used to program Flash memory and PLD devices on UUT, which strengthens the case for selecting the test method.     PCB Design In the design of a printed circuit board, the layout of components and wiring of circuit connection are two key aspects.   PCB Layout The layout is to put the circuit device in the printed circuit board wiring area.   The layout not only affects the wiring work behind it, but it also has a significant impact on the overall performance of the circuit board. To meet the requirements of process, detection, and maintenance, the components should be uniform, neat, and compactly placed on the PCB to minimize the lead and connection between the components, resulting in uniform assembly density.   PCB Functional Differentiation Components should be arranged in groups based on their power-supply voltage, digital and analog circuits, speed, current, and so on, to avoid interference with one another.   When installing the digital circuit and analog circuit on the circuit board, the ground wire and power supply system of the two circuits should be completely separated, and the digital circuit and analog circuit should be arranged in different layers if the conditions allow. When arranging the fast, medium, and low-speed logic circuits on the circuit board, they should be close to the connector, while the memory should be far away from the connector.   This reduces common impedance coupling, radiation, and crosstalk. The clock and high-frequency circuits, which are the primary sources of disturbance emitter, must be arranged separately and away from the sensitive circuit.   PCB Thermal Magnetic Balance The heating parts and the heat-sensitive parts are as far away as possible, the influence of electromagnetic compatibility should be considered.   Manufacturability: (1) Surface The mounting parts are installed on one side as far as possible and simplify the assembly process.   (2) Spacing The minimum distance between components is determined according to the shape of components and other related properties. At present, the distance between components is generally not less than 0.2mm~0.3mm, the distance between components and PCB edge should be more than 2mm.   (3) Direction The direction and density of the elements should be favourable to the convection of the air. Considering the assembly process, the component direction is as consistent as possible.   PCB Wiring   1. Wires (1) Width The minimum width of the printed wire is determined by the adhesive strength between the conductor and the insulating substrate and the current value flowing through them. Printed wire can be as wide as possible, especially power lines and ground wires, as wide as possible under the condition of the plate surface, even if the area is tight, generally not less than 1mm.   In particular, ground wires, even if they are not allowed to be widened locally, it is necessary to widen somewhere permitted to reduce the resistance of the whole ground wire system. For example, the conductors longer than 80mm, even if the current is small, should be widened to reduce the influence of conductor voltage drop on the circuit.   (2) Length To minimize the length of the wiring, the shorter the wiring, the less interference and crosstalk, and the lower the parasitic reactance and the less radiation. Especially the FET gate, transistor base and high-frequency circuit should pay more attention to short wiring.   (3) Gap The distance between adjacent conductors should meet electrical safety standards. The main electrical issues affecting wiring spacing are crosstalk and voltage breakdown. The spacing should be as wide as possible for ease of operation and production, and the minimum spacing should be appropriate to the applied voltage. This voltage includes the operating voltage, the additional fluctuation voltage, the overvoltage, and the peak voltage for other reasons. For safety reasons, the spacing should be wider when there is a current-voltage in the circuit.   (4) Path The signal path from driver to load should be constant in width. The path impedance (resistance, inductance, and capacitance) changes as the path width changes, resulting in reflection and line impedance imbalance. As a result, it is best to keep the path width constant.   Furthermore, it is best to avoid right and sharp angles for the wiring corner, which should generally be greater than 90 °. The inner edge of the right path can generate a concentrated electric field, which produces noise coupled to the adjacent path, and the 45 °path outperforms the right angle and acute angle paths. When two conductors come together at an acute angle, the acute angle should be turned into a circle.   2. Aperture and Pad  The aperture of components should be better matched with the diameter of the lead; in other words, the diameter of the installation hole should be slightly larger 0.150.3mm than the component's lead diameter. DIL packaging pins and most small components have an aperture of 0.8mm and a pad diameter of about 2mm.   For large pad aperture, in order to get better adhesion ability, the ratio of the aperture and the diameter of the pad is about 2 for epoxy glass plate and 2.5~3 for phenol cardboard.   Perforation, which is commonly used in multilayer PCBs, has a minimum available diameter that is related to plate thickness, and the plate thickness to aperture ratio is usually 6:1. A high-speed signal generates 14nH inductance and 0.38pF capacitance when perforated. As a result, when laying high-speed signal channels, the number of holes should be kept to a bare minimum.   If layer changes are unavoidable for high-speed parallel lines (such as address and data lines), it is necessary to ensure that the number of holes in each signal line is the same, and that the number of holes is minimized. When necessary, a printed conductor protection ring or protective line should be installed to prevent oscillations and improve circuit performance.   3. Grounding Design Unreasonable grounding design will affect the printed circuit board, fail to reach the design target, and even can not work. The ground wire is the reference of the potential in the circuit and the common current channel. The ground potential value is zero theoretically, but in fact, because of the existence of conductor impedance, the potential everywhere of the ground wire is not all zero. As long as the ground wire has a certain length, it's potential may not in zero everywhere. The ground wire is not only a necessary common circuit channel, it also a channel for interference.   One point grounding is the basic principle of eliminating grounding interference. The ground wire of all circuits and devices must be connected to a unified grounding point, which is used as the circuit and the zero potential reference point of the equipment. One point grounding is divided into common ground wire series grounding and independent wires parallel grounding.   The common ground-wire series grounding is simple. The grounding lead of each circuit is relatively short, and its resistance is relatively small. This kind of grounding method is often used in the earthing of the equipment cabinet. The independent wires parallel grounding has one ground point which is defined as the ground reference point. The other points that need to be grounded are directly connected to this point, and the earth potential of each circuit is related only to the ground current base impedance of the circuit, which will not be affected by other circuits.   The Following Points Should Be Noted in Specific Wiring: （1）The line length is as short as possible in order to minimize the lead inductance. In low-frequency circuits, multipoint grounding is avoided because the ground current of all circuits flows through a common grounding impedance or grounding plane.   （2）Common ground wires should be arranged as far as possible on the edge of the printed circuit board. As much copper foil as possible should be retained on the circuit board as the ground wire, which can enhance shielding ability.   （3）The double-layer plate can use the ground surface, the purpose of which is to provide a low-impedance ground wire.   （4）In a multi-layer printed circuit board, a grounding layer can be set, and it is designed as a mesh. The spacing of the earth grid can not be too large because one of the main functions of the earth wire is to provide the signal return path. If the spacing of the grid is large signal-loop area will be formed, which will cause radiation and sensitivity problems. In addition, if the signal reflux path is a small loop area, other ground lines will not take into effect.   （5）The earth surface can minimize the radiation loop.   How Does PCB Works PCB Recycle   PCB manufacturing technology is a very complex, comprehensive processing technology. Especially in the process of wet processing, a large amount of water is needed, so there are many kinds of heavy metal wastewater and organic wastewater discharged.    The composition is complex, and the treatment is difficult. If the copper foil utilization ratio of the printed circuit board is 30% and 40%, most of the copper content is in wastewater. If the thickness of each copper foil is 35 microns based on 10, 000 square meters of double panels, the wastewater contains about 4500 kilograms of copper, and there are many other heavy metals and precious metals. These are found in waste liquid and wastewater, if the metal is discharged without treatment, it is not only a big waste but also pollutes the environment.    Therefore, the treatment of wastewater and the recycling of copper and other metals in the process of PCB production are of great significance and are indispensable parts in PCB production.   It is well known that the wastewater in the production of the printed circuit board is a large amount of copper, and a very small amount of lead, tin, gold, silver, fluorine, ammonia, organic compounds and organic complexes, etc.   As for the production of copper wastewater, the main processes are: copper sink, copper plating, copper electroplating, etching and various PCB pretreatment processes (chemical pretreatment, brush plate pretreatment, pozzolanic ash grinding plate pretreatment, etc.).   The copper-containing wastewater produced by the above processes can be divided into complex wastewater and non-complex wastewater according to its composition. In order to make the wastewater treatment meet the environment-protection standard, and the maximum allowable compound concentration of copper is 1mg/l (according to copper), but different wastewater treatment methods must be adopted for different copper-containing wastewater. FAQ   1. What is PCB? A printed circuit board, or PCB, is used to mechanically support and electrically connect electronic components using conductive pathways, tracks or signal traces etched from copper sheets laminated onto a non-conductive substrate.   2. What is PCB and types of PCB? A printed circuit board (PCB) is a thin board made from fiberglass, composite epoxy, or other laminate materials. PCBs are found in various electrical and electronic components such as beepers, radios, radars, computer systems, etc. Different types of PCBs are used based on the applications.   3. What can a PCB be used for? Printed circuit boards (PCBs) are used to mechanically support and electrically connect electronic components using conductive pathways, tracks or signal traces etched from copper sheets laminated onto a non-conductive substrate, employed in the manufacturing of business machines and computers, as well as communication ...   4. Why are PCB green? It is due to the solder mask, which protects the copper circuits printed on the fibre glass core to prevent short circuits, soldering errors, etc. ... The colour of the solder mask gives the board its appearance.   5. What is PCB and its advantages? Compact Size and Saving of Wire. A characteristic PCB includes a large number of electronic components. On a Printed circuit board, the interconnection between the components is made through copper tracks instead of using a number of current carrying wires. It makes the interconnections less bulky.   6. How long does it take for PCBs to break down? 3.5 to 83 days. The time it takes for half of the amount of PCBs (initially) present to be broken down ranges from 3.5 to 83 days for molecules with 1 to 5 chlorine atoms. In water, PCBs are essentially broken down by the effect of sunlight (photolysis).   7. What is the disadvantage of PCB? Disadvantages: Easy to Cause Handling Damage. Process Uses a Carcinogen (Thiourea) Exposed Tin on Final Assembly can Corrode.   8. Which PCB design software is the best for beginners? Top Best PCB Design Software of 2021 a. PROTEL (Altium Designer)  b.PADS (PowerPCB)  c. ORCAD.  d. Allegro.  e. Eagle（Easily Applicable Graphical Layout Editor） f. Kicad. g. EasyEda. h. Fritzing.   9. What are the advantage of flexible PCB? The flexible circuit board are designed for saving room and improving the flexibility to meet a smaller and higher density mounting design, it also helps to reduce the assembly process and enhance reliability.   10. Why do we use PCB instead of breadboard circuit? The advantages of a printed circuit board: the board is permanent to have an electronic device worked. PCB has a better current carrying capacity comparing to a breadboard, you can make your traces wider to take more current so that work well. ... You can mount heat-sinks to the board so that have them rigid.

 The heat sink has a thermal conductor that carries heat away from the device into fins that provide a large surface area for the heat to dissipate throughout the rest of the components, thus cooling both the heat sink and processor. Both a heat sink and a radiator require airflow and, therefore, both have fans built-in. At present, the main failure form of electronic equipment is thermal failure. According to statistics, 55% of failure of electronic equipment is caused by temperature exceeding the rated value. With the increase of temperature, the failure rate of electronic equipment increases exponentially. Therefore, the thermal design of power devices is most important in the structural design of electronic equipment, which directly determines the success of the products. Good thermal design is the basis for the stable and reliable operation of the equipment. Electronics Thermal Heatsink Design Tutorial CatalogI. Main Parameters of Thermal PropertiesII. Thermal Design of Power DeviceIII. Heat Dissipation CalculationIV. Calculation ExampleV. Selection of RadiatorVI. ConclusionFAQ I. Main Parameters of Thermal Properties The thermal stress of the power device can come from the inside of the device or from the outside of the device. If the heat dissipation capacity of the device is limited, the consumption of power will lead to the rise of temperature and junction temperature in the active region of the chip inside the device, reducing the reliability of the device lower and making the device unable to work safely. The main parameters to characterize the thermal capacity of power devices are junction temperature and thermal resistance. The active region of the device can be the PN junction region of the junction device (such as a transistor), the channel region of the field-effect device, the diffused resistor, or the thin film resistance of the integrated circuit, and so on.  When the junction temperature Tj is higher than the ambient temperature Ta, the heat through the temperature difference to form a diffusive heat flow, which is emitted from the chip through the tube shell, and the heat emitted increases with the increase of the temperature difference (Tj-Ta).  In order to ensure that the device can work properly for a long time, an allowable maximum junction temperature Tj max has been made. Tj max is determined by chip materials, packaging materials, and reliability of devices. The heat dissipation ability of power devices is usually characterized by thermal resistance, called Rt. The larger the thermal resistance is, the worse the heat dissipation ability is. Thermal resistance is also divided into internal thermal resistance and external thermal resistance.  Internal thermal resistance is the inherent thermal resistance of the device itself, which is related to the thermal conductivity, thickness, and cross-sectional area of the tube core, shell material, and processing technology, while external thermal resistance is related to the form of tube package. Generally speaking, the larger the shell area, the smaller the external thermal resistance. The external thermal resistance of the metal shell is obviously lower than that of the plastic. When the power consumption reaches a certain level, the junction temperature of the device goes up and the reliability of the system decreases. In order to improve the reliability, the thermal design of the power device should be carried out.  II. Thermal Design of Power Device The thermal design of the power device is mainly to prevent thermal failure caused by overheating or alternating temperature. It can be divided into the thermal design of the internal chip, thermal design of the package, thermal design of the tube, and thermal design in practical use. For general power devices, only the thermal design of the device's interior, package, and the tube should be considered. But when the power consumption is high, the appropriate radiator should be installed, through which the heat can be effectively dissipated to ensure the device works normally and reliably within the safe junction temperature.   III. Heat Dissipation CalculationThe most commonly used heat dissipation method is to install the power device on the radiator, using the radiator to disperse the heat into the surrounding, if necessary, to add the fan to strengthen the heat dissipation with a certain wind speed.  Flow cold water cooling plate is also used in some large power devices, which has a better heat dissipation effect. Heat dissipation calculation is to determine the appropriate heat dissipation measures and radiators through calculation under certain working conditions. There is a certain thermal resistance in the heat transfer process. The thermal resistance from the core of the device to the bottom is Rjc, between the bottom and the radiator is Rcs, a radiator that spreads heat into the surrounding is Rsa, the total resistance is Rja=Rjc+Rcs+Rsa.  If the maximum power loss of the device is Pd, and the permitted junction temperature of the device is Tj, ambient temperature is Ta, the reasonable total thermal resistance Rja can be obtained by the following formula.Rja ≤(Tj-Ta)/Pd The thermal resistance of the maximum allowable Rsa is: Rsa ≤(Tj-Ta)/Pd-(Rjc+Rcs) For design consideration, Tj is generally set to 125℃, Ta=40℃ ~ 60℃ generally used in the case of bad ambient temperature. The size of Rjc depends on the size of the core and the package structure, which can be found from the parameter list. Rcs size depends on the installation technology and device packaging. If the device adopts heat conducting grease or heat transfer pad, installing with the radiator, the typical value of Rcs is 0. 1 ℃/W / ~ 0. 2 ℃/W; If the bottom surface of the device is not insulated and additional mica insulation is required, the Rcs can reach 1 ℃/W. Pd is the maximum power loss calculated according to the working conditions of different devices. In this way, Rsa can be calculated to select an appropriate radiator. IV. Calculation ExampleA power operational amplifier PA02 as low-frequency power amplifier, the device is 8-pin and TO-3 metal shell package. The operating conditions are as follows: the operating voltage Vs is 18 V, the load impedance RL is 4Ω, the ambient temperature is 40 ℃, and the natural cooling is adopted. According to the data of PA02: the typical value of static current Iq is 27mA, the maximum value is 40mA, and the typical value of Rjc (from tube core to shell) is 2.4 ℃/W, and the maximum value is 2.6 ℃/W. The power consumption of the device is Pd=Pdq+ Pdout(Pdq is the internal power consumption and Pdout is the output power consumption). The calculation is as follows: Pdq=Iq(Vs+|-Vs|)  Pdout=Vs2/(4RL)  Iq=37mA                                                                                 Pd=Iq(Vs+|-Vs|)＋Vs2/(4 RL)                                                                                     =0.037×(18+18)＋182/(4×4)                                                                                     =21.6 W Radiator thermal resistance: Rsa ≤(Tj-Ta)/Pd-(Rjc+Rcs) Tj=125℃, Ta=40℃, Rjc=2.6℃/W, Rcs=0.2℃/W(PA02 installed directly on radiator with heat conductive grease in the middle) Substitute the above data into the formula to get Rsa≤ (125-40)/21.6-(2.6+0.2)≤ 1.135℃/W The thermal resistance HSO4 in natural convection is 0. 95 ℃/W, which can meet the requirement of heat dissipation. V. Selection of RadiatorRadiators are generally standard parts, but also provide customization. The surface of the radiator is treated by electrophoretic coating or black oxygen polarization, which aims to improve heat dissipation and insulation performance.  In natural cooling can be increased by 10%~15%, in ventilation cooling can be increased by 3%, and electrophoretic coating can withstand pressure 500V~800V. The heat resistance of different types of radiators in different heat dissipation conditions is given by the radiator manufacturers. The radiator is used to control the temperature of the power device, especially the junction temperature (Tj), making is lower than the safe junction temperature of the power device, so as to improve the reliability of the power device.  Conventional radiators tend to be standardized, serialized, universal, and new products develop towards low thermal resistance, multifunction, small volume, lightweight, and suitable for automatic production and installation.  The internal thermal resistance of various power devices is different and the difference of contact surface and installation torque will lead to the thermal-resistance difference between the contracts.  The main factor of selecting a radiator is the heat resistance Rtf. Under different environmental conditions, the heat dissipation of power devices is also different. Therefore, environmental factors, the matching between radiator and power device, and the volume and quality of the whole electronic equipment should be taken into account in selecting the appropriate radiator. First of all, according to the performance parameters and environmental parameters of the power device in normal operation, calculate whether the junction temperature of the power device is within the safe condition, determine whether it is necessary to install the radiator, and calculate the corresponding thermal resistance of the radiator if it needs to be installed.  The junction temperature of the power device is recalculated to determine whether the junction temperature of the power device is within the range of safe junction temperature, so as to judge whether the selected radiator meets the requirements. For the radiator that meets the requirements, the optimum design should be carried out according to the actual engineering requirements.   VI. ConclusionThrough the analysis and calculation of the heating principle of the power device, it can guide the design of the heat dissipation mode and the selection of the radiator, ensure the power device work in the safe temperature range, reduce the quality problem, and improve the reliability of the electronic products.  The reliability of electronic equipment is also related to the components, structure, assembly, process, processing quality, and so on. In practical engineering applications, feedback data should be obtained through various tests to perfect the design and further improve the reliability of electronic equipment. FAQ 1. What is a heat sink and how does it work?A heat sink (also commonly spelled heatsink) is a passive heat exchanger that transfers the heat generated by an electronic or a mechanical device to a fluid medium, often air or a liquid coolant, where it is dissipated away from the device, thereby allowing regulation of the device's temperature. 2. What is a heat sink used for?A heat sink is a component that increases the heat flow away from a hot device. It accomplishes this task by increasing the device's working surface area and the amount of low-temperature fluid that moves across its enlarged surface area. 3. Does a heat sink need a fan?Most heatsinks have denser fins, which requires a fan to be mounted directly on the cooler. If your heatsink has heat pipes (copper tubes running through the fins), then it's most likely designed to be used with a fan. It's simple to test whether or not a heatsink can safely be run without a fan on it. 4. What material dissipates heat the best?Thermal conductivity is the measure of a metal's ability to conduct heat. What this means is that that the metal acts to cool temperatures, through a process of dissipation. The metals with the highest thermal conductivity are copper and aluminium. The lowest are steel and bronze. 5. How many types of heat sinks are there?The Two Major Heat Sink Categories. All heat sinks can be broken down into two major categories… active and passive. 6. What is the difference between active and passive heat sinks?An active heat sink has a fan attached to it, to actively pull heat away from the heat sink and chip that lies underneath it. A passive heat sink is just a heat sink, a piece of flat metal with fins on top that directs heat away from the chip set it is installed on. 7. Which is better heat sink or fan?Generally though, with good airflow provided by the fan heatsinks can often be a lot smaller. The only benefit to a heatsink-only arrangement is less noise. ... Out of preference you want the heatsink fins to be standing upwards so that hot air can immediately rise off of it and cool air be pulled in. 8. What is the difference between a heatsink and a CPU fan?The heatsink draws the heat away from the CPU, and the fan ensures a steady stream of air for the heatsink to pass the heat to. However, there is more to selecting a heatsink and fan than just looking for a good price or one that looks cool. 9. What is the difference between a heat sink and a heat pipe?Vapor chambers are most often used to spread heat to a local heat sink, whereas heat pipes are generally better for moving heat to a remote sink. ... If you need a heat sink that's minimally 10 times, but usually closer to 20 times, the area of the heat source, consider vapor chambers. 10. How is a heat sink attached to an electrical component?A heat sink is a mechanical component that is attached to an electrical component for the sake of transferring heat from the electrical component into the surrounding environment. This environment is most commonly air, but it can also be other fluids, such as water or coolant. 

Many engineers who have not used the switching power supply may have some worry about it, such as the PCB layout, the parameter and type selection of components, and so on. In fact, as long as you understand the basic principle, the use of switching power supply design is very convenient. In today's article, we will introduce you to some basic knowledge of switch-mode power supply, along with some experience sharing when using the switch-mode power supply. SMPS Tutorial: Switch Mode Power Supplies and Power Conversion  Catalog I. What is the Switch Mode Power SupplyII. How to Debug the Switching Power Supply Circuit?III. What Needs to Be Grounded?3.1 Definition of Grounding3.2 Grounding Mode3.3 How is the Signal of the Single Board Grounded?3.4 How Do the Single Board Interface Devices   Grounding?3.5 How to Grounding the Shield Layer?IV. Introduction of Signal Backflow and TranspartitionV. Should Analog Separate from the Digital , and How?FAQ I. What is the Switch Mode Power Supply  A switch-mode power supply usually consists of a controller and an output part. Some controllers integrate MOSFET into the chip, which makes it easier to use and simplify the PCB design, but the flexibility of components is weakened. The switching controller is actually a closed-loop feedback control system, so there is a sampling circuit of output-voltage feedback and a feedback-loop control circuit. Therefore, this part of the design is to ensure an accurate sampling circuit and to control the feedback depth, because if the feedback loop response is too slow, it will have a great impact on the transient response-ability. The output parts include output capacitance, output inductor, MOSFET, and so on. The selection of these devices is basically to balance the performance need and cost. For example, the high switching frequency can use small inductance (which means small package and low cost), but a high switching frequency will increase interference and the switching loss of MOSFET, result in reducing efficiency and increasing cost. Lower switching frequency has the opposite effect. The selection of Rds_on parameters of MOSFET and the ESR for output capacitance is also very important. ESR is small can reduce output ripple, but the cost of the capacitor will increase. And It is important to note that switching power controllers can not be well driven with too much MOSFET. In general, suppliers of switching power supply controllers will provide specific formulas and usage options for engineers. Figure. 1 Switch Mode Power Supply Circuit   II. How to Debug the Switching Power Supply Circuit? （1）The output of the power supply circuit is installed to the board through the low resistance and high power resistor, so that the power circuit can be debugged first before welding resistance, avoiding the influence of the latter circuit.  （2）The switching controller is a closed-loop system. If the output deterioration beyond the range that the closed-loop can control, the switching power supply will work improperly. This situation requires careful examination of feedback and sampling circuits. Especially, if the output capacitance with a large ESR, lots of ripple of power supply will be produced, which will also affect the operation of switching power supply.  III. What Needs to Be Grounded? At the very start, the introduction of grounding technology is a protective measure to prevent lightning strikes on electric power or electronic equipment. The purpose is to introduce lightning current through the lightning rod to the earth to protect buildings. And meanwhile, grounding is also an effective way to protect personal safety.  When the phase line touches the shell of the equipment causing by some reason (such as poor insulation of the wire, line aging, etc.), there will be a dangerous voltage in the shell of the equipment. Having grounding, the resulting fault current will flow to the earth, thus it plays a protective role.  For example, in communication systems, the interconnection of signals between a large number of devices requires each device to have a point as a reference, and with the complication of electronic equipment, the signal frequency is becoming higher and higher, therefore, grounding design as special attention paid to the electromagnetic compatibility problems such as mutual interference between signals.  In addition, improper grounding will seriously affect the reliability and stability of system operation. Recently, the concept of "grounding" has also been introduced into high-speed signal backflow technology.  3.1  Definition of GroundingIn the modern concept of grounding, for line engineers, the term usually means "reference point for line voltage"; for system designers, it is often a cabinet or frame; for electrical engineers, it is a green and safe ground line or a wire connected to the earth. A more general definition is that "grounding is the low impedance channel which the current returns its source." Noting that the points are "low impedance" and "channel".  3.2  Grounding ModeThere are many ways of grounding: single-point grounding, multi-point grounding, and mixed type of grounding. Single-point grounding is divided into a series of single-point grounding and parallel single-point grounding. In general, single-point grounding is used in simple circuits, and low frequency (f10MHz) circuits use multipoint grounding or multilayer (complete a ground plane layer).  3.3   How is the Signal of the Single Board Grounded?For the general device, the near ground is the best. After adopting the multilayer design with a complete ground plane, the grounding of the general signal is very easy. The basic principle is to ensure the continuity of the line, reduce the number of holes, approach the ground plane or the power plane, etc. 3.4  How Do the Single Board Interface Devices  Grounding?Some veneers will have external input-output interfaces, such as serial port connectors, RJ45 connectors, etc. If their grounding is not well designed, it will also affect normal operation, such as error codes, packet loss, etc. And it will become an external source of electromagnetic interference sending the noise out. In general, a single interface grounding will be made, and the signal is connected by a thin wire connection, string 0 ohms, or small resistance. Thin lines can be used to block signal ground noise. At the same time, the interface and the interface power filter should also be considered seriously.  3.5  How to Grounding the Shield Layer? The shielding layer of cables is connected to the interface grounding instead of the signal grounding, because there are various noises on the signal grounding. If the shield layer is connected to the signal ground, the noise voltage will drive the common-mode current to interfere outward along the shield layer. Therefore, the poorly designed cable is generally the maximum noise output source of electromagnetic interference. Of course, the interface ground should keep clean. IV. Introduction of Signal Backflow and TranspartitionFor an electronic signal, it needs to find a way with the lowest impedance to return current to the ground, so how to deal with the signal backflow becomes very important. First, according to the formula, we can know that the radiation intensity is proportional to the area of the loop. Specifically, the longer the path the return is, the bigger the ring is formed, and the greater the external radiation interference is, thus the power-circuit flow back and signal loop area should as small as possible when design PCB. Second, for a high-speed signal, providing a good signal backflow can guarantee its signal quality. Because the characteristic impedance of the transmission line on the PCB is generally calculated by reference to the ground (or power layer), if there is a continuous ground plane near the high-speed line, the impedance of this line can be kept continuous, and if there is no ground reference near the section line, the impedance will change and the signal will be affected as well. Therefore, the high-speed lines should be distributed to the layer near the ground plane, or they should be walked in parallel next to each other, to shield interference and provide backflow nearly.  Third, do not divide wires when having power supply in wiring way, this is because the signal backflow path across different power layers will be longer, and be vulnerable to interference. For low-speed signals, it is not strictly required that, because the resulting interference signal can not be concerned about. But for high-speed signals should be checked carefully, do not cross as far as possible, you can adjust the power part of the wire. (this is for multiple power supplies on multilayer boards).  V. Should Analog Separate from the Digital , and How? Whether analog signal or digital signal should return to the ground. Because the digital signal changes quickly and the noise caused by the digital signal will be very large, if analog and digital mixing, the noise will affect the analog signal.  In general, the grounding of analog and digital processing must be separated, then connected by a thin line, or a single point. The general idea is to try to block the noise from the digital ground to the analog ground. But it is not a very strict requirement that analog and digital ground must be separated, if the analog section near the digital ground is still very clean, they can be combined. FAQ 1. What are the 3 types of power supply?There are three subsets of regulated power supplies: linear, switched, and battery-based. Of the three basic regulated power supply designs, linear is the least complicated system, but switched and battery power have their advantages. 2. What is meant by switch mode power supply?A switch mode power supply is a power converter that utilises switching devices such as MOSFETs that continuously turn on and off at high frequency; and energy storage devices such as the capacitors and inductors to supply power during the non-conduction state of the switching device. 3.What are the advantages and disadvantages of switch mode power supply?Advantages & disadvantages of switch mode power supply (SMPS)a. The switch mode power supply has a smaller in size.b. The SMPS has light weight.c. It has a better power efficiency typically 60 to 70 percent.d. It has a strong anti interference.e. SMPS has wide output range.f. Low heat generation in SMPS. 4. What is a DC switching power supply?A Switching DC power supply (also known as switch mode power supply) regulates the output voltage through a process called pulse width modulation (PWM). The PWM process generates some high frequency noise, but enables the switching power supplies to be built with very high power efficiency and small form factor. 5. What is the difference between a switching power supply and a linear power supply?Linear power supplies deliver DC by passing the primary AC voltage through a transformer and then filtering it to remove the AC component. Switching power supplies feature higher efficiencies, lighter weight, longer hold up times, and the ability to handle wider input voltage ranges. 6. Do I need a switching power supply?The switching power supply implies higher efficiency due to the high switching frequency, enabling it to use a smaller, less-costly high-frequency transformer as well as lighter, less-costly filter components. Switching power supplies contain more overall components, therefore are usually more expensive. 7. Is a switching power supply regulated?A switch mode power supply regulates an output voltage with pulse width modulation (PWM). This process creates high-frequency noise but it provides a high-efficiency rating in a small form factor. ... The low DC voltage is finally converted into a steady DC output with another set of diodes, capacitors, and inductors. 8. How do I know if my power supply is regulated?You can generally stick one probe into the middle of the connector, and hold the other against the outside. With a few exceptions, the middle is positive, so use the red lead there, and use the black lead on the outside shell. Regulated supplies, without any load, should measure very close to the target voltage of 12v. 9. Can I use a switching power supply to drive a DC motor?A simple unregulated analog power supply may be easier and be able to supply the large starting under load current more that the switching one. DC motors are not too fussy about the supply, and will usually run quite well on unfiltered DC. 10. Are switch mode power supplies any good?Switch mode power supplies, SMPS provide improved efficiency & space saving over traditional linear supplies, but care has to be taken to ensure noise on the output is low. Switch mode power supplies are widely used because of the advantages they offer in terms of size, weight, cost, efficiency and overall performance. You May Also LikeSwitching Power Supply Guide: Protection CircuitSwitching Power Supply Tutorial: 4V～16VSwitched Mode Power Supply Tutorial: Principles & Functions of SMPS Circuits

In the design of circuit systems, we often encounter things like this: when a circuit program is copied from the book completely, the result of the experiment is not correct. Why is it that? The reason is interference. We must do a good job of anti-interference in the process of the electronic circuit and program design.     Catalog I. Three Basic Element of Interference II. Suppressing Interference Sources     2.1 Common Measures to Suppress Interference Sources     2.2 Common Measures to Cut off the Path of Interference Propagation     2.3 Improve the Anti-interference Performance of Sensitive Devices III. Experience and Advice FAQ   I. Three Basic Element of Interference   a. Interference Source: Refers to the components, devices, or signals that cause interference, as described in mathematical terms as follows: some places where the figure of du/dt(voltage regulator factor) or di/dt(current rate of charge) is large may be the interference source. Also the lightning, relays, SCR, motor, high-frequency clock and so on may become interference sources.   b. Propagation Path: Refers to A path or medium in which interference travels from an interference source to a sensitive device. The typical path of interference propagation is the conduction of wires and the radiation of space.    c. Sensitive Device: Refers to an object that is susceptible to interference. Such as A/D or D/A converter, single-chip microcomputer, digital IC, weak signal, and so on. The basic principle of anti-jamming design is to suppress the interference source, cut off the path of interference propagation, and improve the anti-jamming performance of sensitive devices.   II. Suppressing Interference Sources   Suppressing interference sources is to minimize the du/dt and di/dt of interference sources as much as possible. Reduce the du/dt of the interference source by paralleling capacitors at both ends of the interference source; reduce the di/dt of the interference source by using the series inductance or resistance in the interference source loop and adding the freewheel diode. This is the highest priority and the most important principle in anti-interference design.   2.1 Common Measures to Suppress Interference Sources are as follows: (1) Add freewheel diode to the relay coil to eliminate the interference when disconnecting the coil. Only having a freewheel diode will delay the break time of the relay, therefore adding an extra more Zener diode will increase the number of operating times of the relay in unit time.   (2) Connect spark suppression circuit at both ends of relay contact(is usually RC; resistor is selected from several kΩ to dozens of kΩ; capacitance selects 0.01uF), so as to reduce the interference.   (3) Add filter circuit to the motor, pay attention to the capacitance, and inductance lead should be as short as possible.   (4) each IC on the circuit board should be connected with a high-frequency capacitor of 0.01 μ F to 0.1 μ F to reduce the influence of IC to the power supply. Pay attention to the wiring of high-frequency capacitance. The connection should be close to the power supply and should be as short as possible. Otherwise, it will increase the equivalent series resistance of the capacitance, which will affect the filtering effect.   (5) Avoid 90 degree fold line and reduce high-frequency noise when wiring.   (6) Connect the RC suppression circuit to both ends of the thyristor to reduce the noise caused by the thyristor (ps: if the noise is serious may break down the thyristor).   According to the path of interference, it can be divided into two types: conduction interference and radiation interference. Conduction interference is the interference that propagates through the wire to the sensitive device. The high-frequency interference noise is different from the useful signal in the frequency band, which can be cut off by adding a filter to the conductor, and sometimes it can be solved by isolating the optical coupling. Power noise is the most harmful, we should pay special attention to handling. Radiation interference refers to the interference which propagates through the space radiation to the sensitive device. The general solution is to increase the distance between the interference sources and the sensitive devices, to isolate them with grounding wires, and mask the sensitive devices.     2.2 Common Measures to Cut off the Path of Interference Propagation (1) Consider the influence of power supply on single-chip computers. A good power supply helps solve the majority of the jamming problems in circuit design. Many single-chip computers are sensitive to the noise of the power supply, so it is necessary to add a filter circuit or voltage stabilizer to the power supply of a single-chip microcomputer to reduce the interference. For example, a π-shaped filter circuit composed of magnetic beads and capacitors, in addition, a 100Ω resistor can be used to replace magnetic beads when the conditions are not high.   (2) If the I/O port of the single-chip microcomputer is used to control the noise devices such as motors, the I/O port, and the noise source should be isolated.（ adding a π-shaped filter circuit）   (3) Pay attention to the crystal wiring. The crystal oscillator and single-chip microcomputer pin should as close as possible; the clock area should be isolated by grounding wire, crystal oscillator shell should be grounded and fixed. This measure can solve many difficult problems.   (4) Make reasonable partitions of the circuit board. Such as strong signal and weak signal, digital signal, and analog signal. Interference sources (such as motors and relays) and sensitive elements (such as microcontroller) should be isolated as far as possible.   (5) Separate the digital area from the analog area by landlines, and finally, connect to the power at one point. This principle is taken into account when the manufacturer makes the A/D and D/A chip pins arrangement.   (6) Single-chip microcomputer and large ground wire should be grounded separately to reduce mutual interference. High-power devices should be placed on the edge of the circuit board as far as possible.   (7) Use the anti-interference components such as magnetic beads, magnetic rings, power filters, and shielding covers in key places such as I / O portion, power lines, and circuit board connectors, which can significantly improve the anti-interference performance of the circuit.   2.3 Improve the Anti-interference Performance of Sensitive Devices To improve the anti-jamming performance of sensitive devices is to reduce the picking up of interference noise from the interference sources and to recover from abnormal state as soon as possible. The Usual Measures are as Follows: (1) Reduce the area of the loop in order to reduce the inductive noise.   (2) Power and ground wires should be as thick as possible, besides reducing the pressure drop, it is more important to reduce the coupling noise.   (3) The idle I / O port of SCM shouldn’t suspend, but connecting the ground or power supply. And the idle ends of other IC should be grounded or connected to power without changing the logic of the system.   (4) Using the power source monitoring and watchdog timer, such as IMP809, IMP706, IMP813, X25043, X25045, and so on, can greatly improve the anti-interference performance of the whole circuit.   (5) Under the condition that the speed can meet the requirement, the crystal oscillator of the single chip microcomputer is reduced and the low-speed digital circuit is chosen as far as possible.   (6) IC device is welded directly to the circuit board as far as possible.   III. Experience and Advice Software 1. Clearing the code space that is not commonly used, because this is equivalent to the NOP, can help programs recover when appearing program fleet.   2. Adding several NOP before the jump instruction, the same purpose as 1.   3. When there is no hardware WatchDog, an analog one can be used through software to monitor the operation of the program.   4. Dealing with the adjustment or setting of external device parameters, the parameters can be re-transmitted periodically in order to prevent the external device from making mistakes due to interference, so that the external device can be restored correctly as soon as possible.   5. Adding additive data to check anti-interference in Communication.   6. When there are communication lines, such as I2C or a three-wire system, it is found that the anti-interference effect of the Data line is better than that of the low one.   Hardware 1. The layout of grounding and power supply wires.   2. The decoupling of the circuit.   3. The separation of digital ground wire and analog ground wire.   4. Each digital element needs 104 capacitors between the grounding and the power supply.   5. In the applications with relays, especially in the case of high current, a 104 and diode can be combined between the relay coils to prevent the contact spark interference of the relay, and 472 capacitors installed at the contact point and the normal beginning.   6. To prevent the crosstalk of I / O port, the I / O port can be isolated by diode isolation, gate isolation, optocouple isolation, electromagnetic isolation, and so on.   7. Multi-layer board anti-jamming is certainly better than single-layer board, but its cost is several times higher.   8. Choosing an anti-jamming device is more effective than any other method.   FAQ   1. What is Circuit interference? Electromagnetic interference (EMI), also called radio-frequency interference (RFI) when in the radio frequency spectrum, is a disturbance generated by an external source that affects an electrical circuit by electromagnetic induction, electrostatic coupling, or conduction.   2. What causes electrical interference? What Causes Interference? Interference occurs when undesired radio signals or electromagnetic "noise" sources are picked up by consumer electronics products -most often telephones, audio equipment, VCRs or TVs. It usually results in noise, unwanted voices or distorted TV pictures. In most cases, the source is nearby.   3. What is meant by circuit design? As circuit design is the process of working out the physical form that an electronic circuit will take, the result of the circuit design process is the instructions on how to construct the physical electronic circuit.   4. What is circuit design theory? In integrated circuit design automation, the term "circuit design" often refers to the step of the design cycle which outputs the schematics of the integrated circuit. Typically this is the step between logic design and physical design.   5. Which software is best for circuit design? a. Eagle b. Altium c. Proteus d. KiCad e. Cadence OrCAD PCB Designer f. DesignSpark g. Protel h. Cadstar i. Sprint-Layout j. PADS PCB   6. How does circuit design work? Digital electronic circuit design takes the electrical signals in the form of discrete values. The data are represented in the form of zeros and ones. Digital circuits extensively use transistors, interconnected to give create logic gates that provide the function of Boolean logic.   7. How long does it take to design a circuit? Programming the Micro-controller. Division of labor will make the work more efficient and specializations and expertise are more focused. Normally, it only takes hours to program the microcontroller of a simple circuit but complex circuit diagrams may take 2 to 3 days.   8. Is circuit design difficult? Designing a circuit is easy if you the basic working principle of each & every electronics components you're going to use. But making it efficient is a bit time-consuming. Once you know the rules, it's normally not too difficult. Of course, some circuits are more difficult than others.   9. What are the types of circuit? There are 5 Main Types of Electric Circuit – Close Circuit, Open Circuit, Short Circuit, Series Circuit and Parallel Circuit.   10. What is the process of a circuit? The process of circuit design can cover systems ranging from complex electronic systems all the way down to the individual transistors within an integrated circuit. ... Typically this is the step between logic design and physical design.   You May Also Like Can We Manage to Recycle PCB Boards for Avoiding Harming the Environment? 10 Things to Consider While choosing a PCB Prototype Service Some Guides for Beginners Before You Create A Printed Circuit Board(PCB) Industrial Chain and Development Trend of PCB in China

Warm hints: The word in this article is about 4000 words and  reading time is about 20 minutes.SummaryThe clock is the most important and special signal in the entire circuit. The movement of most of the devices in the system is performed on the edge of the clock. This requires that the delay of the clock signal is very small, otherwise it may cause an error in the timing logic. Therefore, it is very important for the design of FPGA to determine the factors of system clock and the delay of clock to ensure the stability of design. CoreClock in FPGA designPurposeDetermining the influencing factors of clock to ensure the stability of designEnglish nameField Programmable Gate ArrayCategoryDigital electronic circuitFunctionCreating digital circuitsFeatureTotally up to the designer to create a bit fileCatalogsCatalogsⅠ. What is Setup time and Hold timeⅢ. Analyzing with the help of timing diagram3. The composition of the state machine1. Synchronization between single bits and each pulse transmitted has at least 1 cycle width1. Setup timeⅣ. How to increase the clock working frequencyⅤ. An example showing a good method for state machine design2. The input pulse could be less than a synchronous circuit under a clock cycle width 2. Hold time1. Changing the line type for circuit wiringⅥ. The introduction of state machine Ⅱ. A basic model of synchronous design using a single clock2. Splitting the combinational logicⅦ. What we should pay attention when designing the clock in FPGA  IntroductionⅠ. What is Setup time and Hold timeThe clock is the most important and special signal in the entire circuit. The movement of most of the devices in the system is performed on the edge of the clock. This requires that the delay of the clock signal is very small, otherwise it may cause an error in the timing logic. Therefore, it is very important for the design of FPGA to determine the factors of the system clock and the delay of the clock to ensure the stability of the design.Learn how a clock drives all sequential logic in FPGA, from Flip-Flops to Block RAMs; The clock tells you how fast you can run your FPGA;This video demonstrates how to properly deal with multiple clock domains inside your design.1. Setup timeSetup time(Tsu) is defined as the minimum amount of time before the clock's active edge that the data must be stable for it to be latched correctly. Any violation may cause incorrect data to be captured, which is known as setup violation.2. Hold timeHold time(Thd) is defined as the minimum amount of time after the clock's active edge during which data must be stable. Violation in this case may cause incorrect data to be latched, which is known as a hold violation. Note that setup and hold time is measured with respect to the active clock edge only.Figure 1 Shows setup time and hold timeFigure 2 If data will change in tsu then it will cause setup violation and if data will change in thd then it will cause hold violation  DtailⅡ. A basic model of synchronous design using a single clockIn the same module of FPGA design, it often contains the combinational logic and the sequential logic. In order to guarantee the data in this logic interface can be processed steadily, then figuring out the concept of setup time and hold time is very important. Then we could be able to think about this following question:Figure 3 Shows a basic model of synchronous design using a single clockTco: Delay of the data output of the trigger;Tdelay: Delay of the combinational logic;Tsetup: The trigger's setup time;Tpd: Delay of the clock (negligible).T: clock cycleT3: D2 setup timeT4: D2 hold timeIf the first trigger D1 has a maximum setup time of T1max and a minimum of T1min, the combinational logic has a maximum delay of T2max and a minimum of T2min. The question is what conditions setup time T3 and hold time T4 of the second trigger D2 should be met, or what the maximum clock cycle given T3 and T4. This is the thing must be carefully considered in the process of design, because only by clarifying this issue can we ensure that the delay of the  combinational logic designed meets the requirements.Ⅲ. Analyzing with the help of timing diagramNow let us analyze this question with the help of timing diagram: let the input of the first flip-flop be D1, the output be Q1; the input of the second flip-flop be D2, the output be Q2;Given the clock is uniformly sampled on the rising edge, for ease of analysis we would discuss two cases, the first one: Assume that the delay of the clock Tpd is zero, which in fact, is often met in the FPGA design where the unified system clock it is generally adopted and the clock be input through the global clock pin, therefore the internal clock delay can be completely ignored. In this case, it is not necessary to consider the hold time, because each data maintains one clock tick while there is also delay line, that is, the delay based on CLOCK is much smaller than the delay based on data, so the hold time can meet the requirement. The setup time is what we should care about. If the setup time D2 meets the requirement, the timing diagram should be as shown as Figure 4.Figure 4 Shows the timing chart that meets the requirementsFrom the figure 4 we can see:T-Tco-Tdelay>T3That is Tdelay< T-Tco-T3During the setup time D2, the signal can reach D2 through the combinational logic D1, i.e. the data is already in Tsup before the second CLK arrive.Then it meets the requirement of setup time, where T as the clock period, the second flip-flop can pick up D2 on the rising edge of the second clock in this case. {D1 => setup time => hold time => trigger data output delay => combinational logic delay => D2 => ...}If the delay time of the combinational logic is too largeT-Tco-Tdelay < T3 (Tcox<D2 setup time)Then it will not meet the requirements. The second trigger will pick up an unstable state on the rising edge of the second clock, as shown in Figure 5, then the circuit will not work properly.Figure 5 The delay time of the combinational logic is too large to meet the requirementsSo you can deriveT - the Tco - T2max > = T3This is the setup time for D2.From the timing diagram above, it also can be seen that the setup time and hold time of D2 are not related to the setup and hold time of D1, except the combinational logic in front of D2 and the data transmission delay of D1. This is also a Very important conclusion, which shows that the delay has no additive effect.However, if there is a delay in the clock instead, the hold time must be considered in this case, together with the setup time. Most clocks with large delays are designed using asynchronous clocks, which is difficult to guarantee the data synchronization, so it is rarely used in actual designs. At this point, if the setup time and hold time all meet the requirements, you will see the output timing as shown in Figure 6.Figure 6. Clock has a delay but meets the timingIt can be easily seen from figure 5 that the Tpd is relaxed for the setup time, so the setup time of D2 must meet the requirements:Tpd+T-Tco-T2max>=T3 (T3 is the setup time of D2, T2max is the maximum delay of  combinatorial logic, Tpd is the clock delay)As shown in the FIG. 6, since the sum of setup time and hold time is a stable clock period (T), if the clock has a delay and the data delay is small, then the setup time will increase inevitably,  and the decrease of hold time goes with it. If it is reduced to not meet the requirement of hold time D2 , the correct data cannot be collected.That is T-(Tpd-Tco-T2min)T-(Tpd+T-Tco-T2min)>=T4 i.e. Tco+T2min-Tpd>=T4 (D2 hold time )From the formula above we could also figure out that if Tpd = 0, that is to say the delay of the clock is 0, then the same requirements goes with Tco + T2min> T4, however in practical applications the delay of T2 i.e. the delay of line is much larger than the trigger's hold time T4, it becomes not necessary to take the hold time into consideration.Figure 7 The clock has a delay and the hold time does not meet requirementsIn summary, if you do not consider the delay of the clock, the only thing you need to care about is the setup time, or the hold time instead. Then let us think about in FPGA design, how to increase the working clock in the synchronous system. AnalysisⅣ. How to increase the clock working frequencyFrom the above analysis, we can see that the requirements of setup time T3 for the D2 in the synchronization system is as follows:T-Tco-T2max>=T3So it is easy to derive:T>=T3+Tco+T2maxwhere T3 is the setup time Tset of D2, and T2 is the delay time of the combinational logic. In a design, T3 and Tco are both fixed values determined by the device, the only factor that we could control is the input delay of the combination logic T2. Therefore, by reducing T2 as much as possible, the clock working frequency can be increased. In order to achieve the reduction of T2 in the design, there are different comprehensive methods we can use.1. Changing the line type for circuit wiringAltera devices, for example, there are many bars in the quartus timing closure floorplan, so we can slice and dice them into rows and columns: Each bar represents 1 LAB, each LAB has 8 or 10 LEs in. The relationship of their routing delay is as follows: the same LAB (fastest) < the same row and column < different row and column. We could add appropriate constraints to the synthesizer (this should be given appropriate, generally 5% margin adding, for example, if the circuit works at 100Mhz, then adding constraints to 105Mhz is sufficient, because the excessive constraint could do a bad effect instead, and greatly increases the integration time) to make the relevant logic circuit wiring be placed as close as possible, thereby reducing the routing delay.2. Splitting the combinational logicSince the general synchronous circuits are more than a?single?stage latch (as shown in Figure 9), and to make the circuit stable, the clock period must meet the maximum delay requirement, and the maximum?delay of the longest path can be shortened before the operating frequency of the circuit be increased.As shown in Figure 8, we can decompose the larger combinatorial logic into smaller blocks and insert flip-flops in the middle, which can increase the operating frequency of the circuit. This is also the basic principle of the so-called "pipelining" technology.For the upper part of Figure 9, its clock frequency is subject to the delay of the second larger combinational logic. By appropriately distributing the combinational logic, excessive delay between the two flip-flops can be avoided and speed bottlenecks can be eliminated.Figure 8 Splitting combination logicFigure 9 Transferring Combination LogicHow to split the combinatorial logic in design, the better method should be accumulated in practice, but some good design ideas and methods also need to be mastered. We know that at present most of the FPGAs based on 4-input LUTs, if an output criteria corresponding is more than four inputs, then the multiple LUT cascade will be needed, thus introducing the delay of one-stage combinational logic. That is we want to reduce the number of combinational logic, the logic is nothing more than to make the input conditions as few as possible, so that less multiple LUT cascade need to be use, thereby reducing the time delay caused by combinational logic.The pipelining that we usually hear is a way to increase the operating frequency by splitting a large combinational logic (in the middle of which a singer or multiple stages of D flip-flops are inserted, thereby reducing the number of combinatorial logic between registers) to a smaller one. For example, a 32-bit counter, with a very long carry chain, will inevitably reduce the operating frequency, so we can split it into a 4-bit and a 8-bit one, whenever the 4-bit counter counts to 15 and triggers an 8-bit one, which enable the counter to be split and increases the operating frequency.Just as the same, large counters are generally moved out of the state machine, because if they, with usually more than 4 inputs, are used as state transition criteria with other conditions, they will increase the multiple LUT cascade, and then increasing the combination logic.Taking a 6-input counter as an example, we wanted to make a state transition after the counter counted to 111100, now because we put the counter out of the state machine, when it counts to 111011, a signal of "enable" is generated and then trigger the state transition, which obviously reduces the combinatorial logic.3. The composition of the state machineThe state machine generally contains three modules:An output moduleA module that determines what the next state isA module that saves the current stateThe logic used to form these three modules is also different. The output module usually contains both combinatorial logic and sequential logic; the module that determines the next state is usually composed of combinatorial logic; and the module that saves the current state is usually composed of sequential logic. The relationship between these three modules is shown in Figure 10.Figure 10 The composition of the state machineⅤ. An example showing a good method for state machine designThat is why when writing the state machine, the state machine is always divided into three parts according to these three modules. The following example shows a good method of state machine design: -----------------------------------------------------*/module arbiter2 (                    clock , // clock                    reset , // Active high, syn reset                    req_0 , // Request 0                    req_1 , // Request 1                    gnt_0 ,                    gnt_1                );//-------------Input Ports-----------------------------input    clock ;input    reset ;input    req_0 ;input    req_1 ;//-------------Output Ports----------------------------output    gnt_0 ;output    gnt_1 ;//-------------Input ports Data Type-------------------wire    clock ;wire    reset ;wire    req_0 ;wire    req_1 ;//-------------Output Ports Data Type------------------reg        gnt_0 ;reg        gnt_1 ;//-------------Internal Constants--------------------------parameter     SIZE = 3 ;parameter     IDLE = 3'b001 ,            GNT0 = 3'b010 ,            GNT1 = 3'b100 ;//-------------Internal Variables---------------------------reg        [SIZE-1:0] state ;        // Seq part of the FSMwire    [SIZE-1:0] next_state ;    // combo part of FSM //----------Code startes Here------------------------assign    next_state = fsm_function(req_0, req_1);//------------fsm_function--------------//function [SIZE-1:0] fsm_function;input     req_0;    //parameterinput     req_1;    //parameterbegin    case(state)        IDLE :                if (req_0 == 1'b1)                    fsm_function = GNT0;            else if (req_1 == 1'b1)                fsm_function = GNT1;            else                fsm_function = IDLE;        GNT0 :             if (req_0 == 1'b1)                fsm_function = GNT0;            else                fsm_function = IDLE;        GNT1 :            if (req_1 == 1'b1)                fsm_function = GNT1;            else                fsm_function =IDLE;        default : fsm_function = IDLE;        endcaseendendfunction always@(posedge clock)begin    if (reset == 1'b1)        state <= IDLE;    else        state <= next_state;end//----------Output Logic-----------------------------always @ (posedge clock)begin    if (reset == 1'b1)         begin        gnt_0 <= #1 1'b0;        gnt_1 <= #1 1'b0;        end    else         begin        case(state)            IDLE :                 begin                gnt_0 <= #1 1'b0;                gnt_1 <= #1 1'b0;                end            GNT0 :                 begin                gnt_0 <= #1 1'b1;                gnt_1 <= #1 1'b0;                end            GNT1 :                 begin                gnt_0 <= #1 1'b0;                gnt_1 <= #1 1'b1;                end            default :                 begin                gnt_0 <= #1 1'b0;                gnt_1 <= #1 1'b0;                end        endcase        endend // End Of Block OUTPUT_Endmodule Ⅵ. The introduction of state machineState machines are usually written in three segments to avoid excessive combinational logic.All we mentioned above shows how we could use the way of pipelining to split the combinational logic, but in some cases it is difficult for us to do that, and then what should we do?The state machine is such an example that we cannot add assembly line in the state decoding combinational logic. If there is a design of state machine with dozens of states, there is no doubt that its state decoding logic will be very large and this will be the critical path in the design. So what should we do?Just the same way, reducing the combinatorial logic. We can analyze the output of the state, reclassify and redefine them into a group of small state machines. By selecting the input (case statement) and triggering the corresponding small state machine, we can achieve a large state machine splitting into several small state machines. In the ATA6 specification (hard disk standard), there are about 20 kinds of input commands, and each piece of command corresponds to a variety of states. It is unthinkable to do it with a large state machine (nesting), however in the contrary, if you use the case statement to decode the command and trigger the corresponding state machine, in this way the module can run very fast.The key to increasing the operating frequency is to reduce the time delay from register to register, and the most effective method for reduction is to avoid large combinational logic, that is, to try to meet the four-input condition, reducing the number of LUT cascades, that’s mean that we could increase the working frequency by adding constraints, using a way of pipelining and splitting states.Ⅶ. What we should pay attention when designing the clock in FPGA1.Try to use only one clock in a module, and a module here means a module or an entity. In the design of multi-clock domain, it is better to have an extra special module for the isolation of clock domain. This allows the synthesizer to get a better results.2. Unless it is a low-power design, otherwise do not use the gated clock (gllobal Clock buffer such as IBUFG within FPGA) to control the input of clock edge of flip-flop, but use combinational logic and other timing logic (such as frequency divider) to generate signals used as the input of clock edge of flip-flop---all this is to reduce the instability of the design.3. Do not use the signals divided by counter as the clock of other modules, but  with the help of clock enable(CE). Otherwise, this clock-like manner is extremely unfavorable to the reliability of the design, and greatly increases the complexity of the static timing analysis .Ⅷ. Synchronization Between Different Clock DomainsIf two modules in a design using two respective operating clock, then at their interfaces there would emerge a phenomenon which called as Asynchronous Patterns. In order to ensure data correct processed, the two modules must be synchronized.There are usually two cases of different clock domains here (discrete clock source):1. the frequency of two clocks is different;2. the two clocks share a same frequency, but they are actually two separate clocks with no relation to the phase.Just as shown in the following two figures:Figure 11 The frequencies of two clocks are completely differentFigure 12 The frequencies of the two clocks are the same, but the phases are irrelevantThe data transmission between two clock domains usually adopts different synchronization methods according to different bit widths.1. Synchronization between single bits and each pulse transmitted has at least 1 cycle widthThis kind of synchronization is mainly used for the synchronization of some control signals. As shown in Figure 13 below:Figure 13 One bit synchronizer designThe following points are required to be explained for this synchronization:(1) synchronous circuit of figure 12 is actually called "one bit synchronizer", it can only be used for one bit asynchronous signal which must be wider than that of the Current stage’s clock, otherwise it may be unable to adopt this asynchronous signal.(2) why is the circuit in figure 13 can only be used in one bit asynchronous signals?When two or more asynchronous signals (control or address) simultaneously get into the current time domain and take control the circuit of current time domain, problems arise if these signals are all synchronized using the same circuit in FIG. 13. Skews has arisen between two or more asynchronous signals (control or address) due to connection delays or other delays, and then the skew is greatly enlarged via the synchronizer in Figure 13 when getting into the current time domain, or competition may caused and finally leading to an error in the time domain circuit.Figure 14 Problem-passing multiple control signals between clock domainsIf the asynchronous data bus is to enter the current time domain, the circuit in Figure 13 cannot be used either, because data change very randomly and the width of 0 or 1 has nothing to do with the clock pulse of the current time domain, so the circuit in Figure 13 may be unable to adopt the correct data.(3) Please note that the second trigger is not used for avoiding the occurrence of "metastable state", on the contrary, it can prevent the transmission of metastable state. In other words, once the first flip-flop becomes metastable (possibly), due to the second flip-flop, the metastability will not be transmitted to the circuit following.(4) The first-stage trigger has a metastable state, which means it will require a recovery time to stabilize again, or it is also called Withdrawal from metastable state. The recovery time plus the establishment time of the second-stage flip-flop (say more precisely, maybe also minus the clock skew) is less than or equal to the clock period, which can be easily satisfied. This is means thees two stages of flip-flop should be put together as close as possible, without any combinatorial logic between them or excessive skews to the clock, and then the second-stage flip-flop can adopt data stably and preventing the transmission of metastable state.(5) FF1 is the sampling output of FF2, so of course, what is output by FF1 is  what output by FF2, everything is the same except one cycle of delay. Note that “meta-stableit” means that once the data of FF1 enters, its electrical level would be indefinite and maybe incorrect. So although this method can prevent transmission of metastable state, it does not guarantee the data after the two-stage flip-flop is correct. Therefore, this kind of circuit always has a certain amount of fault-tolerance. This applies only to a some error-insensitive cases, but for other sensitive circuits, dual-port RAM or FIFO are better choices.2. The input pulse could be less than a synchronous circuit under a clock cycle width How is that possible? Has it not less than the original clock? For this case, the Feedback shown in Figure 15 below may usually be taken into consideration. The analysis of this circuit is as follows: Assume that the input data is high level, because the first flip-flop FF1 is high-level cleared, then all outputs should also be high and correctly adopted. On the other hand, if the input is low-level, data of FF1 would be forced to clear and the output level is zero, which ensures the correctness of the output.Figure 15 Synchronous circuit--input pulse may be less than one clock cycle width  Book SuggestionBuilding Embedded Systems: Programmable Hardware 1st ed. EditionThis is a book for embedded-system engineers and intermediate electronics enthusiasts who are seeking tighter integration between software and hardware. Those who favor the System on a Programmable Chip (SOPC) approach will in particular benefit from this book. Students in both Electrical Engineering and Computer Science can also benefit from this book and the real-life industry practice it provides.--Changyi GuDigital Integrated Circuit Design Using Verilog and Systemverilog 1st Edition, Kindle EditionFor those with a basic understanding of digital design, this book teaches the essential skills to design digital integrated circuits using Verilog and the relevant extensions of SystemVerilog. In addition to covering the syntax of Verilog and SystemVerilog, the author provides an appreciation of design challenges and solutions for producing working circuits. --Ronald W. MehlerPower Converters with Digital Filter Feedback Control 1st Edition, Kindle EditionThis book builds a bridge for moving a power converter with conventional analog feedback to one with modern digital filter control and enlists the state space averaging technique to identify the core control function in analytical, close form in s-domain (Laplace). It is a useful reference for all professionals and electrical engineers engaged in electrical power equipment/systems design, integration, and management.--Keng C. Wu Relevant information "Discussion on the influencing factors of clock in FPGA design"About the article "Discussion on the influencing factors of clock in FPGA design", If you have better ideas, don't hesitate to  write your thoughts in the following comment area. You also can find more articles about electronic semiconductor through Google search engine, or refer to the following related articles.To Solve the Problems of Cloud Skyrocket--Edge ProcessingFPGAs Power Facial Recognition Technology Was Issued by NECNew Software for C2000 MCUs Eliminates the FPGA in industrial designsCustomisable Ethernet switch designed for embedded applicationsMouser signs Intel FPGA board firm ReFLEX CES

Catalog Introduction Design Flow of Chip Design Specification Development Design Details of the Chip Draw a Blueprint for the Plane About Wafer What Is a Wafer How to Make Single Crystal Wafer Metallurgical Purification Pulling the Crystal Design Flow of Chip Manufacture What Is an IC Chip Metal Sputtering Coating Photoresistance Etching Technology Photoresist Removal Nano-Process What Is the Nano-Process How Tiny Is the Nanometer Purpose of Reducing the Process Physical Limitations of Downsizing About Encapsulation Two Common Packages DIP Package BGA Package Two Ways to Reduce Size SoC SiP Introduction A chip is a silicon chip that contains an integrated circuit, so the chip is also called an integrated circuit. It may be only 2.5 centimeters in square size, but it contains tens of millions of transistors. Simpler processors, on the other hand, may have thousands of transistors engraved on chips which are a few millimeters in size. Chip is the most important part of electronic equipment, which undertakes the function of operation and storage. Design Flow of Chip The birth of a chip can be divided into two parts: design and manufacture. First, let's take a look at the complex and tedious chip design process. Fig 1. The process of making a chip is like building a house with Lego. First, the wafer is used as the foundation and the necessary IC chips can be produced after layers are stacked on top of each other. However, there is no use in having no amount of manufacturing capacity without a design drawing. Therefore, the role of an architect is very important. But who is the architect in IC's design? The next step is to introduce the IC design. In the IC production process, IC is mostly planned and designed by professional IC design companies, such as MediaTek, Qualcomm, Intel and other well-known large factories, all of which design their own IC chips to provide different specifications and efficiency chips for downstream manufacturers to choose from. Because IC is designed by the factories themselves, so IC design depends very much on the technology of engineers and the quality of engineers affects the value of an enterprise. But what are the steps engineers take to design an IC chip? The design process can be simply divided into the following steps. Design Specification Development In IC design, the most important step is specification development. This step is like deciding how many rooms, bathrooms, what building codes to comply with, and designing after all the features have been identified so that no additional time is spent on subsequent modifications. The IC design needs to go through similar steps to ensure that the chip is designed without any errors. The first step in specification development is to determine the purpose and effectiveness of IC and to set the general direction. The next step is to see what protocols to comply with, such as the wireless card chip needs to comply with IEEE 802.11 and other specifications. Otherwise, the chip will not be compatible with the products on the market, so that it will not be able to connect to other devices. Finally, the implementation method of this IC is established, different functions are allocated into different units, and the method of connecting different units is established, so that the specification can be completed. Design Details of the Chip After designing the specifications, it is followed by the details of the design chip. This step is like making a preliminary note of the planning of the building and depicting the overall outline for subsequent drawing. In IC chip, the hardware description language (HDL) is used to describe the circuit. The commonly used HDLs are Verilog, VHDL, and so on, which can easily express the function of a IC by code. This is followed by checking the correctness of the program's functionality and continuously modifying it until it meets the desired functionality. Fig 2. Verilog Example of 32 Bits Adder Draw a Blueprint for the Plane With a complete plan, the next step is to draw a blueprint for the plane. In IC design, the step of logic synthesis is to put the unmistakable HDL code into the electronic design automation tool (EDA tool), to let the computer convert HDL code into logic circuit, resulting in the following circuit diagram. After that, it is repeatedly determined whether the logic gate design conforms to the specification and is modified until the function is correct. Fig 3. The Result of the Synthesis of the Control Unit Finally, the synthesized code is put into another set of EDA tool for circuit layout and winding (Place And Route). After continuous detection, the following circuit diagram will be formed. You can see blue, red, green, yellow and other different colors, each of which represents a mask. As for the use of the mask, how should it be used? Fig 4. The Commonly Used Calculus Chip-FFT Chip, Which Completes the Circuit Layout and the Winding Result ——The chip is stacked by layers of masks. First of all, it is now known that an IC will produce multiple masks. These masks have the difference between the upper and lower layers and each layer has its own task. The following figure is a simple mask example. Taking the most basic element CMOS in the integrated circuit as an example, the full name of CMOS is complementary metal oxide semiconductor. That is, the combination of NMOS and PMOS to form CMOS. As for what is a metal oxide semiconductor (MOS)? This kind of component which is widely used in the chip is more difficult to explain, and it is more difficult for the general reader to figure it out, so there is no more detailed study here. In the following figure, on the left is the circuit diagram formed after the circuit layout and winding, and you have already known that each color represents a mask. On the right is the way each mask is spread out. Production is to start from the bottom, in accordance with the method proposed in the manufacture of the IC chip, layer by layer, and finally the desired chip will be produced. Fig 5.  At this point, you should have a preliminary understanding of the IC design. The overall view is very clear that IC design is a very complex major, but also thanks to the maturity of computer-aided software, so that IC design can be accelerated. The IC design relies heavily on the wisdom of engineers, and each of the steps described here has its own expertise and can be separated into multiple professional courses. For example, writing a hardware description language does not simply require familiarity with the programming language. You also need to understand how logic circuits work, how to convert the required algorithms into programs, and how synthetic software converts programs into logic gates. What Is a Wafer? In semiconductor news, it is always mentioned in the size of the wafer, such as 8-inch or 12-inch wafer. But what is the so-called wafer? What part of it is 8 inches? What is the difficulty of producing large wafers? Here is a step-by-step introduction to the most important foundation of semiconductors-what is a "wafer". Wafer is the basis for making all kinds of computer chips. We can compare chip manufacturing to building a house with Lego blocks and building the shape we want (that is, all kinds of chips) by stacking one layer after another. However, if there is no good foundation, the built house will be tilted back and forth, contrary to our wishes. In order to make the perfect house, we need a smooth substrate. For chip manufacturing, this substrate is the wafer that will be described next. First of all, think back to when you were a child playing with Lego blocks, there would be a small round bulge on the surface of the building blocks. With this structure, we can stack the two blocks firmly together without using glue. Chip manufacturing, also in a way like this, binds subsequent atoms to the substrate. Therefore, we need to find a substrate with a neat surface in order to meet the conditions needed for subsequent manufacturing. Fig 6. In solid materials, there is a special crystal structure. That is, single crystal (Monocrystalline). It has the characteristics of atoms one after another closely arranged together, which can form a flat atomic surface. Therefore, using single crystal to make wafer can meet the above needs. However, how to produce such a material? There are two main steps, respectively, purification and crystal pulling. After this, such a material can be completed. How to Make Single Crystal Wafer? Metallurgical Purification The purification is divided into two stages. The first step is metallurgical purification. During this process, we add carbon and convert silicon oxide into silicon with a purity of more than 98% in a redox manner. Most metals, such as iron or copper, are refined in this way to obtain sufficient purity of metal. However, 98% is still not enough for chip manufacturing and still needs to be further improved. Therefore, Siemens process will be used for purification, so that the high purity polysilicon needed for semiconductor process will be obtained. Fig 7. Silicon Column Manufacturing Process Pulling the Crystal Then there is the step of pulling the crystal. First, the high purity polysilicon obtained earlier is melted to form liquid silicon. After that, the single crystal silicon seed is in contact with the liquid surface and slowly pulls up as it rotates. As for why single crystal silicon is needed, that is because silicon atoms are arranged in the same way as people queue up. They will need to arrange the head so that later people can arrange it correctly. And silicon seed is an important row head, so that the later atoms know how to queue up. Finally, after the silicon atoms leaving the liquid surface solidify, the neatly arranged single crystal silicon columns are completed. Fig 8. Single Crystal Silicon Column But what do 8 inches and 12 inches stand for? It refers to the diameter of thin wafers being treated and sliced into，which is from the surface of the part of a crystal column that looks like a pencil rod. What is the difficulty of making large wafers? As mentioned earlier, the crystal column is made as if it were making marshmallows, rotating and forming at the same time. If you have made marshmallows, you should know that it is very difficult to make large and solid marshmallows, and the same is true of the crystal pulling process. The speed of rotation and the control of temperature will affect the quality of the crystal column. As a result, the larger the size, the higher the speed and temperature requirements are, so it is more difficult to make high-quality 12-inch wafers than 8-inch wafers. However, a whole silicon column cannot be made into a chip-making substrate. In order to produce a silicon wafer, the silicon column needs to be cut transversely into a wafer with a diamond knife, and the wafer can be polished to form the silicon wafer needed for chip manufacturing. After so many steps, the fabrication of the chip substrate is complete, and the next step is to stack the house, that is, chip manufacturing. So, how to make a chip? Manufacture ——Stacked chips After introducing what silicon wafers are, you also know that making IC chips is like building a house with Lego blocks, creating the shape you want by stacking layer after layer. However, there are quite a few steps to build a house, and so is IC manufacturing. What are the steps to make IC? Next, the process of IC chip manufacturing will be introduced. What Is an IC Chip? Before we begin, we need to know what an IC chip is. IC, which means integrated circuit (Integrated Circuit), is the design of the circuit that is in the form of stacking together. In this way, we can reduce the area required to connect the circuit. The following figure is a 3D diagram of the IC circuit, from which you can see that its structure is like the beams and columns of a house. It is done layer by layer and this is the reason why IC manufacturing is compared to building a house. Fig 9. 3D Profile of IC Chip From the 3D profile of the IC chip in the image above, the dark blue part at the bottom is the wafer introduced in the previous step. From this picture, we can see more clearly how important the wafer substrate plays in the chip. As for the red and khaki parts, they are the places to be completed when IC is made. First of all, the red part can be compared to the hall on the first floor of the building. The hall on the first floor is the door of a house because everyone and everything come in and out of here. It has more functionality under the control of traffic. Therefore, compared with other floors, the construction will be more complex and requires more steps. In IC circuit, this hall is the logic gate layer; it is the most important part of the whole IC by combining a variety of logic gates together and completes the fully functional IC chip. The yellow part is like a normal floor. Compared with the first floor, there will not be much complex structure, and each floor will not change much when it is built. The purpose of this layer is to connect the logic gates of the red part. The reason why so many layers are needed is that there are so many lines to be connected that a single layer cannot hold all the lines. So it is necessary to stack a few more layers to achieve this goal. Among them, the lines of different layers will be connected up and down to meet the needs of the wiring. ——Layered construction, layer by layer architecture Once you know the construction of IC, let's show you how to make it. Imagine that if we want to make a fine drawing with a paint spray tank, we need to cut out the cover plate of the figure and cover it on paper. Then spray the paint evenly on the paper and remove the mask when the paint is dry. After repeating this step over and over again, you can complete neat and complex graphics. IC is made in a similar way, by covering up a layer of stacking. Fig 10.  When making IC, you can simply divide into the above four steps. Although the actual manufacturing steps will be different and the materials used will be different, but generally using a similar principle. This process is slightly different from painting: IC manufacturing is to paint first and then cover while painting is to cover and then paint. And the processes are described below. Metal sputtering:  Sprinkle the metal material which is to be used evenly on the wafer to form a thin film. Coating photoresistance:  First put the photoresist material on the wafer, and then hit the beam on the desired part through the mask to destroy the structure of the photoresist material. Next, use chemicals to wash away the damaged material. Etching technology:  The silicon wafer without photoresistance protection will be etched by ion beam. Photoresist removal:  Use the photoresist solution to dissolve the remaining photoresist, so that a process can be completed. Finally, a lot of IC chips will be completed on a whole wafer, and then as long as the completed square IC chips are cut off, they can be sent to the packaging factory for packaging. What is the packaging factory? We'll have to explain it later. Nano-Process What is the nano-process? Samsung and TSMC compete fiercely in advanced semiconductor processes because both of them want to take the lead in wafer contract manufacturing to win orders, which has almost become a battle between 14 nanometers and 16 nanometers. But what is the meaning of 14 nm and 16 nm, and where do they refer? What are the benefits and problems that will be brought about by the reduction of the process? Next we will give a brief description of the nano-process. How tiny is the nanometer? Before you start, you need to understand what nanometer really means. Mathematically, nanometers are 0.000000001 meters, but this is a pretty bad example. After all, we can only see a lot of zeros after the decimal point, but we don't actually feel it. If you compare it with the thickness of nail, it may be more obvious. If you actually measure it with a ruler, you can tell that the thickness of the nail is about 0.0001 meters (0.1mm), that is to say, try to cut the side of a nail into 100000 lines, each of which is about one nanometer. From this, we can slightly imagine how tiny a nanometer is. Purpose of Reducing the Process After knowing how small the nanometer is, it is necessary to understand the purpose of reducing the process. The main purpose of reducing the transistor is to insert more transistors into smaller chips so that the chip will not become larger as a result of technological advances; second, it can increase the computational efficiency of the processor; moreover, reducing the volume can also reduce the power consumption. Finally, after the chip size is reduced, it is easier to plug into the mobile device to meet the needs of thinness and lightness in the future. Come back to explore what the nano-process is and we will take 14 nm as an example. The process refers to the minimum size of 14 nm in the chip. The following figure shows the appearance of a traditional transistor, as an example. The main purpose of reducing transistor is to reduce power consumption, but which part needs to be reduced to achieve this goal? The L in the figure on the left is what we expect to shrink. By reducing the gate length, the current can be routed from the Drain side to the Source end in a shorter path (if you are interested, you can use Google to search for MOSFET, which will be explained in more detail). Fig 11. In addition, computers operate on 0 and 1. How can we use transistors to meet this purpose? The way to do this is to determine whether the transistor has current flow. When a voltage supply is made at the Gate (green square), the current will flow from the Drain to the Source, and if there is no supply voltage, the current will not flow, so that it can represent 1 and 0. (As to why 0 and 1 are used to judge, if you are interested, you can go to the Brin algebra. That is the way we use this method to make a computer.) Physical Limitations of Downsizing However, the process cannot be reduced indefinitely. When we narrow the transistor to about 20 nanometers, we will encounter problems in quantum physics, so that the transistor has a leakage phenomenon, offsetting the benefits of L. As a way to improve, the concept of FinFET (Tri-Gate) was imported, as shown in the figure above. The leakage caused by physical phenomena can be reduced by importing this technology. Fig 12. More importantly, this method can increase the contact area between the Gate end and the lower layer. In traditional practice (top left), the contact surface has only one plane, but with FinFET (Tri-Gate), the contact surface will become three-dimensional, and the contact area can be easily increased. This allows the Source-Drain side to be smaller while maintaining the same contact area, which is of considerable help in reducing the size. Finally, why would anyone say that it would be a pretty serious challenge for factories to enter the 10-nanometer process? It is mainly because the size of an atom is about 0.1 nanometers, and in the case of 10 nanometers, there are fewer than 100 atoms in a line. It is very difficult to make, and as long as there is an atomic defect, such as atoms falling out or impurities in the production process, there will be unknown phenomena, affecting the yield of the product. If you can't imagine the difficulty, you can do a small experiment. Line up a 10 × 10 square with 100 small beads on the table, cut a piece of paper to cover the beads, then brush off the beads next to it with a small brush, and finally make it form a 10 × 5 rectangle. In this way, we can know the difficulties faced by the major factories and how difficult it is to achieve this goal. Encapsulation After a long process, from design to manufacture, finally we got an IC chip. However, a chip is so small and thin that it can be easily scratched and damaged if it is not protected from the outside. In addition, because of the small size of the chip, if you do not use a larger size of the shell, it will not be easy to manually place on the circuit board. Therefore, the next step is to describe the encapsulation: Two Common Packages At present, there are two common packages; one is the DIP package, which is common in electric toys and looks like a centipede, the other is the BGA package, which is common when buying boxed CPU. As for other packaging methods, there are PGA (Pin Grid Array) used in the early CPU or an improved version of QFP (plastic square flat package) of DIP. Because there are so many packaging methods, only DIP and BGA encapsulation are described below: ——Enduring Traditional Packaging DIP Package The first thing to introduce is the Dual Inline Package (DIP), we can see from the following figure that the IC chip with this package will look like a black centipede at the foot of the dual inline connection and this is the earliest IC packaging technology. It has the advantage of low cost and is suitable for small chips without too many wires. However, because most of them are plastic, the heat dissipation effect is poor, which cannot meet the requirements of the current high-speed chips. Therefore, most of the chips using this package are durable chips, such as OP741 shown in the following figure or smaller IC chips with less speed requirements and fewer holes. Fig 13.  The IC chip shown on the left is a common voltage amplifier named OP741. On the right is its section. The package connects the chip to the leadframe with a gold wire. BGA Package As for spherical array (Ball Grid Array,BGA) packaging, compared with DIP, it is smaller and can be easily placed in smaller devices. In addition, because the pin is located under the chip, it can hold more metal pins than the DIP so it is Ideal for chips that require more contacts. However, the cost of this packaging method is high and the connection method is more complex, so it is mostly used in high unit price products. Fig 14.  On the left is a chip encapsulated in BGA. On the right is a schematic diagram of BGA using a cladding packaging. ——The rise of mobile devices and the emergence of new technologies on the stage Two Ways to Reduce Size However, the use of these packaging methods will cost a considerable amount of volume. For example, today's mobile devices, wearing devices, and so on, require quite a variety of components. If each component is packaged independently, it will cost a lot of space. Therefore, there are two ways to meet the requirements of reducing size. They are SoC (System On Chip) and SiP (System In Packet). SoC At the beginning of the rise of smart phones, the term SoC can be found in major financial magazines, but what is SoC? To put it simply, ICs with different functions are integrated into one chip. By this method, not only the volume can be reduced, but also the distance between different IC can be reduced, and the calculation speed of the chip can be improved. As for the manufacturing method, during the IC design phase, different ICs are put together and then a mask is made through the design process described earlier. However, SoC is not the only advantage; to design a SoC requires considerable technical cooperation. When IC chips are encapsulated, they have their own external protection, and the distance between IC and IC is long, so there is no interactive interference. But when all the ICs are wrapped together, it is the beginning of a nightmare. The IC design factory has to change from the original simple design IC, to the IC which requires them to understand and integrate the various functions. Therefore, it increase the workload of engineers. In addition, there will also be a lot of situations, such as the high-frequency signal of the communication chip may affect the IC of other functions and so on. In addition, SoC also needs to obtain IP (intellectual property) authorization from other vendors in order to put components designed by others into SoC. Because making SoC needs to obtain the design details of the whole IC in order to make a complete mask, which also increases the design cost of SoC. Some people may question why not just design one by yourself. That is because designing all kinds of IC requires a lot of knowledge related to the IC, only a rich enterprise like Apple can have a budget to poach top engineers from well-known enterprises. It's still a lot cheaper to design a whole new IC through collaborative licensing than to develop it by yourself. SiP As an alternative, SiP has leapt onto the stage of integrating chips. Unlike SoC, it buys IC from different enterprises and finishes the last step, which is to encapsulate the IC. In this way, the IP licensing step is eliminated and the design cost is significantly reduced. In addition, because they are independent ICs, the degree of interference with each other is greatly reduced. Fig 15. Apple Watch uses SiP technology to package the entire computer architecture into a chip, not only to meet the desired performance but also to reduce the size, so that the watch has more space for battery release. The most famous product using SiP technology is Apple Watch. Because the internal space of Watch is too small, it cannot use the traditional technology, the design cost of SoC is too high, SiP has become the first choice. With SiP technology, not only the volume can be reduced, but also the distance between each IC can be shortened, so SiP can be a feasible compromise. The following figure shows the structure of the Apple Watch chip, and you can see that quite a few IC are included in it. Fig 16. Internal configuration Diagram of S1 Chip encapsulated by SiP in Apple Watch After the packaging is completed, we will enter the testing stage. At this stage, it is necessary to confirm whether the encapsulated IC is functioning properly and that it can be shipped to the assembly plant after it is correct, so that the electronic products we can see can be made. So far, the semiconductor industry has completed the task of the whole production.