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Introduction FPGA is a product of further development on the basis of programmable devices such as PAL, GAL, and CPLD. It appears as a semi-custom circuit in the field of application specific integrated circuits (ASIC), which not only solves the shortcomings of the custom circuit, but also overcomes the limited number of gate circuits of the original programmable device. FPGA is often used in communication, network and other fields to process a large number of network data packets. It is also widely used in aerospace, military defense and other fields. As a hardware test platform before other chips are taped out, it plays an important role in cloud computing, artificial intelligence (AI) and other fields. FPGA Applications, Features and Selection Catalog Introduction Ⅰ FPGA Basic Architecture Ⅱ FPGA Basic Features Ⅲ FPGA Applications 3.1 Circuit Design 3.2 Product Design 3.3 System Application Ⅳ Vacuum Cleaner Based on FPGA 4.1 A Short Brief 4.2 The Composition of the Platform 4.3 Main Hardware Design 4.4 Program Design Points Ⅴ FAQ Ⅰ FPGA Basic Architecture FPGA consists of 6 parts, namely programmable input/output (I/O) unit, basic programmable logic unit, embedded RAM, abundant wiring resources, bottom embedded functional unit and embedded dedicated hard core. Figure 1. FPGA Basic Architecture Each unit is described as follows:🔺Programmable I/O UnitAt present, most FPGA I/O units are designed in programmable mode, that is, through the flexible configuration of software, they can adapt to different electrical standards and I/O physical characteristics; the matching impedance characteristics, the pull-up and pull-down resistors can be adjusted; the output drive current can be adjusted, etc.🔺Basic Programmable Logic UnitThe basic programmable logic unit of FPGA is composed of a look-up table (LUT) and a register. The look-up table completes the pure combinational logic function. FPGA internal registers can be configured as flip-flops with synchronous/asynchronous reset and set, clock enabled, or as latches. FPGA generally relies on registers to complete synchronous sequential logic design. Generally speaking, the configuration of a classic basic programmable unit is a register plus a LUT. However, the internal structures of registers and look-up tables of different manufacturers are different, so the combination modes are also different.An important aspect of learning the LUT and Register ratios of the underlying hive is device selection and sizing. In addition to the basic programmable logic units inside the FPGA, there are embedded RAM, PLL or DLL, dedicated Hard IP Core, etc. These modules can also be equivalent to a certain scale of system gates, so the simple and scientific method is use the number of Registers or LUTs of the device to measure.🔺Embedded RAMNow most FPGAs have embedded RAM, which can be configured as single-port RAM, dual-port RAM, pseudo-dual-port RAM, CAM, FIFO and other storage structures.CAM is the content address memory. The data written to the CAM is compared with every data stored in it and returns the addresses of all internal data that are the same as the port data. Simply put, RAM is a storage unit for writing addresses and reading data, while CAM is just the opposite of RAM. In addition to block RAM, Xilinx and Lattice FPGAs can flexibly configure LUTs into storage structures such as RAM, ROM, and FIFO.🔺Rich Wiring ResourcesThe routing resources connect all the units in the FPGA, and the length and process of the connection determine the driving ability and transmission speed of the signal on the connection. Here the division of wiring resources:1) Full dedicated routing resources: Complete the routing of the global clock and global reset/set within the device.2) Long-term resources: Used to complete the wiring of some high-speed signals and some second global clock signals between device banks.3) Short-circuit resources: Used to complete the logic interconnection and wiring between basic logic units.4) Others: There are various wiring resources and control signal lines such as dedicated clock and reset in the logic unit.In the design process, the place and router often automatically selects the available routing resources to connect the underlying unit modules used according to the topology and constraints of the input logic netlist, so routing resources are often ignored. In fact, the optimization of routing resources is directly related to the use and implementation results.🔺The bottom layer is embedded with functional units, and the resources embedded by different manufacturers will be different.🔺Embedded dedicated hard coreDifferent from the "low-level embedded unit", the hard cores here are mainly those with relatively weak generality, and not all FPGA devices contain hard cores.   Ⅱ FPGA Basic Features 1) Using FPGA to design ASIC circuit (application-specific integrated circuit), users can get suitable chips without film production.2) FPGA can be used as a mid-scale sample for other full-custom or semi-custom ASIC circuits.3) There are abundant triggers and I/O pins inside the FPGA.4) FPGA is one of the devices with the shortest design cycle, the lowest development cost and the lowest risk in the ASIC circuit.5) FPGA adopts high-speed CMOS technology with low power consumption and is compatible with CMOS and TTL levels. Figure  2. FPGA Chip Ⅲ FPGA Applications 3.1 Circuit Design Connection logic and control logic are the areas where FPGA played a relatively important role in the early days and are also the cornerstone of FPGA applications. In fact, it is still quite difficult to apply FPGA in circuit design, which requires developers to have corresponding hardware knowledge (circuit knowledge) and software application capabilities (development tools). So talents in this area are always in short supply, and they are often engaged in new technologies. The successful product development of new products will become the mainstream basic products in the market for designers to apply. In the near future, the design of general-purpose and special-purpose IP will become popular. 3.2 Product Design Apply relatively mature technology to some specific fields such as communication, video, information processing, etc. to develop products that meet the needs of the industry and can be accepted by industry customers. This aspect is mainly a combination of FPGA and professional technology. In addition, there are product design for interface issues with professional customers also includes professional tool products and civilian products. The former focuses on performance, while the latter focuses on price-sensitive product design to achieve product functions as the main purpose.FPGA is a means of realization. In this field, it has the characteristics of interface, control, functional IP, embedded CPU, etc. to realize a system product design with simple structure, high degree of curing, and comprehensive functions for FPGA market. 3.3 System Application The system-level application is the combination of FPGA and traditional computer technology to realize an FPGA version of the computer system. For example, Xilinx V-4, V-5 series FPGA is used to realize the embedded POWER PC CPU, and then cooperate with various peripheral functions. To achieve a basic environment, running LINUX and other systems on this platform also supports various standard peripherals and functional interfaces, which is very helpful for quickly forming large-scale FPGA systems.In system-level applications, if the developers do not have the ability to expand the system, it is meaningless to just engage in programming. Of course, the development of device drivers is another case. The system-level application seems to have a high starting point, but it does not have deep development ability, it is likely to become a hobbyist, just like many people can make web pages but cannot be called programming.   Ⅳ Vacuum Cleaner Based on FPGA 4.1 A Short Brief Design of indoor intelligent vacuuming platform based on FPGA.Intelligent environmental cleaners have increasingly become the focus of research because they can replace people in environmental cleaning. Although they achieve intelligence, most of them have complex structures and high integration, which are not conducive to developers to expand their functions. On the basis of researching and summarizing the relatively mature products on the market, this paper designs and implements an indoor intelligent vacuuming platform based on a highly programmable FPGA. The platform has self-navigation, can clean most of the space, and is compact in shape, stable in operation and low in noise. More importantly, it has a simple structure and a user-friendly interface, which is convenient for further development of operation and functions. Figure  3. Body Frame 4.2 The Composition of the Platform The overall frame design of the platform proposed in this paper is shown in Figure 3, and a car with four wheels is used as the carrier of the entire platform. The FPGA controller is used as the main controller of the entire platform, and is connected to the photoelectric sensors jk1, jk2, jk3, jk4 and the collision switch jk5 through I/O to realize the detection of platform obstacles. Then output PWM waveform through I/O to drive speakers and high-low, and the change of the level drives the on and off of the LED to form an acousto-optic circuit. Finally the stepper motor dj1, dj2 and the DC dust collection motor dj3 are driven by controlling the signal control line of the motor driver to realize the movement and dust collection of the platform. 4.3 Main Hardware Design The system is mainly composed of FPGA main control chip, photoelectric sensor, collision switch, wireless remote control transmitter module controlled by two STC89C52 microcontrollers, two mode selection chips, acousto-optic circuit, drive motor, vacuum cleaner motor and the power supply circuit of the whole system, such as as shown in the Figure 4. Figure  4. Main Control System 🔺FPGA Chip SelectionAccording to the overall design of the platform, the basic requirements for the chip can be drawn:(1) At least 6 PWM waveform outputs are required.(2) One serial communication interface is required.(3) A real-time chip that requires a higher 12 V to be converted to 3.3 V.(4) Higher processing speed.(5) There are more I/O interfaces.Taking these conditions into consideration, the EP2C35F672C6 model in the CycloneII series FPGA produced by Altera can basically meet the requirements. It has excellent operation speed, low cost and DSP module, large internal memory, multi-channel PWM output, flexible design and comprehensive use of multiple languages, and the cost performance is relatively high.🔺Configuration Circuit Design Points(1) Power supply circuit: The power supply system uses 12V power supply as the input power supply, uses L7805CV to step down it to 5V, and then converts 5V to 3.3V and 1.2V by TPS37HD301. The power supply point of the I/O port of the FPGA is 3.3V, the core supply voltage is 1.2V. Because the motor drive system uses the 5V signal of the controller, and the port voltage of the FPGA is 3.3V, the I/O voltage must be boosted to 5V, and the 74HCT245 boost chip is used here.(2) Clock and reset circuit: ZPB-26-16 M is an active crystal oscillator in the clock circuit, and the frequency is 16MHz, which makes the serial port baud rate more accurate. At the same time, it can support the PPL function and ISP download function inside the chip. The reset circuit takes hardware reset and software reset.(3) Debug JTAG and download circuit: Because the soft core ISP and JTAG can be built directly inside the FPGA, the hardware circuit is connected to a JTAG interface of IDC-10.(4) Configuration storage circuit: EPCS16 is selected as the ROM of the FPGA, which can be repeatedly programmed by the download cable or other equipment, and can also be programmed online through the AS interface. Use the 4MHz On-Chip memory inside the FPGA chip as the RAM of the FPGA.(5) Sensor and collision switch: E3F-DS5C4.P1R photoelectric switch, used to detect obstacles and stairs, which is a cylindrical diffusion type with a maximum distance of 5cm, or an adjustable NPN type normally open photoelectric switch. The collision switch mainly cooperates with the front sensor to protect the front of the platform. When the platform hits the obstacle ahead, trigger the switch to make the platform avoid the obstacle.(6) Wireless sending and receiving module: XL02-232AP1 wireless module is a half-duplex wireless transmission module with UART interface, which can work in the 433MHz public frequency band and meet the wireless regulatory requirements.(7) Drive and vacuum motor: The platform adopts the front wheel dual drive, the motor selects the two-phase hybrid stepping type, and the vacuum cleaner motor adopts the DC motor. The main electrical parameters of the stepping motor are: ① Step angle: 1.8°② Phase current: 0.87 A③ Holding torque: 0.24 nm④ Phase resistance: 3.3 Ω⑤ Phase inductance: 5.0 mH⑥ Weight: 0.2 kg(8) Sound and light circuit and automatic cleaning time input display circuit: The sound and light circuit is mainly composed of light-emitting diodes and buzzers, which are directly connected to the FPGA to remind the working state of the platform. Use 4 buttons (OK, Initial, Up, Down) to input the cleaning time, and then three digital tubes display the set time. The cleaning time is counted by the timer inside the FPGA. When the timer is completed, the platform stops working. 4.4 Program Design Points Divide the program into two parts: hardware programming and software programming. For hardware programming, timing simulation of hardware circuits is required to determine the effect of debugging.🔺Hardware Programming and SimulationThe platform mainly generates input signals through sensors and collision switches, and processes the signals through FPGA. Finally, the FPGA transmits the processed signals to the motor, and the motor completes a series of actions, as shown in Table 1. So its logic design is the key to realize intelligence. After the hardware selection is completed, use Quartus II to build the hardware schematic diagram. After compiling, perform timing simulation on jk1, jk2, jk3, and jk4, analyze the timing relationship, estimate the performance of the design, and check and eliminate competition risks.Table 1: Relationship between Motor Status and Platform Working Status. dj1 dj2 dj3 Cleaner Status Turn Forward Turn Forward ON Vacuuming Forward Turn Back Turn Forward ON Vacuuming Left Turn Forward Turn Back ON Vacuuming Right Turn Back Turn Back ON Vacuuming Back The realization of platform work in automatic cleaning mode depends on the cooperative work of sensors (jk1, jk2, jk3, jk4) and motors (dj1, dj2, dj3), and the logical relationship is designed according to their functions.Table 2: Relationship between Sensor Status and Platform Working Status. jk1 jk2 jk3 jk4 Cleaner Status 1 1 1 1 Vacuuming Forward 1 1 0 1 Vacuuming Left 1 0 1 1 Vacuuming Right 1 0 0 1 Vacuuming Forward 0 1 0 1 Vacuuming Forward (Turn 90° Left)  0 0 1 1 Vacuuming Forward (Turn 90° Right)  0 0 0 1 Vacuuming Back When the hardware selection is completed, use Quartus II to build the hardware schematic diagram. After compiling, perform timing simulation on jk1, jk2, jk3, and jk4 to analyze the timing relationship.🔺Software ProgrammingAfter the hardware design and debugging is completed, the software system design is also carried out. Write a C program in a C language file to program the SoPC. The overall algorithm flow of the platform work is shown in Figure 5. When the platform is powered on, firstly enter the automatic cleaning and manual remote cleaning mode. After the automatic cleaning mode is selected, input the working time of the platform's automatic cleaning through the keyboard, and use the sensor to judge whether it encounters obstacles or stairs during the cleaning process. Through the interrupt, check whether the set time is reached at all times. If not, the program will return to running. However, if the set time is up, the program will end and the platform will stop working. When remote cleaning is selected, platform movement is controlled by the operator. Figure 5. Algorithm Flowchart Through hardware selection, construction and debugging, and software language writing and debugging, a simple platform has been successfully made, and various predetermined functions have been realized. Compared with similar products on the market, its structure is simpler, the cost is lower, the flexibility and scalability are stronger, and it provides a hardware-supported platform for researchers to develop more functions, which has practical value. As microprocessors continue to advance and sensing technology evolves, their performance can continue to improve and costs can continue to decline. However, in the process of simulation and implementation, it is found that its specific process algorithm is not rigorous enough, and it is necessary to continue to improve it in the future.   Ⅴ FAQ 1. What is FPGA architecture?The field-programmable gate array (FPGA) is an integrated circuit that consists of internal hardware blocks with user-programmable interconnects to customize operation for a specific application. 2. What are the parts of an FPGA?Structure of an FPGAConfigurable Logic Block (CLB)Digital Signal Processing (DSP) Slice.Transceivers.Block Random Access Memory (BRAM)Input/Output (IO) Blocks. 3. What is a basic unit of an FPGA?The configurable logic blocks (CLBs) are the basic logic unit of an FPGA. Sometimes referred to as slices or logic cells, CLBs are made up of two basic components: flip-flops and lookup tables (LUTs). 4. What is FPGA and its types?FPGA stands for Field Programmable Gate Array which is an IC that can be programmed to perform a customized operation for a specific application. They have thousands of gates. In the field of VLSI FPGAs have been very popular. 5. What is the function of FPGA?FPGAs are mainly used to design application-specific integrated circuits (ASICs). First, you design the architecture of such a circuit. Then, you use an FPGA to build and check its prototype. Errors can be corrected. 6. What is FPGA and its application?The FPGA is Field Programmable Gate Array. It is a type of device that is widely used in electronic circuits. FPGAs are semiconductor devices which contain programmable logic blocks and interconnection circuits. It can be programmed or reprogrammed to the required functionality after manufacturing. 7. What are the advantages of FPGA?FPGA advantagesLong-term availability.Updating and adaptation at the customer.Very short time-to-market.Fast and efficient systems.Acceleration of software.Real-time applications.Massively parallel data processing. 8. What is inside CLB in FPGA?A configurable logic block (CLB) is the basic repeating logic resource on an FPGA. When linked together by routing resources, the components in CLBs execute complex logic functions, implement memory functions, and synchronize code on the FPGA. 9. What are the main applications of FPGAs?Main FPGA applications are: Medical, video & image processing, telecom & datacom, server & cloud and defense and space. FPGA chips are used in both wired and wireless communications. 10. What are the industrial applications of FPGA boards?Such applications include multiple sensor dome cameras, HD (High Definition) cameras, night-vision cameras, etc. FPGAs provide the differentiation factor and the processing power to implement such complex solutions. 11. What are the applications of CPLDs and FPGAs?Applications of CPLDCPLDs can be used as bootloaders for FPGAs and other programmable systems. CPLDs are often used as address decoders and custom state machines in digital systems. Due to their small size and low power consumption, CPLDs are ideal for use in portable and handheld digital devices. 12. What programmable technology is used in a FPGA devices?FPGA emerged from relatively simpler technologies such as programmable read-only memory (PROM) and programmable logic devices (PLDs) like PAL, PLA, or Complex PLD (CPLD). It consists of three main parts: Configurable Logic Blocks — which implement logic functions. Programmable Interconnects — which implement routing. 13. What are the features of FPGA?The basic features of FPGA are: 1) FPGA design ASIC circuit, the user does not need to chip production, you can get a combination of chips. - 2) FPGA can do all other custom or semi-custom ASIC circuit of the sample sample. 3) FPGA has a rich internal trigger and I / O pin. 14. Is a FPGA a computer?An FPGA is a chip consisting of a series of logic blocks which can be modified and configured by the user. ... FPGA are programmable chips and their functionality can be updated multiple times. FPGAs come in array of size and prices and are most likely used in low-mid size volume products.

Introduction Everyone has heard of FPGA more or less, such as Bitcoin mining, or Microsoft said before that it will use FPGA instead of CPU in the data center. So what exactly is it? Why use it? Compared with CPU, GPU, and ASIC, what are the characteristics of FPGA? FPGA is a chip that can reconfigure circuits and is a hardware reconfigurable architecture. Through programming, users can change its application scenarios at any time, and it can simulate various parallel operations of hardware such as CPU and GPU. By interconnecting with the high-speed interface of the target hardware, the FPGA can complete the low-efficiency part of the target hardware, thereby achieving acceleration at the system level. What Is an FPGA? Catalog Introduction Ⅰ FPGA vs CPU vs GPU vs ASIC Ⅱ Five Advantages of FPGA 2.1 Performance 2.2 Time-to-Market 2.3 Cost 2.4 Stability 2.5 Long-Term Maintenance Ⅲ New Applications of FPGA Ⅳ Development Trend of FPGA Ⅴ FAQ Ⅰ FPGA vs CPU vs GPU vs ASIC The core difference between FPGA and CPU, GPU, ASIC chips, etc. is that the connection and logic layout of the underlying operation unit are not solidified. Users can program the logic unit and switch array through EDA software to configure the function, so as to realize the integration of specific functions.FPGA appears as a semi-custom circuit in the field of application-specific integrated circuits (ASIC), which not only solves the shortcomings of custom circuits, but also improves the limited number of original programmable device gate circuits. Compared with ASIC chips, an important feature of FPGA is its programmable characteristics, that is, the user can specify the FPGA to realize a specific digital circuit through the program. Furthermore, FPGA chips are one of the best choices for small batch systems to improve system integration and reliability. Figure 1. FPGA Basic Structure So why is FPGA so fast? This is all because the computer's CPU(central processing unit) and GPU(graphics processing unit) belong to the von Neumann structure, with instruction decoding and execution, and shared memory. FPGAs, on the other hand, are instruction-free and memory-free architectures that make FPGA chips much more energy-efficient than CPUs or even GPUs. Figure 2. Von Neumann Structure In the von Neumann architecture, since the execution unit (such as the CPU core) may execute any instruction, so an instruction memory, a decoder, an operator of various instructions, and branch and jump processing logic are required. Due to the complex control logic of the instruction stream, it is impossible to have too many independent instruction streams. Therefore, the GPU uses SIMD (single instruction, multiple data) to allow multiple execution units to process different data at the same pace, and the CPU also supports SIMD instruction. The function of each logic unit of the FPGA has been determined during reprogramming, and no instructions are required. Figure 3. Computer CPU If the GPU is used for acceleration, in order to fully utilize the GPU computing, the batch size cannot be too small, and the delay will be on the order of milliseconds. Using FPGA to accelerate, only microsecond-level PCle delay is required. Why is FPGA so much lower latency than GPU? This is basically an architectural difference. FPGAs have both pipeline parallelism and data parallelism, while GPUs have almost only data parallelism (with limited pipeline depth).For example, FPGA chips can change the running hardware design on the chip every few seconds, while chips such as CPU and ASIC are already solidified when they leave the factory and cannot be changed. If ASIC, CPU, GPU, etc. are built buildings, and the routes of rooms, corridors, and stairs in the building have been fixed, while the interior of FPGA is similar to the magic staircase in Hogwarts, which can change the route of room to room at any time. In addition, FPGA does not need to compile the instruction system at the software application level like CPU and GPU. To program FPGA, use hardware description language, and directly compile and burn it into a combination of transistor circuits, that is, directly use transistor circuits to implement user algorithms.The biggest feature of FPGA is its flexibility. It can realize any digital circuit you want and can customize various circuits. Reduce the shackles of special chips, truly tailor-made for your own products, you can flexibly change the design during the design process, and have field programmability, so it is especially suitable for applications that require continuous changes in physical operation logic, such as AI algorithm optimization, data center applications, etc. Architecture Throughput（int ops） Delay Flexibility CPU ~1T N/A Very High GPU ~10T ~1ms High FPGA(Stratix V) ~1T ~1us High FPGA(Stratix 10) ~10T ~1us High ASIC ~10T ~1us Low The FPGA is set up by the RAM stored on the chip to reset its working state, so the on-chip RAM needs to be programmed when working. Users can use different programming methods according to different configuration modes, which can be said to be very flexible and convenient. The FPGA has the following configuration modes:🔺Parallel Mode: Parallel PROM, Flash configures FPGA.🔺Master-Slave Mode: One PROM configures multiple FPGAs.🔺Serial Mode: Serial PROM configures FPGA.🔺Peripheral Mode: The FPGA is used as a peripheral of the microprocessor and programmed by the microprocessor. Computational performance compared with CPU: For example, Stratix series FPGAs perform integer multiplication operations, and their performance is equivalent to that of a 20-core CPU, and for floating-point multiplication operations, their performance is equivalent to an 8-core CPU.Computational performance compared with GPU: FPGA performs integer multiplication and floating-point multiplication operations. There is an order of magnitude difference in performance compared to GPU. The computing performance of GPU can be approached by configuring multipliers and floating-point operation components. Figure 4. CPU and GPU Architecture Diagram The core advantage of FPGA for performing computation-intensive tasks: tasks such as search engine sorting and image processing have strict requirements on the return time limit of results, and it is necessary to reduce the delay of computing steps. Under the traditional GPU acceleration scheme, the data packet size is large, and the delay can reach the millisecond level. Under the FPGA acceleration scheme, the PCIe latency can be reduced to the microsecond level. Driven by long-term technology, the data transmission delay between CPU and FPGA can be reduced to less than 100 nanoseconds.The FPGA can build the same number of pipelines (pipeline parallel structure) for the number of data packet steps, and the data packets can be output immediately after being processed by multiple pipelines. The GPU data parallel mode relies on different data units to process different data packets, and the data units need to be input and output consistently. For stream computing tasks, the FPGA pipeline parallel structure has a natural advantage in latency. FPGA is used to process communication-intensive tasks and is not limited by network cards. It outperforms CPU solutions in terms of packet throughput and delay, and has strong delay stability. Therefore, FPGAs have obvious advantages over CPUs when performing large data processing tasks with high repetition rates.By programming the FPGA, the user can change the internal connection structure of the chip at any time to realize any logic function. Especially in industries with immature technical standards or rapid development and change, FPGA can effectively help enterprises reduce investment risks and sunk costs, and is a functional and economical choice. Figure 5. Computer GPU With the evolution of intelligent market demand, highly customized chips (ASIC SoC) have led to a sharp increase in market risks due to the large scale of non-repetitive investment and long R&D cycle. Relatively speaking, FPGA has advantages in the field of parallel computing tasks, and can replace some ASICs in the field of high performance and multi-channel. The demand for multi-channel computing tasks in the field of artificial intelligence (AI) drives the evolution of FPGA technology to the mainstream. Figure 6. ASIC SoC Ⅱ Five Advantages of FPGA 2.1 Performance Taking advantage of hardware parallelism, FPGAs break the sequential execution model and complete more processing tasks per clock cycle, surpassing the computing power of digital signal processors (DSPs). BDTI(Big Data Test Infrastructure), a well-known analysis and benchmarking company, has published benchmarks that show that in some applications, FPGAs can handle many times more processing power per dollar than DSP solutions. Controlling input and output (I/O) at the hardware level provides faster response times and specialized functionality to meet application needs. 2.2 Time-to-Market Despite increasing time-to-market constraints, FPGA technology offers flexibility and the ability to rapidly prototype. Users can test an idea or concept and complete verification in hardware without going through the lengthy manufacturing process of custom ASIC design. This allows users to make incremental modifications and iterate FPGA designs in hours, saving weeks. Commercial off-the-shelf (COTS) hardware provides different types of I/O connected to user-programmable FPGA chips. The increasing popularity of high-level software tools reduces the learning curve and abstraction layers, and often provides useful IP cores (pre-built functions) for advanced control and signal processing. 2.3 Cost The non-recurring engineering (NRE) cost of custom ASIC design far exceeds the cost of FPGA-based hardware solutions. The huge initial investment in ASIC design shows that OEMs need to ship thousands of chips each year, but more end users need custom hardware capabilities that enable the development of tens to hundreds of systems. The nature of programmable chips means that users can save on manufacturing costs as well as long lead times for assembly. System requirements change from time to time, but the cost of changing the FPGA design is negligible compared to ASCI's huge expense. 2.4 Stability Software tools provide the programming environment, and FPGA circuits are the real "hard" implementation of programming. Processor-based systems often contain multiple layers of abstraction that can schedule tasks and share resources among multiple processes. The driver layer controls hardware resources, while the operating system manages memory and processor bandwidth. For any given processor core, only one instruction can be executed at a time, and processor-based systems face the risk of tightly time-bound tasks taking over each other at all times. FPGAs, on the other hand, do not use an operating system, and have true parallel execution and deterministic hardware that focuses on each task, reducing the chance of stability issues. 2.5 Long-Term Maintenance As mentioned above, FPGA chips are field-upgradable without the time and expense involved in redesigning ASICs. For example, digital communication protocols contain specifications that can change over time, and ASIC-based interfaces can create maintenance and forward compatibility difficulties. Reconfigurable FPGA chips can accommodate future modifications. As a product or system matures, users can enhance functionality without spending time redesigning hardware or modifying board layouts.   Ⅲ New Applications of FPGA At present, the FPGAs mainly produced by Xilinx and Altera with the highest market share, which are all based on SRAM technology, and need to be connected to an external memory to save the program when in use. When powered on, the FPGA reads the data in the external memory into the on-chip RAM, and after completing the configuration, it enters the working state. When power off, the FPGA returns to a white chip, and the internal logic disappears. In this way, the FPGA can not only be used repeatedly, but also does not require a special programmer, but only a general EPROM and PROM programmer. So Actel, QuickLogic and other companies also provide FPGAs with anti-fuse technology, which can only be downloaded once. They have the advantages of anti-radiation, high & low temperature resistance, low power consumption and fast speed. They are widely used in military and aerospace fields. FPGA cannot be erased and written repeatedly, which is troublesome and expensive in the early stage of development. Lattice is the inventor of ISP technology, which has certain characteristics in small-scale PLD applications. Early Xilinx products generally did not involve military and aerospace markets, but now a number of products such as Q Pro-R have entered such fields.In the industrial field, FPGA chips are widely used in the industrial field, and are widely used in video processing, image processing, CNC machine tools and other fields to realize signal control and operation acceleration functions. With the development of intelligence and automation technology, the industrial field is gradually shifting from human resources as the core element to intelligent unmanned factories with automation as the core element.Smart electric vehicles will be the mainstream development direction of the automotive industry in the future. At present, the application of FPGA in automotive cameras and sensors is relatively mature. In the artificial intelligence system of automatic/intelligent driving vehicles, the applicability of FPGA will be the most suitable for processing sophisticated ADAS and autonomous driving. Figure 7. FPGA for Auto In the field of automotive electronic system interface and control, FPGA chips are used to control and drive electric vehicle motor control systems, connect various in-vehicle equipment such as driving systems, instrument panels, radar, ultrasonic sensors, etc. control. In the field of video bridging and fusion, FPGA chips can be used to realize functions such as signal bridging of multiple image sensors, 3D surround view video fusion, reversing auxiliary video, and assisted driving video.In the field of communication, the number of 5G base stations has increased, and the FPGA usage of a single base station has increased, driving the increase in FPGA demand. According to estimates, the FPGA consumption of a 5G single base station is expected to increase from 1-3 blocks in the 4G period to 4-5 blocks in the 5G period. Figure 8. RFSoC FPGA Board Target 5G eFPGA technology is superior to traditional FPGA solutions in terms of performance, cost, power consumption, profitability, etc., and can provide flexible solutions for different application scenarios and different market segments. The economic trend of increasing design complexity and falling equipment costs has stimulated the market demand for eFPGA technology.   Ⅳ Development Trend of FPGA First of all, with the commercialization of the new generation of communication technology, the demand for products such as communication base stations, servers, and intelligent terminals will further expand, thereby driving the increase in the market demand for FPGA chips. At the same time, smart cities, smart factories, and consumer electronics pay more attention to the functionality of various smart IoT devices, which will drive the wide application of FPGA chips in smart IoT devices. With the development of the Internet of Vehicles technology, the scale of the use of FPGA chips in the automotive industry will increase day by day to build a more complete Internet of Vehicles and realize smarter autonomous driving functions. Therefore, with the rapid penetration of 5G, the vigorous development of AI and the increasing trend of automotive intelligence, it is expected that the demand for FPGAs in the three fields of communication, AI and automotive electronics will continue to increase in the future, which will also promote The FPGA industry continues to grow.   Ⅴ FAQ 1. What is FPGA and why it is used?The acronym FPGA stands for Field Programmable Gate Array. It is an integrated circuit that can be programmed by a user for a specific use after it has been manufactured. ... These blocks create a physical array of logic gates that can be customized to perform specific computing tasks. 2. Is FPGA faster than GPU?The difference between GPU and FPGA performance is not a static factor, but it does depend on the size of the data set. A study by Sanaullah and Herbordt [7] revealed that FPGA can compute small samples of 3D FFT tens of times faster than GPU. The difference is less clear when the data set gets bigger. 3. Is FPGA faster than CPU?A FPGA can hit the data cell faster and more often than a CPU can do it meaning the FPGA causes more results to occur during an attack. It all goes faster when an FPGA is used. And as a side benefit, no trace of all this is left on the CPU because it's never touched when an FPGA is used. 4. Are FPGAs efficient?Efficiency and Power: FPGAs are well-known for their power efficiency. A research project done by Microsoft on an image classification project showed that Arria 10 FPGA performs almost 10 times better in power consumption. 5. Is FPGA programming hard?FPGA vendors have touted their wares as ideal replacements for DSPs, CPUs, and GPUs – even for all of them in a single device – but they are notoriously difficult for software engineers to program as they are not anything like a conventional processor. 6. What can you do with FPGAs?Uses for FPGAs cover a wide range of areas—from equipment for video and imaging, to circuitry for computer, auto, aerospace, and military applications, in addition to electronics for specialized processing and more. 7. What is the difference between processor and FPGA?Microprocessor vs FPGA: A microprocessor is a simplified CPU or Central Processing Unit. ... An FPGA doesn't have any hardwired logic blocks because that would defeat the field programmable aspect of it. An FPGA is laid out like a net with each junction containing a switch that the user can make or break. 8. What language is used to program FPGA?VerilogTraditionally, FPGAs are programmed using pro-level hardware-description languages such as Verilog or VHDL. 9. How many times can you program an FPGA?There is effectively no limit to the number of times a device can be reconfigured; the configuration is stored in SRAM, which has no write limit. most Fpgas can be passively loaded from a processor, one word at a time. That processor can get the FPGA image from anywhere. 10. What are the advantages of FPGA?FPGA advantagesLong-term availabilityUpdating and adaptation at the customerVery short time-to-marketFast and efficient systemsAcceleration of softwareReal-time applicationsMassively parallel data processing 11. How do you make an FPGA?FPGA design checklistMake sure you have plenty of time to spare.Find a decent computer.If you can afford it, add a big display.Decide which operating system to use.Consider using a virtual machine (VM).Select an FPGA vendor.Pick out a suitable development board.Select an embedded processor to use. 12. What is FPGA for beginners?FPGA stands for Field Programmable Gate Array. As you may already know, FPGA essentially is a huge array of gates that can be programmed and reconfigured any time anywhere. Huge array of gates is an oversimplified description of FPGA. FPGA is indeed much more complex than a simple array of gates. 13. What is FPGA in Verilog?FPGAs are nothing, but reconfigurable logic blocks and interconnects can be programmed by Hardware Description Language like Verilog/ VHDL to perform a specific functionality. 14. Do we need to program the FPGA once powered off?If you have a SRAM-based FPGA, like the Spartan 3, then you have to program it each time it is powered up. The reason for this is that the SRAM which stores the configuration is volatile and loses the programmed configuration after power is switched off. 15. How is FPGA different from microcontroller?One of the main differences between a microcontroller and an FPGA is that an FPGA doesn't have a fixed hardware structure, while a microcontroller does. While FPGAs include fixed logic cells, these, along with the interconnects, can be programmed in parallel by using HDL coding language.

Introduction In the computer field, a buffer refers to a buffer register, which is divided into two types: input buffer and output buffer. The function of the former is to temporarily store the data sent by the peripheral so that the processor can take it away; the latter is to temporarily store the data sent by the processor to the peripheral. With the numerical control buffer, the high-speed CPU and the slow-speed peripherals can coordinate and buffer to realize the synchronization of data transmission. Since the buffer is connected to the data bus, it must have a three-state output function. Catalog Introduction Ⅰ Three-State Buffer Meaning Ⅱ Buffers in the Java Language 2.1 Buffer 2.2 Data Transmission 2.3 Mark and Reset 2.4 Invariants 2.5 Clear Reverse Rewind 2.6 Read-Only Buffer 2.7 Thread Safety 2.8 Call Chain Ⅲ EDA Code Ⅳ Verilog HDL Model and Simulation of Tri-state Buffer 4.1 Tri-state Buffer IC 4.2 Application Example of 74LS541 as Input Port 4.3 Multiplexer (MUX) Ⅴ FAQ Ⅰ Three-State Buffer Meaning Three-state buffer (tri-state buffer), also known as three-state driver, its three-state output is controlled by the enable output terminal. When the enable output is valid, the device realizes normal logic state output (logic 0, logic 1); when the enable input is invalid, the output is in a high-impedance state, which is equivalent to disconnecting from the connected circuit. Figure 1. Tristate Buffers A buffer is one of the digital components, it does not perform any operation on the input value, and its output value is the same as the input value. It plays an important role in the design of the computer. There are two types of buffers. In addition to tri-state buffers, there are also conventional buffers (regular buffers).Conventional buffers always output the value directly, which is used to output current to higher-level circuitry. The tri-state buffer has an optional card input, denoted by E, in addition to the functions of a conventional buffer. E=0 and E=1 have different output values. Figure 2. Tristate Buffer Symbols When E=1, it is gated, and its input is directly sent to the output.If E=0, the buffer is blocked. No matter what value is input, the output is always high impedance. The high-impedance state can drop the current low enough that the buffer-like output is not connected to anything.In the design of the CPU, the DC load capacity of the general output line can drive a TTL load, and in the connection, an address line or data line of the CPU may be connected to multiple memory chips, but the memory chips are all MOS circuits. It is a capacitive load, and the DC load is much smaller than the TTL load. Therefore, in a small system, the CPU can be directly connected to the memory, but a buffer needs to be added in a large system.In order to reduce the number of information transmission lines, the information transmission lines in most computers are in the form of buses, that is, all the same type of information to be transmitted goes through the same group of transmission lines, and the information is transmitted in time-sharing. There are generally three groups of buses in the computer, namely the data bus, the address bus and the control bus. In order to prevent information from interfering with each other, it is required that any register or memory hung on the bus, etc., its transmission end can not only show two information states of 0 and 1, but also should be able to show a third state-high impedance state. That is, it seems that their outputs are disconnected at this time, which has no effect on the bus state, and the bus can be occupied by other devices at this time. The above functions can be realized. In addition to the input and output terminals, it also has a control terminal, please see the figure below. Figure 3. Three-state Output Buffer Register When E=1, the output=input, the bus is driven by the device at this time, and the data on the bus is determined by the input data.When E=0, the output terminal is in a high-impedance state, and the device has no effect on the bus. When the output terminal of the register is connected to the three-state gate, and then the output terminal of the three-state gate is connected with the bus, the stage-rush register of the three-state output is formed. Since the one-way tri-state gate is used here, the data can only be output from the register to the data bus. If you want to achieve bidirectional transmission, you will use a bidirectional tri-state gate. Figure 4. Three-state Gate Ⅱ Buffers in the Java Language 2.1 Buffer Directly known subclasses of java.nio.Buffer: ByteBuffer, CharBuffer, DoubleBuffer, FloatBuffer, IntBuffer, LongBuffer, ShortBuffer public abstract classBufferextendsObject. A container for data of a specific basic type.A buffer is a linear finite sequence of elements of a particular primitive type. In addition to content, the basic properties of a buffer include capacity, limitation, and location.1) The capacity of a buffer is the number of elements it contains. The capacity of the buffer cannot be negative and cannot be changed.2) The limit of the buffer is the index of the first element that should not be read or written. A buffer's limit cannot be negative and cannot be larger than its capacity.3) The position of the buffer is the index of the next element to be read or written. The buffer's position cannot be negative and cannot be larger than its limit. This class has a subclass for each non-boolean primitive type. 2.2 Data Transmission Each subclass of this class defines two get and put operations:A relative operation reads or writes one or more elements, starting at the current position and incrementing the position by the number of elements transferred. If the requested transfer exceeds the limit, a relative get operation will throw a BufferUnderflowException, and a relative put operation will throw a BufferOverflowException. In both cases, no data is transferred.Absolute operations take explicit element indices, which do not affect position. Absolute get and put operations will throw IndexOutOfBoundsException if the index parameter exceeds the limit. Of course, I/O operations through the appropriate channel (usually related to the current position) can also transfer data to and from the buffer. 2.3 Mark and Reset The mark is an index to which the buffer's position is reset when the reset method is called. It is not always necessary to define a marker, but when defining a marker, you cannot define it as a negative number, and you cannot make it larger than the position. If a marker is defined, it will be discarded when the position or limit is adjusted to a value less than the marker. Calling the reset method will cause an InvalidMarkException to be thrown if the mark is not defined. 2.4 Invariants Mark, position, limit, and capacity values obey the following invariants:0<=mark<=position<=limit<=capacity, newly created buffers always have a 0 position and an undefined mark. The initial limit can be 0 or some other value, depending on the buffer type and how it is built. In general, the initial contents of the buffer are undefined. 2.5 Clear Reverse Rewind In addition to methods for accessing position, limitation, capacity values, and methods for marking and resetting, this class defines the following operations that can be performed on buffers.clear() prepares the buffer for a series of new channel reads or relative put operations. It sets the limit to the capacity size and the position to 0.flip() prepares the buffer for a series of new channel write or relative get operations. It sets the limit to the current position, then the position to 0.rewind() prepares the buffer for rereading already contained data. It leaves the limit unchanged, setting the position to 0. 2.6 Read-Only Buffer Every buffer is readable, but not every buffer is writable. The mutate method of each buffer class is designated as an optional operation and will throw a ReadOnlyBufferException when called on a read-only buffer. A read-only buffer does not allow changes to its contents, but its tag, position, and limit values are mutable. Its isReadOnly method can be called to determine whether the buffer is read-only. 2.7 Thread Safety It is not safe for multiple current threads to use the buffer. If it is used by more than one thread, access to that buffer should be controlled through appropriate synchronization. 2.8 Call Chain Specifies that methods in this class return the buffer on which they were called (otherwise they would return no value). This operation allows method calls to be formed into a chain, like a sequence of statementsb.flip(); b.position(23); b.limit(42); can be replaced by the following short statement b.flip().position(23).limit(42);   Ⅲ EDA Code library ieee;use IEEE.STD_LOGIC_1164.all;ENTITY BUF3S ISPORT (INPUT:IN STD_LOGIC;ENABLE:IN STD_LOGIC;OUTPUT:OUT STD_LOGIC);END BUF3S;ARCHITECTURE BHV OF BUF3S ISBEGINPROCESS(ENABLE,INPUT)BEGINIF ENABLE='1'THEN OUTPUT<=INPUT;ELSE OUTPUT<='Z';END IF;END PROCESS;END BHV;   Ⅳ Verilog HDL Model and Simulation of Tri-state Buffer Figure 5. Verilog HDL Model and Simulation of Tristate Buffer 4.1 Tri-state Buffer IC Tristate buffers are often used for multiple data sources to share a (group) common line (bus). Figure 6. For Multiple Data Sources When all enable terminals of the decoder are valid, the combination of SS2~SS0 makes only one of /SELP~/SELW valid at the same time, so that one of the 8 data sources P~W drives SDATA. When the enable terminal is invalid, then none of the three-state gates are enabled, and the outputs are all high impedance.The MSI device 74LS541 contains 8 independent tri-state gates and shares two enable inputs. The logic diagram and logic symbols are as follows: Figure 7. 74LS541 Logic Diagram and Logic Symbol 4.2 Application Example of 74LS541 as Input Port Figure 8. Application Example of 74LS541 as Input Port The MSI device 74LS245 is an 8-bit tri-state bus transceiver with an enable output G and a direction selection input DIR to determine the transmission direction: when DIR=1, data is transmitted from A to B; when DIR=0, data is transmitted from B passed to A. The logic diagram and logic symbols are as follows: Figure 9. 74LS245 Logic Diagram and Logic Symbol   Figure 10. Bus   Figure 11. Verilog HDL Model of 8-bit Tri-state Bus Transceiver 4.3 Multiplexer (MUX) Multiplexers are also called data selectors, and are often abbreviated as MUX. It is a combinational logic circuit with multiple inputs and single outputs, denoted as n/1 or n-1.Logic function: Since the enable terminal EN is valid., when selecting the control variable, select one of the multiple input data to the output terminal. Figure 12. MUX Each value group of the n selection control variables corresponds to select one of the m=2n input data and then send it to the output terminal.Design of Commonly Used Multiplexers🔺8 to 1 Multiplexer Figure 13. 8 to 1 Multiplexer Function Description   Figure 14. 8 to 1 Logic Circuit Diagram Circuit package, Logic symbol Figure 15. Circuit Package   Figure 16. Logic Symbol 1 Out of 8 Verilog HDL Models Figure 17. 1 Out of 8 Verilog HDL Model   Figure 18. 8 Out of 1 Functional Simulation 🔺8 Out of 1 Multiplexer with Tri--state Output Figure 19. Function Description   Figure 20. 8 to 1 Logic Circuit Diagramof Three-state Output Circuit Package, Logical Symbol Figure 21. 74LS251 Circuit Package and Logical Symbol 1 Out of 8 Verilog HDL Model for Tri-state Output Figure 22. Verilog HDL Model Ⅴ FAQ 1. What is a buffer software?A reserved segment of memory within a program that is used to hold the data being processed. Buffers are set up in every program to hold data coming in and going out. In a video streaming application, the program uses buffers to store an advance supply of video data to compensate for momentary delays. 2. Is buffer safe to use?Buffer is a reliable, fast way to manage multiple social media accounts, from a user-friendly dashboard. 3. Why do we need buffering in OS?Computers have many different devices that operate at varying speeds, and a buffer is needed to act as a temporary placeholder for everything interacting. This is done to keep everything running efficiently and without issues between all the devices, programs, and processes running at that time. 4. Is a buffer hardware or software?A buffer is a data area shared by hardware devices or program processes that operate at different speeds or with different sets of priorities. The buffer allows each device or process to operate without being held up by the other. This term is used both in programming and in hardware. 5. What is tri-state buffer?A tri-state buffer is a logic inverter or a non-inverting buffer with a tri-state output stage. ... When the enable line is not activated the buffer output stage has a high output impedance (i.e., the Z state, as described above in section 10.15) and transmission of data is prevented. 6. What is the difference between buffer and tri-state buffer?A tri-state buffer is similar to a buffer, but it adds an additional "enable" input that controls whether the primary input is passed to its output or not. If the "enable" inputs signal is true, the tri-state buffer behaves like a normal buffer. 7. What is meant by tri-state buffer how it helps in reading and writing data from a register?Definition: A three-state bus buffer is an integrated circuit that connects multiple data sources to a single bus. The open drivers can be selected to be either a logical high, a logical low, or high impedance which allows other buffers to drive the bus. 8. What is tri-state TTL?Tri-state gates have additional circuitry via which the gate outputs can be enabled or disabled. This is very useful in digital systems where devices communicate via common wires called busses. Only one device can talk at a time; the others are disabled. 9. Which of the following is also known as tri-state?Explanation: The progression in the parallel ports provides a third register or an individual control bit which can make the pin in a high impedance state. An output port which can do this is also known as tri-state, that is, logic high, logic low and a high impedance state. 10. What is tri-state in microprocessor?Tristate means three states viz. Logic 0, Logic 1 and high impedance states. In high impedance state, the pin neither connected to supply nor to ground. Hence impedance at this pin is very high with respect to suppy as well as ground. Some pins of 8085 have three states. 11. How many buffer may active at any given time?At any one time, one buffer is actively being displayed by the monitor, while the other, background buffer is being drawn. 12. What is tri-state circuit?Tristate means a digital circuit output that can have 3 states: 0, 1 and High-Z or high impedance which is the circuit equivalent of “disconnected”. There are times when you want to have multiple digital circuits connected on a bus but not interfering with each other.

Introduction As a power semiconductor device, IGBT(insulated-gate bipolar transistor) is widely used in the fields of rail transit, smart grid, industrial energy saving, electric vehicles and new energy equipment. It has the characteristics of energy saving, convenient installation and easy maintenance, and stable heat dissipation. It is the core device for energy conversion and transmission. A brief overview, IGBT can be said to be a combination of MOSFET(metal–oxide–semiconductor field-effect transistor) and BJT(bipolar junction transistor). That is, it combines the gate voltage control transistor (high input impedance) of the MOSFET, and uses the dual carriers of the BJT to achieve the purpose of large current (voltage-controlled bipolar device). So what is the internal structure of such a combination? This article will explain in detail with examples. What is IGBT and Its Applications Catalog Introduction Ⅰ IGBT Module Explained Ⅱ IGBT Internal Structure Ⅲ IGBT Internal Current Flow Ⅳ How to Disassemble IGBT Module? Ⅴ FAQ Ⅰ IGBT Module Explained The model of the IGBT module to be disassembled as an example is: FF1400R17IP4. The appearance and equivalent circuit of the module are shown in Figure 1. The length, width and height of this module are: 25cmx8.9cmx3.8cm. The module contains two IGBTs, which are what we often call half-bridge modules. The rated voltage and current of each IGBT are 1.7kV and 1.4kA. Figure 1. FF1400R17IP4 Part 8, 9, 10, 11, and 12 are power terminals and need to be connected to a power circuit.1, 2, 3, 4, and 5 are auxiliary control terminals, which need to be connected to the gate drive circuit.6 and 7 are NTC thermistors, used for temperature detection or over-temperature protection.After having a general understanding of its structure, what can we do with such a black module with this structure? Take an example around us: new electric vehicles, everyone should be familiar with it. Three such black modules can be used as a three-phase motor driver. If it is equipped with a battery, it can drive an electric bus. Of course, this module is also used in many other applications. Figure 2. IGBT in Electric Bus   Ⅱ IGBT Internal Structure After having a preliminary understanding of the external structure and application of the IGBT module, let us enter the subject of this article to see what the inside of this high-tech black module looks like. Figure 3 is the internal picture of the IGBT module with the black casing removed. It should be noted that the most common copper and aluminum are inside the IGBT module. Figure 3. IGBT Internal Structure Figure 4 is a cross-sectional view of the IGBT module. If the black casing and external connection terminals are removed, the IGBT module mainly contains 3 components, the heat dissipation substrate, the DBC substrate and the silicon chip (including the IGBT chip and the Diode chip), and the rest is mainly solder layers and interconnecting wires are used to connect IGBT chips, Diode chips, power terminals, control terminals and DBC(Direct Bond Copper). Below we will briefly introduce each part. Figure 4. IGBT Section View ① Heat Sink SubstrateThe bottom of the IGBT module is the heat dissipation substrate, the main purpose is to quickly transfer the heat generated by the IGBT switching process. Since copper has better thermal conductivity, the substrate is usually made of copper, and the thickness of it is 3-8mm. Of course, there are also substrates made of other materials, such as aluminum silicon carbide (AlSiC), both of which have their own advantages and disadvantages. ② DBCDBC (Direct Bond Copper) is a ceramic surface metallization technology, which contains 3 layers. Have a ceramic insulating layer in the middle and a copper clad layer above and below respectively, as shown in Figure 5(a). Simply put, it is to cover both sides of an insulating material with a copper layer, and then etch a pattern that can carry current on the front side, and the back side must be directly soldered to the heat sink substrate. Figure 5. BDC Base vs PCB The main function of DBC needs to ensure the electrical insulation capacity between the silicon chip and the heat dissipation substrate and good thermal conductivity, while also providing a certain current transmission capacity. The DBC substrate is similar to a 2-layer PCB circuit board. The insulating material in the middle of the PCB is generally FR4, while the commonly used ceramic insulating materials for DBC are aluminum oxide (Al2O3) and aluminum nitride (AlN).For the IGBT module analyzed in this article, there are 6 DBCs inside, and each has 4 IGBT chips and 2 Diode chips. Among them, 2 IGBT chips and 1 Diode chip are used as the upper tube, and the rest are used as the lower tube. As shown in Figure 6. Figure 6. DBC Diagram and Equivalent Circuit ③ IGBT ChipThe IGBT chip model used inside the module is: IGCT136T170. The manual can be downloaded from Infineon official website. Figure 7 shows the top view and basic parameters of the IGBT chip. The gate and emitter of the IGBT are above the chip (front side), and the collector is below (back side). The thickness of the chip is 200um. After the IGBT powers on, the current flows from bottom to top, so the IGBT of this structure can also be called a vertical device. Chip Type VCE ICn1) Die Size IGC136T170S8RH2 1700A 117.5A 17.72×7.7mm2 Figure 7. IGBT Chip Diagram If you make a vertical cut on the 200um chip, you can get the internal structure shown in Figure 8, which is a combination of P-type or N-type semiconductors with different doping. Figure 8 shows the well-known equivalent circuit of an IGBT, which is usually understood as a MOS-controlled PNP transistor. When start to learn about power electronics, you may feel that this picture is a bit strange. Why not draw the collector on the top and the emitter on the bottom? Until you understand that the IGBT current flows from bottom to top, it is not difficult to explain. Figure 8. IGBT Chip Structure and Equivalent Circuit Let’s have a general understanding of the electrical parameters of this IGBT chip. This chip can pass a DC current of 117.5A at 100°C. It can be seen from Figure 4 that a single IGBT device inside the module contains a total of 12 IGBT chips, so the total current is: 117.5*12=1412A, which is basically the same as the 1400A rated current in the IGBT module manual.In order to ensure the current sharing effect between IGBT chips, a 11.5Ω resistor has been integrated inside the gate of each chip. At the same time, considering the current sharing between the DBCs, the two chips on each DBC share a gate resistor externally, as shown in Figure 10. When measuring it with a multimeter, and the resistance is about 4.13Ω. You can calculate it in conjunction with Figure 9 to see if it is consistent with the 1.6Ω in the IGBT module manual. Of course, you can refer to the official manual for more detailed parameters of the IGBT chip. Figure 9. IGBT Equivalent Circuit ④ Diode ChipFigure 10 is a top view of the Diode chip, with the anode on the front and the cathode on the back. The current direction of the diode is from top to bottom, which is exactly the opposite of the current direction of the IGBT. The rated current of the diode chip is 235A, and each IGBT is composed of 6 diodes in parallel, and the total current can reach 1410A, which is basically the same as the 1400A in the module manual. The thickness of diode chip is the same as IGBT, it is also 200um. For more detailed parameters of the diode chip, please refer to the official manual. Chip Type VR IFn1) Die Size SIDC130D170H 1700A 235A 16.3×8mm2 Figure 10. Diode Diagram Such a thin semiconductor material can have kV voltage and hundreds of amperes of current on and off, it’s amazing. This is why the price of high-power semiconductor devices is so very expensive.The upper copper layer interconnection of IGBT chip, Diode chip and DBC is generally realized by bonding wires. Commonly used bonding wires are aluminum wire and copper wire. Among them, the aluminum wire bonding process is mature and the cost is low, but the electrical and thermodynamic properties of the aluminum wire bonding are poor, and the expansion coefficient mismatch is large, which affects the service life of the IGBT. The copper wire bonding process has the advantages of excellent electrical and thermodynamic properties, high reliability, and is suitable for modules with high power density and efficient heat dissipation.   Ⅲ IGBT Internal Current Flow After having a basic understanding of the internal structure of the IGBT module, let us go back and interconnect all the above components to see how the current flows inside the IGBT module. Here we take the upper tube IGBT in one of the DBCs as an example to illustrate the current flow. Red represents the current direction of the upper tube IGBT (S1 and S2), and blue represents the current direction of the diode D1. Figure 11(b) is a left cross-sectional view and a schematic diagram of the current direction of the module of Figure . Figure 11(a). IGBT Current Flow Figure 11(b). IGBT Current   Ⅳ How to Disassemble IGBT Module? Some friends may be curious about how to disassemble this module, but it is actually very simple. You only need to prepare two screwdrivers and a small hammer. Figure 12. IGBT Disassemble Step 1: Unscrew the 4 screws at the bottom of the IGBT module.Step 2: Use a flat-blade screwdriver to pry open all the terminals on the front of the IGBT module. This step is very important. It is necessary to ensure that all the terminals after being pried are vertical to the module substrate.Step 3: You need to fix the IGBT in one place, or use a flat-blade screwdriver to align any position of the connection between the plastic casing of the IGBT module and the substrate, hit the screwdriver with a hammer, and pry the casing from the substrate with the screwdriver. After prying open one position, place something on it, and then pry another position, repeat that, after slowly prying open, just pry open with your hands directly.   Ⅴ FAQ 1. What is IGBT module?An IGBT is a is power semiconductor die and is the short form of insulated-gate bipolar transistor. ... An IGBT power module functions as an electronic switching device. By alternate switching direct current (DC) can be transformed to alternating current (AC) and vice versa. 2. How does IGBT module work?The IGBT combines the simple gate-drive characteristics of power MOSFETs with the high-current and low-saturation-voltage capability of bipolar transistors. The IGBT combines an isolated-gate FET for the control input and a bipolar power transistor as a switch in a single device. 3. What is the purpose of IGBT?The IGBT combines, in a single device, a control input with a MOS structure and a bipolar power transistor that acts as an output switch. IGBTs are suitable for high-voltage, high-current applications. They are designed to drive high-power applications with a low-power input. 4. How many layers are there in IGBT?Working of IGBTIGBT is constructed with 4 layers of semiconductor sandwiched together. The layer closer to the collector is the p+ substrate layer above that is the n- layer, another p layer is kept closer to the emitter and inside the p layer, we have the n+ layers. 5. Which are the terminals of IGBT?The three terminals of IGBT are Gate, Collector and Emitter. 6. How many terminals Mosfet has?four terminalsThe MOSFET has four terminals: drain, source, gate, and body or substrate. 7. What is the function of injecting layer in IGBT?The p+ substrate is also called injector layer because it injects holes into n- layer. The n- layer is called drift region. The next p layer is called the body of IGBT. The n- layer in between the p+ & p region serves to accommodate the depletion layer of pn- junction i.e. J2. 8. Can I replace IGBT with MOSFET?Due to the higher usable current density of IGBTs, it can usually handle two to three times more current than a typical MOSFET it replaces. This means that a single IGBT device can replace multiple MOSFETs in parallel operation or any of the super-large single power MOSFETs that are available today. 9. What are the three terminals of an IGBT and how does it function?The IGBT (insulated gate bipolar transistor) is a three-terminal electronic component, and these terminals are termed as emitter (E), collector(C) and gate(G). Two of its terminals namely collector and emitter are associated with a conductance path and the remaining terminal 'G' is associated with its control. 10. What is an IGBT describe its construction?IGBT – Working, Types, Structure, Operation & Applications. ... The IGBT (Insulated Gate Bipolar Transistor) takes the best parts of both BJT and MOSFET into a single transistor. It takes the input characteristics (high input impedance) of MOSFET (Insulated Gate) and the output characteristics of BJT (Bipolar nature). 11. How does IGBT convert DC to AC?The IGBT act as a switch (when a signal is applied to the gate, they turn on and then turn off when the signal is removed). By closing Q1 and Q4, a positive d.c. supply is applied to the load. Q2 and Q3 will result in a negative d.c. supply across the load. 12. What is the advantage of IGBT?The main advantages of IGBT over a Power MOSFET and a BJT are: It has a very low on-state voltage drop due to conductivity modulation and has superior on-state current density. So smaller chip size is possible and the cost can be reduced. 13. What is drift layer in IGBT?The drift region (electric field or movement of charge) of the IGBT works as a base of the PNP transistor . The current gain of the transistor depends upon the width and doping level of the transistor. 14. What is the structure of IGBT?The structure of IGBT is very much similar to that of PMOSFET, except one layer known as injection layer which is p+ unlike n+ substrate in PMOSFET. This injection layer is the key to the superior characteristics of IGBT. Other layers are called the drift and the body region. The two junctions are labeled J1 and J2. 15. What are the advantages of IGBTs?Advantages of IGBT:Simple drive circuitLow on-resistanceHigh voltage capacityFast switching speedEasy of driveLow switching lossLow on stage power dissipationLow gate drive requirement 16. Why IGBT is very popular nowadays?With its lower on-state resistance and conduction losses as well as its ability to switch high voltages at high frequencies without damage makes the Insulated Gate Bipolar Transistor ideal for driving inductive loads such as coil windings, electromagnets and DC motors. 17. Why diode is used in IGBT?We know that MOSFET or IGBT is a unidirectional device, they only conduct current in forward bias and block the current in reverse bias. ... For this reason, an external diode is connected across the MOSFET or IGBT or SCR to provide a path for reverse current.

ⅠIntroductionThyristors are high-speed solid-state devices that can control motors, heaters, and lighting. Before we get into Thyristor Circuits. We'll look at the basic construction and operation of the Silicon Controlled Rectifier, also known as a Thyristor. Next, we'll look at how we can use thyristors and thyristor switching circuits to control much larger loads like lamps, motors, or heaters, among other things. CatalogⅠIntroductionⅡ Thyristors Circuits Related VideoⅢ What Is Silicon Controlled Rectifier?Ⅳ Construction of Silicon Controlled RectifierⅤ What is a Thyristor?Ⅵ Thyristor Switching Circuits6.1 Thyristor Circuit in DC6.2 AC Thyristor CircuitⅦ How an SCR Circuit Works with Thyristor Circuits?7.1 DC Thyristor / SCR Circuit7.2 Basic AC Thyristor / SCR Circuit7.3 AC SCR Circuit with Gate Phase ControlⅧ FAQ Ⅱ Thyristors Circuits Related VideoSilicon Control Rectifier SCR Basic AC Circuit Thyristors Circuits Video Description:  Silicon Control Rectifier SCR Basic AC Circuit Ⅲ What Is Silicon Controlled Rectifier?The Silicon Controlled Rectifier (SCR) is one of the most popular devices in the market. SCR can be found in a variety of applications such as rectification, power regulation, and inversion, among others. SCR, like a diode, is a unidirectional device that allows current in one direction but opposes it in the other gate. SCRs have the ability to turn ON or OFF, and their switching is controlled by biasing conditions and the gate input terminal.By varying the ON periods of the SCR, the average power delivered at the load can be varied. It is capable of handling tens of thousands of voltages and currents. Figure depicts the SCR symbol and its terminals.Figure1 :Silicon Controlled Rectifier   Ⅳ Construction of Silicon Controlled RectifierAs shown in the figure, an SCR has three terminals: anode, cathode, and gate. SCRs have the ability to turn ON or OFF, and their switching is controlled by biasing conditions and the gate input terminal.By varying the ON periods of the SCR, the average power delivered at the load can be varied. It is capable of handling tens of thousands of voltages and currents. Figure depicts the SCR symbol and its terminals.Figure2:Construction The SCR is manufactured using three different types of constructions: planar, Mesa, and press pack. Planar construction, in which all junctions in an SCR are diffused, is used for low-power SCRs. In a mesa type construction, junction J2 is formed by diffusion and the outer layers are alloyed to it as a result. This design is primarily used in high-power Silicon Controlled Rectifiers. The SCR is braced with plates made of molybdenum or tungsten to provide high mechanical strength. One of these plates is soldered to a copper stud, which is threaded to connect to the heat sink. Ⅴ What is a Thyristor?A thyristor is a four-layer solid-state semiconductor device made of P and N materials. When a gate receives a triggering current, it begins to conduct until the voltage across the thyristor device is biased forward. In this case, it functions as a bistable switch. To control a large amount of current flowing through the two leads, we must create a three-lead thyristor by combining the small amount of current with that current. This is referred to as control lead. If the potential difference between the two leads is less than the breakdown voltage, a two-lead thyristor is used to turn the device on.Figure3:Thyristor Ⅵ Thyristor Switching CircuitsDC Thyristor CircuitAC Thyristor circuit 6.1 Thyristor Circuit in DCWhen connected to a DC supply, we use a thyristor to control larger DC loads and current. The main advantage of using a thyristor in a DC circuit as a switch is that it provides a high current gain. Because a small gate current can control a large anode current, the thyristor is classified as a current-operated device.Figure4:Thyristor Circuit in DC 6.2 AC Thyristor CircuitWhen connected to an alternating current supply, the thyristor behaves differently because it is not the same as a DC-connected circuit. A thyristor is used as an AC circuit during one half of a cycle, causing it to turn off automatically due to its reverse biased condition. Figure6:AC Thyristor Circuit Ⅶ How an SCR Circuit Works with Thyristor Circuits?7.1 DC Thyristor / SCR CircuitMany applications call for an SCR circuit to control the operation of a DC load. This can be used for switching DC motors, lamps, or any other load.The basic SCR circuit shown below can control power to a load by using a small switch to initiate power application to the load.Figure7:Basic DC thyristor / SCR circuit With S1 closed and S2 open, no current will flow at first. The SCR circuit will turn on and the current will flow in the load only when S2 is closed and it triggers the gate by causing the gate current to flow.Until the anode circuit is broken, the current will continue to flow. S1 can be used for this. Another method is to place the switch S1 across the SCR and briefly close it, causing the voltage across the SCR to disappear and the SCR to stop conducting.Because of their functions in this SCR circuit, S1 and S2 may be referred to as the Off switch and the ON switch, respectively. In this configuration, S1 must be able to carry the full load current, while S2 must only carry the gate current. Once the SCR is turned on, the switch can be released and remain open because the SCR's action maintains the current flow through the device and thus the load.R1 connects the gate to the power supply via the switch. When S2 is closed, current flows through the resistor enters the gate and activates the SCR. The resistor R1 must be calculated to provide enough gate current to turn on the SCR circuit.R2 is included to reduce the SCR's sensitivity so that it does not fire on any noise that is detected. 7.2 Basic AC Thyristor / SCR CircuitWhen using a thyristor circuit with AC, a few changes must be made, as shown below.This is because alternating current reverses polarity throughout the cycle. This means that the SCR will become reverse-biased, effectively lowering the anode voltage to zero and causing it to turn OFF for one-half of each cycle. As a result, there is no need for an off switch because this is accomplished as part of the use of an alternating current supply.When using a thyristor circuit with AC, a few changes must be made, as shown below.This is because alternating current reverses polarity throughout the cycle. This means that the SCR will become reverse-biased, effectively lowering the anode voltage to zero and causing it to turn OFF for one-half of each cycle. As a result, there is no need for an off switch because this is accomplished as part of the use of an alternating current supply.Figure8: AC thyristor / SCR circuitThe circuit operates in a slightly different manner than the DC SCR circuit. When the switch is turned on, the circuit must wait for sufficient anode voltage to be available as the AC waveform progresses along its path. In addition, the SCR circuit will have to wait until the voltage within the gate section of the circuit is high enough to trigger the SCR. The switch must be in a closed position for this to work.Once triggered, the SCR will remain to conduct for the duration of the positive half of the cycle. As the voltage falls, the anode-cathode voltage will become insufficient to support conduction. At this point, the SCR will come to a halt.The SCR will then not operate during the negative half of the cycle. The process will only be repeated when the next positive half of the cycle returns. As a result, this circuit will only operate when the gate switch is closed.One disadvantage of using this type of SCR circuit is that it cannot supply more than 50% power to the load because it does not conduct during the negative half of the AC cycle because the SCR is reverse biased. 7.3 AC SCR Circuit with Gate Phase ControlBy varying the proportion of the half-cycle over which the SCR conducts, the amount of power reaching the load can be controlled. This can be accomplished by using an SCR circuit with phase control of the input gate signal.Figure9:AC thyristor circuit waveformsThe SCR gate signal is derived from an RC circuit consisting of R1, VR1, and C1 before the diode D1 when using the SCR circuit with phase control.Because the SCR is forward biased, only the positive half cycle of the waveform is of interest, as with the basic AC SCR circuit. During this half-cycle, the capacitor, C1, charges up from the AC supply voltage via the resistor network of R1 and VR1. The waveform at the positive end of C1 is seen to lag behind the input waveform, and the Gate is only triggered when the voltage at the capacitor's high end has risen sufficiently to trigger the SCR via D1. As a result, the SCR's turn-on time is delayed compared to what it would be if the RC network was not present. The VR1 value changes the delay and thus the proportion of the cycle over which the SCR operates. The power into the load can thus be adjusted in this manner. Figure10: AC thyristor circuit with gate phase control R1 is a series resistor that has been included to limit the minimum value for the resistor network to a value that will provide an acceptable gate current level for the SCR. The phase angle of the gate waveform must typically vary between 0° and 180° to provide complete control of the 50% of the cycle available for conduction with an SCR. These circuits demonstrate some of the fundamental concepts underlying the design of SCR thyristor circuits. They show how they work and how they can be used in their most basic form. One of the most important considerations when designing thyristor circuits is power dissipation. Because these circuits frequently handle high voltages and high power levels, power dissipation can be a significant factor in circuit design and operation. Ⅷ FAQ1. What does a thyristor do in a circuit?The primary function of a thyristor is to control electric power and current by acting as a switch. For such a small and lightweight component, it offers adequate protection to circuits with large voltages and currents (up to 6000 V, 4500 A).2. How thyristor acts as a switch?When connected to a direct current DC supply, the thyristor can be used as a DC switch to control larger DC currents and loads. When using the Thyristor as a switch it behaves like an electronic latch because once activated it remains in the “ON” state until manually reset3. What is difference between SCR and thyristor?Thyristor is a four semiconductor layer or three PN junction device. It is also known as “SCR” (Silicon Control Rectifier). The term “Thyristor” is derived from the words of thyratron (a gas fluid tube which works as SCR) and Transistor. Thyristors are also known as PN PN Devices.4. Is thyristor convert AC to DC?A single-phase thyristor rectifier converts an AC voltage to a DC voltage at the output. The power flow is bidirectional between the AC and the DC side.5. What are the advantages of thyristor?Advantages of Thyristor :It is easy to turn on. It is able to control AC power. It can switch high voltage, a high current device. It cost is very low. 

The larger the resistance of the drive, the longer the turn-on time of MOSFET, and the longer the voltage and current overlap time in the switching time, the greater the switching loss. Therefore, the smaller the resistance, the better the drive resistance should be, provided that the drive resistance can provide enough damping to prevent the drive-current oscillation. When designing switch power supply or motor drive circuit with MOSFET, the factors such as on resistance, maximum voltage and maximum current of MOSFET should be considered. In general, the MOSFET tube can be divided into the enhanced and depleted, P-channel or N-channel is a total of 4 types, but the enhanced NMOS tube and PMOS tube are mainly used, in these two commonly mentioned enhanced type, the more commonly used is NMOS, The reason is its small on-resistance and easy to manufacture. However, it is not enough to consider these, because the current will have different losses in various devices, so we must ensure that sufficient current to drive the MOSFET.  Figure 1. MOS schematic diagram In this paper, we will discuss the calculation of the MOS gate drive resistor. The range of the MOSFET drive resistance is between 5~100ohms, so how to further optimize the selection of the resistance value in this range?  Equivalent Drive Circuit Figure 2. Equivalent drive circuit L is the PCB line inductor, according to the professional experience its straight line value is 1nH/ mm, considering other line factors, take L=Length +10 (nH), where Length unit is mm. Rg is the gate drive resistance, and the driving signal is a square wave with a peak value of 12 V. Cgs is the gate and source capacitance of MOSFET, with different tubes and driving voltage its value will be different, here is 1nF. VL+VRg+VCgs=12V Taking drive circuit: Getting differential equation of driving voltage of Cgs: Obtaining Transformation function by method of Laplace transform: This is a third-order system, which is an overdamped vibration when its poles are three different real roots, there are two same solid roots is critical damped vibrations, and there are imaginary roots is underdemped vibrations, which will generate waves of oscillation up and down at the gate of MOFET. This is something we do not want to see, so the choice of gate resistance Rg should make it work in the critical damping and over damping states, but the parameter error is actually working in the overdamped state. Based on the above, therefore, the minimum range of Rg values can be obtained according to the length of the line. Making the length of running line of 20mm and 70mm respectively: L20= 30nH , L70= 80nH, then Rg20=8.94Ω, Rg70=17.89Ω, Here are the voltage and current waveforms   Figure 3. Driving current ripple curve According to the diagram when the Rg is small, the driving voltage surge will be higher, more and more oscillation will exist when the L becomes large, and the performance of MOSFET and other devices will be affected obviously. However, when the resistance value is too large, the driving waveform will rise slowly, while it will have a negative effect when the MOSFET has a large current passing through. In addition, we should note that when L is small, the peak value of driving current is larger, and the output capacity of general IC is limited. When the actual driving current reaches the maximum value of IC output, the output of IC is equivalent to a constant current source. When Cgs is charged linearly, the rising of driving voltage waveform will slow down. The current curve may be shown on the follow (the inductance does not work because the current is constant), this may have an impact on the reliability of the IC, and a small step or burr may occur in the rise of the voltage waveform. Figure 4. Current curve The PWM OUT output of the general IC is shown in the left figure. The internal integration includes the current-limiting resistor Rsource and Rsink, usually Rsource > Rsink, but the actual values are related to the peak driving output ability of the IC. It can be approximately considered that R=Vcc/Ipeak. The drive output capacity of IC is about 0.5A, and meanwhile Rsource is about 20Ω. From the previous voltage and current curves, we can see that the IC driver can drive MOSFET,  but the drive line is usually not a straight line, the inductance may be greater, and in order to prevent external interference, it is necessary to use the Rg drive resistor to suppress. This resistance should be as close as possible to the gate of the MOSFET when considering the effect of the line distribution capacitance. Figure 6. PWM OUT The effect of Rg and L on rising time: (Cgs=1nF, VCgs=0.9*Vdrive) TR(nS)19492302045229Rg(ohm)10221001022100L(nH)303030808080 It can be seen that L has little effect on TR, but Rg has great influence on TR. TR can be estimated approximately by 2*Rg*Cgs. Usually, the rise time is less than 20 percent of the conduction time, and the loss of the MOSFET switch when it is switched on will not cause a heat problem. So when the minimum conduction time of MOSFET is determined, the maximum value of Rg is determined . Generally, the smaller the Rg is, the better, but if considering the EMI, its value should be taken as large as possible. The selection of resistor in MOSFET on-state is discussed above. In order to ensure the fast discharge of gate charge in MOSFET off-state, the resistance should be as small as possible, which is the reason of Rsink<Rsource. To ensure rapid discharge, a diode can be connected in parallel on the Rg. When the discharge resistance is too small, it will also cause resonance due to the inductance of the line (so in some applications there will be a small resistance on the diode.). But the reverse current of the diode is not conductive, at the same time, the Rg is involved in the reverse resonant circuit. Therefore, the peak of reverse resonance can be suppressed. This Diodes usually use a high frequency and small signal tube 1N4148. In practice, we should also consider the influence of the gate and drain of MOSFET and a capacitor Cgd. When MOSFET is on, Rg has to charge Cgd, which will change the voltage rise slope. When off, VCC will charge Cgs through Cgd. In this case, the charge on Cgs must be removed quickly, otherwise, it will lead to abnormal conduction of MOSFET. Figure 7. MOSFET schematic diagram FAQ   1. Why do MOSFETs need resistor? MOSFET gates are exceptionally high impedance. Just like a GPIO pin set to be an input, a pull-down or pull-up resistor helps keep the transistor on or off during power-on. ... When used with a switch or cable that could be disconnected, it is obvious to use a pull-down or pull-up resistor.   2. Do MOSFETs need pull down resistors? You either need a resistor to pull it down to ground or you need the input signal to drive it low. ... You only have to drain the inherent capacitance on the MOSFET gate when you're pulling it low so even at a high resistance to ground the RC time constant is usually relatively short.   3. Does Mosfet have resistance? The MOSFET behaves like a resistor when switched ON (i.e. when Vgs is large enough; check the data sheet). Look in the data sheet for the value of this resistor. It's called Rds(on). It may be a very small resistance, much less than an Ohm.   4. What is the purpose of gate resistor? A gate resistor is used is to slow down the turn-on and turn-off of the MOSFET. (This is more relevant to power circuits that switch a fair amount of current.)   5. What is Mosfet used for? The MOSFET (Metal Oxide Semiconductor Field Effect Transistor) transistor is a semiconductor device which is widely used for switching and amplifying electronic signals in the electronic devices. The MOSFET is a three terminal device such as source, gate, and drain.   6. What is Mosfet and how it works? In general, the MOSFET works as a switch, the MOSFET controls the voltage and current flow between the source and drain. The working of the MOSFET depends on the MOS capacitor, which is the semiconductor surface below the oxide layers between the source and drain terminal.   7. How Mosfet can be used as a resistor? When you slowly increase the gate voltage the MOSFET slowly starts conducting by entering the linear region where it starts developing voltage across it which we call as VDS . In this region, the MOSFET acts as a resistance of finite value.   8. Can Mosfet switch AC? Yes, but you need to connect two back to back to deal with the body diode. Connect the source terminals and gate terminals and connect a floating voltage supply between sources and gates. This circuit is typically called a solid state relay.   9. How much current can a Mosfet handle? Modern MOSFETs can have on resistances of less than 10 milliohms. A little math shows that this device can handle 10 amps with one watt converted into waste heat (power = current2 x resistance). Since many MOSFETs come in TO-220 packages, no heatsink is needed in this instance.   10. How many types of Mosfet are there? four types. There are two classes of MOSFETs. There is depletion mode and there is enhancement mode. Each class is available as n- or a p-channel, giving a total of four types of MOSFETs. Depletion mode comes in an N or a P and an enhancement mode comes in an N or a P.