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Researchers at Tokyo Institute of Technology have devised a low-cost approach to developing all-solid-state batteries, improving prospects for scaling up the technology for widespread use in electric vehicles, communications and other industrial applications. Ever since batteries were invented over 200 years ago, there has been a drive to improve quality and performance at reduced costs.Compared to common lithium-ion batteries that contain lithium ion conducting liquids, all-solid-state batteries of the future promise a suite of advantages: improved safety and reliability, higher energy storage and longer life cycles. The discovery of ‘superionic’ conductors — solid crystals that enable fast movement of ions — is spurring the development of such dream batteries, but promising designs have so far relied on the use of rare metals such as germanium, making them too expensive for large-scale applications. Ryoji Kanno and colleagues at Tokyo Institute of Technology (Tokyo Tech) have now discovered a new material with a low-cost, scalable approach that involves substituting germanium for two more readily available elements: tin and silicon. The new material achieved an ionic conductivity that exceeds that of liquid electrolytes. Reporting their findings in Chemistry of Materials, the team states: "This germanium-free lithium conductor could be a promising candidate as an electrolyte in all-solid-state batteries." Due to its high chemical stability and ease of fabrication, Kanno says that the new material widens the possibilities of fine-tuning solid electrolytes to meet diverse industry and consumer needs. In 2011, Kanno and his team, working in collaboration with Toyota Motor Corporation and Japan's High Energy Accelerator Research Organisation (KEK), published a landmark paper in Nature Materials that introduced a solid electrolyte with the structure Li10GeP2S12 (LGPS). This material became an important forerunner in the race to develop viable all-solid-state batteries. It exhibited an ionic conductivity of 1.2x10-2S cm-1 at room temperature, a level comparable with — and even exceeding some — liquid electrolytes used in existing batteries. The team went on to design other solid electrolytes based on the same LGPS crystal structure, with promising results. In their latest study, the researchers kept the same framework structure of LGPS, and finely adjusted the ratio and positioning of the tin, silicon and other constituent atoms. The resulting material LSSPS (composition: Li10.35[Sn0.27Si1.08]P1.65S12 (Li3.45[Sn0.09Si0.36]P0.55S4)) achieved an ionic conductivity of 1.1x10-2S cm-1 at room temperature, almost reaching that of the original LGPS structure. Although further work will be required to optimise performance for different usage purposes, the new material raises hopes for low-cost production without sacrificing performance. Kanno envisions that in addition to meeting current battery needs across all sectors, all-solid-state batteries will expand the possibilities of responding to new user needs arising from the IoT and the shift towards smart systems, as well as powering robots, drones and space and aircraft technologies among others in future. Ref.KY605-NH12VPKY605-NH15VP
kynix On 2017-07-20
Together with his research team, Lars-Erik Wernersson, professor of nanoelectronics at Lund University in Sweden, has developed a technology for smarter transistors which could be used in electronics that operate on low energy, such as sensors for the IoT. Using the new transistors on a large scale could save enormous amounts of energy. Transistors are the smallest building blocks in electronics - a kind of switch.When the amount of energy required to switch the transistors on or off is reduced, major savings can be made overall. Transistors with low-energy consumption are expected to be highly significant for applications within the IoT.With the help of nanotechnology, the material and architecture in the transistors have been optimised so that they consume only a third of the energy required with the current technology when operating at low voltages. They can be used in digital circuits, various sensors and communication.“We have been able to operate the transistors under what is known as the fundamental thermionic limit, which reduces energy consumption. The next step is to continue to study the physics and to understand the components better, so that they can be further optimised. We also want to find new ways of transferring the technology to industry,” says Lars-Erik Wernersson.The researchers’ findings will probably have moved into production processes within five to ten years. According to Lars-Erik Wernersson, the extent of the energy savings will depend on the quality of the components which can be produced in industry.“The dream scenario is that all data servers will consume less energy thanks to the technology we use. In that case, the savings in one year would be comparable to all the energy consumed in Great Britain during the same period.”When his researcher colleagues recently reported data from an experiment conducted within the EU-funded E2SWITCH project, Lars-Erik Wernersson, along with the doctoral students who carried out the test, realised that these were ground-breaking results:“We have repeated the tests many times and succeeded in demonstrating that the performance with this new, energy-saving technology is not only satisfactory, but even better than that based on the traditional technologies.”According to Lars-Erik Wernersson, the new technology is a complement and one of several technologies which can be used to create more energy-efficient transistors – and different types of applications require different solutions.“We are very happy to have found something that many people have been searching for. We have shown that the transistors have high performance and that it is possible to reduce energy consumption. And now we can continue to add pieces to the puzzle,” concludes Lars-Erik Wernersson.Reference:2SA1987C47062sb1647
kynix On 2016-12-12
In electronics, lower power consumption leads to operation cost savings, environmental benefits and the convenience advantages from longer running devices. While progress in energy efficiencies has been reported with alternative materials such as SiC and GaN, energy-savings in the standard inexpensive and widely used silicon devices are still keenly sought. K Tsutsui at Tokyo Institute of Technology and colleagues in Japan have now shown that by scaling down size parameters in all three dimensions their device they can achieve significant energy savings.Tsutsui and colleagues studied silicon insulated gate bipolar transistors (IGBTs), a fast-operating switch that features in a number of every day appliances. While the efficiency of IGBTs is good, reducing the ON resistance, or the voltage from collector to emitter required for saturation (Vce(sat)), could help increase the energy efficiency of these devices further.Previous investigations have highlighted that increases in the "injection enhancement (IE) effect", which give rise to more charge carriers, leads to a reduction in Vce(sat). Although this has been achieved by reducing the mesa width in the device structure, the mesa resistance was thereby increased as well. Reducing the mesa height could help counter the increased resistance but is prone to impeding the (IE) effect. Instead the researchers reduced the mesa width, gate length, and the oxide thickness in the MOSFET to increase the IE effect and so reduce Vce(sat) from 1.70 to 1.26 V. With these alterations the researchers also used a reduced gate voltage, which has advantages for CMOS integration.They conclude, "It was experimentally confirmed for the first time that significant Vce(sat) reduction can be achieved by scaling the IGBT both in the lateral and vertical dimensions with a decrease in the gate voltage."Reference:2SA1987C4706KSC5024RTU
kynix On 2016-12-10
Scientists often discover interesting things without completely understanding how they work. That has been the case with an experimental memory technology in which temperature and voltage work together to create the conditions for data storage. But precisely how was unknown. But when a Stanford team found a way to untangle the chip’s energy and heat requirements, their tentative findings revealed a pleasant surprise: The process may be more energy efficient than was previously supposed.That’s good news for next-generation mobile devices whose batteries would last longer if they were powering lower energy chips. The group that made this discovery, led by Stanford electrical engineer H.-S. Philip Wong, is presenting the paper when the IEEE International Electron Devices Meeting (IEDM) brings leading researchers to San Francisco Dec. 5.The new technology the team investigated is called resistive random-access memory, or RRAM for short. RRAM is based on a new type of semiconductor material that forms digital zeros and ones by resisting or permitting the flow of electrons.RRAM has the potential to do things that aren’t possible with silicon: for instance, being layered on top of computer transistors in new three-dimensional, high-rise chips that would be faster and more energy efficient than current electronics, which is ideal for smartphones and other mobile devices where energy efficiency is a vital feature.But while engineers can observe that RRAM does store data, they don’t know exactly how these new materials work. “We need much more precise information about the fundamental behavior of RRAM before we can hope to produce reliable devices,” Wong said. So to help engineers understand some of the unknowns, Wong’s team built a tool to measure the basic forces that make RRAM chips work.Graduate student Zizhen Jiang of the Stanford team explained the basics: RRAM materials are insulators, which normally do not allow electricity to flow, she said. But under certain circumstances, insulators can be induced to let electrons flow.Past research had shown how: Jolting RRAM materials with an electric field causes a pathway to form that permitted electron flows. This pathway is called a filament. To break the filament, researchers apply another jolt and the material becomes an insulator again. So each jolt switched the RRAM from zero to one or back, which is what makes the material useful for data storage.But electricity is not the only force at play in RRAM switching. Pumping electrons into any material raises its temperature. That’s the principle behind electric stoves. In the case of RRAM, it was the elevated temperature caused by introducing voltage that induced filaments to form or break. The question was what voltage-induced temperature was needed to cause the switching. No one knew.Before the new Stanford study researchers thought short bursts of voltage, sufficient to generate temperatures of about 1,160ºF – hot enough to melt aluminum – was the switching point. But those were estimates because there was no way to measure the heat generated by an electric jolt. “In order to begin to answer our questions, we had to decouple the effects of voltage and temperature on filament formation,” said Ziwen Wang, another graduate student on the team.Essentially, the Stanford researchers had to heat the RRAM material without using an electric field. So they put an RRAM chip on a micro thermal stage (MTS) device – a sophisticated hot plate capable of generating a wide range of temperatures inside the material.Of course the objective was not merely to heat the material, but also to measure how filaments formed. Here they took advantage of the fact that RRAM materials are insulators in their natural state. That makes them digital zeros. As soon as a filament formed electrons would flow. The digital zero would become a digital one, which the researchers could detect.Using this experimental model, the team put RRAM chips on the burner and cranked up the heat, starting at about 80ºF – roughly the temperature of a warm room – all the way up to 1,520ºF, hot enough to melt a silver coin. Heating the RRAM to various temperatures in between these extremes, the researchers measured precisely if and how RRAM switched from its native zero to a digital one.To their pleasant surprise, the researchers observed that filaments could form more efficiently at ambient temperatures between 80ºF and 260ºF, which is hotter than boiling water – contrary to prior expectation that hotter was better.If confirmed by subsequent research, this would be good news because in a working chip the switching temperature would be created by the voltage and duration of the electric jolt. Efficient switching at lower temperatures would require less electricity and make RRAM more energy efficient and extend battery life when used as the memory in mobile devices.Much work remains to be done to make RRAM memory practical but this research provides the test bed to vary conditions systematically instead of relying on hit-and-miss hunches. “Now we can use voltage and temperature as design inputs in a predictive manner and that is going to enable us to design a better memory device,” Wang said.Reference:MT16JTF51264AZ-1G6M1SDUS5EB-001GMD2202-D192
kynix On 2016-12-07
Tokyo Tech researchers demonstrate operation energy-savings in a low price silicon power transistor structure by scaling down in all three dimensions. In electronics, lower power consumption leads to operation cost savings, environmental benefits and the convenience advantages from longer running devices. While progress in energy efficiencies has been reported with alternative materials such as SiC and GaN, energy-savings in the standard inexpensive and widely used silicon devices are still keenly sought.K Tsutsui at Tokyo Institute of Technology and colleagues in Japan have now shown that by scaling down size parameters in all three dimensions their device they can achieve significant energy savings.Tsutsui and colleagues studied silicon insulated gate bipolar transistors (IGBTs), a fast-operating switch that features in a number of every day appliances. While the efficiency of IGBTs is good, reducing the ON resistance, or the voltage from collector to emitter required for saturation (Vce(sat)), could help increase the energy efficiency of these devices further.Previous investigations have highlighted that increases in the “injection enhancement (IE) effect”, which give rise to more charge carriers, leads to a reduction in Vce(sat). Although this has been achieved by reducing the mesa width in the device structure, the mesa resistance was thereby increased as well.Reducing the mesa height could help counter the increased resistance but is prone to impeding the (IE) effect. Instead the researchers reduced the mesa width, gate length, and the oxide thickness in the MOSFET to increase the IE effect and so reduce Vce(sat) from 1.70 to 1.26 V. With these alterations the researchers also used a reduced gate voltage, which has advantages for CMOS integration.They conclude, “It was experimentally confirmed for the first time that significant Vce(sat) reduction can be achieved by scaling the IGBT both in the lateral and vertical dimensions with a decrease in the gate voltage.”These are three terminal devices used as switches or rectifiers. With simple gate-drive characteristics and high-current and low-saturation-voltage capabilities they combine the benefits of two other types of transistors - metal-oxide-semiconductor field effect transistors (MOSFETs) and bipolar transistors.The researchers reduced the mesa width, gate length, and the oxide thickness in the MOSFET by a factor of 1/k, and compared devices with values of 1 and 3 for k. Because the fabrication of narrow mesas can cause problems they also reduced the trench depth by 1/k.Although this has a slightly negative effect on the IE effect, it has considerable benefits for fabrication ease and cost and the dependence of (Vce(sat)) on the trench depth was deemed to be small. The gate voltage was also decreased by a factor of 1/k, while the cell pitch was maintained at 16 μm.Reference:2SA1987C4706FJA4213RTU
kynix On 2016-12-06
Transistors, the workhorses of the electronics world, are plagued by leakage current. This results in unnecessary energy losses, which is why smartphones and laptops, for example, have to be recharged so often. Tom van Hemert and Ray Hueting of the University of Twente's MESA+ Institute for Nanotechnology have shown that this leakage current can be radically reduced by "squeezing" the transistor with a piezoelectric material (which expands or contracts when an electrical charge is applied to it). Using this approach, they have smashed the theoretical limit for leakage current. Tom van Hemert will defend his PhD dissertation on 6 December.If silicon is squeezed, this affects the freedom of movement of the electrons in this material. This can promote or restrict the flow of electrical current. Compare it to a garden hose. When you stand on it, less water comes out. But strangely enough, the flow of electrons in silicon actually increases when the material is compressed.Only pinch when necessaryIn modern microchips, every single transistor is continuously exposed to enormous pressures of up to 10,000 atmospheres. This pressure is sealed in during the manufacturing process, by surrounding the transistors with compressive materials. While this boosts the chip's processing speed, the leakage current also increases. The use of piezoelectric material means that the transistors are only put under pressure when this is necessary. This can generate considerable savings in terms of energy consumption.Limit smashedThe underlying concept was originally developed by Ray Hueting. In order to turn this into reality, Tom van Hemert had to find a way of linking theories of mechanical deformation with quantum-mechanical formulas describing the electrical behaviour of transistors. The calculations indicate that "garden hose transistors" are much better than conventional transistors at switching from off to on. According to the classical theoretical limit, a charge of at least 60 millivolts is needed to make a transistor conduct ten times more electricity. The piezoelectric transistor uses just 50 millivolts. As a result, either the leakage current can be reduced, or more current can be carried in the on-state. Either way, this will boost the performance of modern microchips, while - importantly - cutting their energy consumption.Reference:KY56-2SA1987KY56-C4706KY56-2sb1647
kynix On 2016-11-14
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