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Modern life will be almost unthinkable without transistors. They are the ubiquitous building blocks of all electronic devices: each computer chip contains billions of them. However, as the chips become smaller and smaller, the current 3D field-electronic transistors (FETs) are reaching their efficiency limit. A research team at the Center for Artificial Low Dimensional Electronic Systems, within the Institute for Basic Science (IBS), has developed the first 2D electronic circuit (FET) made of a single material. Published on Nature Nanotechnology, this study shows a new method to make metal and semiconductor from the same material in order to manifacture 2D FETs. Faster electronic device architectures are in the offing with the unveiling of the world’s first fully two-dimensional field-effect transistor (FET) by researchers with Lawrence Berkeley National Laboratory (Berkeley Lab). Unlike conventional FETs made from silicon, these 2D FETs suffer no performance drop-off under high voltages and provide high electron mobility, even when scaled to a monolayer in thickness.（Berkeley Lab researchers fabricated the first fully 2D field-effect transistor from layers of molybdenum disulfide, hexagonal boron nitride and graphene held together by van der Waals bonding.） Ali Javey, a faculty scientist in Berkeley Lab’s Materials Sciences Division and a UC Berkeley professor of electrical engineering and computer science, led this research in which 2D heterostructures were fabricated from layers of a transition metal dichalcogenide, hexagonal boron nitride and graphene stacked via van der Waals interactions. In simple terms, FETs can be thought as high-speed switches, composed of two metal electrodes and a semiconducting channel in between. Electrons (or holes) move from the source electrode to the drain electrode, flowing through the channel. While 3D FETs have been scaled down to nanoscale dimensions successfully, their physical limitations are starting to emerge. Short semiconductor channel lengths lead to a decrease in performance: some electrons (or holes) are able to flow between the electrodes even when they should not, causing heat and efficiency reduction. To overcome this performance degradation, transistor channels have to be made with nanometer-scale thin materials. However, even thin 3D materials are not good enough, as unpaired electrons, part of the so-called "dangling bonds" at the surface interfere with the flowing electrons, leading to scattering. FETs, so-called because an electrical signal sent through one electrode creates an electrical current throughout the device, are one of the pillars of the electronics industry, ubiquitous to computers, cell phones, tablets, pads and virtually every other widely used electronic device. All FETs are comprised of gate, source and drain electrodes connected by a channel through which a charge-carrier – either electrons or holes – flow. Mismatches between the crystal structure and atomic lattices of these individual components result in rough surfaces – often with dangling chemical bonds – that degrade charge-carrier mobility, especially at high electrical fields. Passing from thin 3D FETs to 2D FETs can overcome these problems and bring in new attractive properties. "FETs made from 2D semiconductors are free from short-channel effects because all electrons are confined in naturally atomically thin channels, free of dangling bonds at the surface," explains Ji Ho Sung, first author of the study. Moreover, single- and few-layer form of layered 2D materials have a wide range of electrical and tunable optical properties, atomic-scale thickness, mechanical flexibility and large bandgaps (1~2 eV).    Researchers produced the first 2D field-effect transistor (FET) made of a single materialThe major issue for 2D FET transistors is the existence of a large contact resistance at the interface between the 2D semiconductor and any bulk metal. To address this, the team devised a new technique to produce 2D transistors with semiconductor and metal made of the same chemical compound, molybdenum telluride (MoTe2). It is a polymorphic material, meaning that it can be used both as metal and as semiconductor. Contact resistance at the interface between the semiconductor and metallic MoTe2 is shown to be very low. Barrier height was lowered by a factor of 7, from 150meV to 22meV. IBS scientists used the chemical vapor deposition (CVD) technique to build high quality metallic or semiconducting MoTe2 crystals. The polymorphism is controlled by the temperature inside a hot-walled quartz-tube furnace filled with NaCl vapor: 710°C to obtain metal and 670°C for a semiconductor. The scientists also manufactured larger scale structures using stripes of tungsten diselenide (WSe2) alternated with tungsten ditelluride (WTe2). They first created a thin layer of semiconducting WSe2 with chemical vapor deposition, then scraped out some stripes and grew metallic WTe2 on its place. It is anticipated that in the future, it would be possible to realize an even smaller contact resistance, reaching the theoretical quantum limit, which is regarded as a major issue in the study of 2D materials, including graphene and other transition metal dichalcogenide materials. Ref.FDMT800120DCSTP160N3LL 

(Researchers made a major breakthrough in smart printed electronics. ) 2D transistors make displays so cheap that they would be literally disposable. Then wine labels could show when the contents is at the optimal drinking temperature. Researchers from AMBER and TU Delft, Netherlands have fabricated printed transistors consisting entirely of 2-dimensional nanomaterials for the first time. These 2D materials combine exciting electronic properties with the potential for low-cost production. This breakthrough could unlock the potential for applications such as food packaging that displays a digital countdown to warn you of spoiling, wine labels that alert you when your white wine is at its optimum temperature, or even a window pane that shows the day’s forecast. This discovery opens the path for industry, such as ICT and pharmaceutical, to cheaply print a host of electronic devices from solar cells to LEDs with applications from interactive smart food and drug labels to next-generation banknote security and e-passports. Printed electronic circuitry will allow consumer products to gather, process, display and transmit information: for example, milk cartons could send messages to your phone warning that the milk is about to go out-of-date. 2D nanomaterials can compete with the materials currently used for printed electronics. Compared to other materials employed in this field, they have the capability to yield more cost effective and higher performance printed devices. However, while the last decade has underlined the potential of 2D materials for a range of electronic applications, only the first steps have been taken to demonstrate their worth in printed electronics. Nanosheets for two-dimensional transistorsResearchers now show that conducting, semiconducting and insulating 2D nanomaterials can be combined together in complex devices. It was critically important to focus on printing transistors as they are the electric switches at the heart of modern computing. This work opens the way to print a whole host of devices solely from 2D nanosheets. Standard printing techniques were used to combine graphene nanosheets as the electrodes with two other nanomaterials, tungsten diselenide and boron nitride as the channel and separator (two important parts of two-dimensional transistors) to form an all-printed, all-nanosheet, working transistor. Carbon-based molecules with limitationsPrintable electronics have developed over the last thirty years based mainly on printable carbon-based molecules. While these molecules can easily be turned into printable inks, such materials are somewhat unstable and have well-known performance limitations. There have been many attempts to surpass these obstacles using alternative materials, such as carbon nanotubes or inorganic nanoparticles, but these materials have also shown limitations in either performance or in manufacturability. While the performance of printed 2D devices cannot yet compare with advanced transistors, the team believe there is a wide scope to improve performance beyond the current state-of-the-art for printed transistors. The ability to print 2D nanomaterials is based on Prof. Coleman’s (AMBER) scalable method of producing 2D nanomaterials, including graphene, boron nitride, and tungsten diselenide nanosheets, in liquids, a method he has licensed to Samsung and Thomas Swan. These nanosheets are flat nanoparticles that are a few nanometres thick but hundreds of nanometres wide. Critically, nanosheets made from different materials have electronic properties that can be conducting, insulating or semiconducting and so include all the building blocks of electronics. Liquid processing is especially advantageous in that it yields large quantities of high quality 2D materials in a form that is easy to process into inks. Prof. Coleman’s publication provides the potential to print circuitry at extremely low cost which will facilitate a range of applications from animated posters to smart labels. Ref.KY56-C4706KY56-2SA1860 

At this week's IEEE IEDM conference, world-leading research and innovation hub for nano-electronics and digital technology, imec, reported for the first time the CMOS integration of vertically stacked gate-all-around (GAA) silicon nanowire MOSFETs. Key in the integration scheme is a dual-work-function metal gate enabling matched threshold voltages for the n- and p-type devices. Also, the impact of the new architecture on intrinsic ESD performance was studied, and an ESD protection diode is proposed. These breakthrough results advance the development of GAA nanowire MOSFETs, which promise to succeed FinFETs in future technology nodes. GAA nanowire transistors are promising candidates to succeed FinFETs in 7nm and beyond technology nodes. They offer optimal electrostatic control, thereby enabling ultimate CMOS device scaling. In a horizontal configuration, they are a natural extension of today's mainstream FinFET technology. In this configuration, the drive current per footprint can be maximized by vertically stacking multiple horizontal nanowires. Earlier this year, imec scientists demonstrated GAA FETs based on vertically stacked 8nm diameter Si nanowires. These devices showed excellent electrostatic control, but were fabricated for n- and p-FETs separately.Imec now reports on the CMOS integration of vertically stacked GAA Si nanowire MOSFETs, with matched threshold voltages for n- and p-type devices. Key in the integration scheme is the implementation of dual-work-function metal gates to set the threshold voltages of the n- and p-FETs independently. In this process step, p-type work function metal (PWFM) is deposited in the gate trenches of all devices, followed by selectively etching the PWFM down to the HfO2 from the n-FETs and subsequent deposition of the n-type work function metal. The observation of matched threshold voltages (VT,SAT = 0.35V) for nMOS and pMOS devices validates the dual-work-function metal integration scheme.The impact of this new device architecture on the intrinsic ESD performance was investigated as well. Two different ESD protection diodes have been proposed, i.e. a gate-structure defined diode (gated diode) and a shallow-trench isolation defined diode (STI diode). The STI diode was the better ESD protection device, showing an excellent ratio of failure current (It2) over parasitic capacitance (C). Measurements and TCAD simulations also prove that the ESD performance in GAA nanowire based diodes is maintained in comparison to bulk FinFET diodes."GAA nanowire transistors enable ultimate CMOS device scaling, with low degree of added complexity compared to alternative scaling scenarios," stated Dan Mocuta, Director Logic Device and Integration at imec. The proposed integration scheme for Si GAA CMOS technology and the results on ESD protection are important achievements towards realizing these 7nm and beyond technology nodes. Future work will focus, among others, on further optimizing individual process steps, for example through the co-optimization of the junction and nanowire formation."Ref:KY56-2SA1987KY56-KSC5024RTUKY56-MJL4302A          

It's hardly a character flaw, but organic transistors—the kind envisioned for a host of flexible electronics devices—behave less than ideally, or at least not up to the standards set by their rigid, predictable silicon counterparts. When unrecognized, a new study finds, this disparity can lead to gross overestimates of charge-carrier mobility, a property key to the performance of electronic devices.If measurements fail to account for these divergent behaviors in so-called "organic field-effect transistors" (OFETs), the resulting estimates of how fast electrons or other charge carriers travel in the devices may be more than 10 times too high, report researchers from the National Institute of Standards and Technology (NIST), Wake Forest University and Penn State University. The team's measurements implicate an overlooked source of electrical resistance as the root of inaccuracies that can inflate estimates of organic semiconductor performance.Already used in light-emitting diodes, or LEDs, electrically conductive polymers and small molecules are being groomed for applications in flexible displays, flat-panel TVs, sensors, "smart" textiles, solar cells and "Internet of Things" applications. Besides flexibility, a key selling point is that the organic devices—sometimes called "plastic electronics"—can be manufactured in large volumes and far more inexpensively than today's ubiquitous silicon-based devices.A key sticking point, however, is the challenge of achieving the high levels of charge-carrier mobility that these applications require. In the semiconductor arena, the general rule is that higher mobility is always better, enabling faster, more responsive devices. So chemists have set out to hurry electrons along. Working from a large palette of organic materials, they have been searching for chemicals—alone or in combination—that will up the speed limit in their experimental devices.Just as for silicon semiconductors, assessments of performance require measurements of current and voltage. In the basic transistor design, a source electrode injects charge into the transistor channel leading to a drain electrode. In between sits a gate electrode that regulates the current in the channel by applying voltage, functioning much like a valve.Typically, measurements are analyzed according to a longstanding theory for silicon field-effect transistors. Plug in the current and voltage values and the theory can be used to predict properties that determine how well the transistor will perform in a circuit.Results are rendered as a series of "transfer curves." Of particular interest in the new study are curves showing how the drain current changes in response to a change in the gate electrode voltage. For devices with ideal behavior, this relationship provides a good measure of how fast charge carriers move through the channel to the drain."Organic semiconductors are more prone to non-ideal behavior because the relatively weak intermolecular interactions that make them attractive for low-temperature processing also limit the ability to engineer efficient contacts as one would for state-of-the-art silicon devices," says electrical engineer David Gundlach, who leads NIST's Thin Film Electronics Project. "Since there are so many different organic materials under investigation for electronics applications, we decided to step back and do a measurement check on the conventional wisdom."Using what Gundlach describes as the semiconductor industry's "workhorse" measurement methods, the team scrutinized an OFET made of single-crystal rubrene, an organic semiconductor with a molecule shaped a bit like a microscale insect. Their measurements revealed that electrical resistance at the source electrode—the contact point where current is injected into the OFET— significantly influences the subsequent flow of electrons in the transistor channel, and hence the mobility.In effect, contact resistance at the source electrode creates the equivalent of a second valve that controls the entry of current into the transistor channel. Unaccounted for in the standard theory, this valve can overwhelm the gate—the de facto¬ regulator between the source and drain in a silicon semiconductor transistor—and become the dominant influence on transistor behavior.At low gate voltages, this contact resistance at the source can overwhelm device operation. Consequently, model-based estimates of charge-carrier mobility in organic semiconductors may be more than 10 times higher than the actual value, the research team reports.Hardly ideal behavior, but the aim of the study, the researchers write, is to improve "understanding of the source of the non-ideal behavior and its impact on extracted figures of merit," especially charge-carrier mobility. This knowledge, they add, can inform efforts to develop accurate, comprehensive measurement methods for benchmarking organic semiconductor performance, as well as guide efforts to optimize contact interfaces.Reference:2SA1987C4706FJA4213RTU 

Together with his research team, Lars-Erik Wernersson, professor of nanoelectronics at Lund University in Sweden, has developed a technology for smarter transistors which could be used in electronics that operate on low energy, such as sensors for the IoT. Using the new transistors on a large scale could save enormous amounts of energy. Transistors are the smallest building blocks in electronics - a kind of switch.When the amount of energy required to switch the transistors on or off is reduced, major savings can be made overall. Transistors with low-energy consumption are expected to be highly significant for applications within the IoT.With the help of nanotechnology, the material and architecture in the transistors have been optimised so that they consume only a third of the energy required with the current technology when operating at low voltages. They can be used in digital circuits, various sensors and communication.“We have been able to operate the transistors under what is known as the fundamental thermionic limit, which reduces energy consumption. The next step is to continue to study the physics and to understand the components better, so that they can be further optimised. We also want to find new ways of transferring the technology to industry,” says Lars-Erik Wernersson.The researchers’ findings will probably have moved into production processes within five to ten years. According to Lars-Erik Wernersson, the extent of the energy savings will depend on the quality of the components which can be produced in industry.“The dream scenario is that all data servers will consume less energy thanks to the technology we use. In that case, the savings in one year would be comparable to all the energy consumed in Great Britain during the same period.”When his researcher colleagues recently reported data from an experiment conducted within the EU-funded E2SWITCH project, Lars-Erik Wernersson, along with the doctoral students who carried out the test, realised that these were ground-breaking results:“We have repeated the tests many times and succeeded in demonstrating that the performance with this new, energy-saving technology is not only satisfactory, but even better than that based on the traditional technologies.”According to Lars-Erik Wernersson, the new technology is a complement and one of several technologies which can be used to create more energy-efficient transistors – and different types of applications require different solutions.“We are very happy to have found something that many people have been searching for. We have shown that the transistors have high performance and that it is possible to reduce energy consumption. And now we can continue to add pieces to the puzzle,” concludes Lars-Erik Wernersson.Reference:2SA1987C47062sb1647 

In electronics, lower power consumption leads to operation cost savings, environmental benefits and the convenience advantages from longer running devices. While progress in energy efficiencies has been reported with alternative materials such as SiC and GaN, energy-savings in the standard inexpensive and widely used silicon devices are still keenly sought. K Tsutsui at Tokyo Institute of Technology and colleagues in Japan have now shown that by scaling down size parameters in all three dimensions their device they can achieve significant energy savings.Tsutsui and colleagues studied silicon insulated gate bipolar transistors (IGBTs), a fast-operating switch that features in a number of every day appliances. While the efficiency of IGBTs is good, reducing the ON resistance, or the voltage from collector to emitter required for saturation (Vce(sat)), could help increase the energy efficiency of these devices further.Previous investigations have highlighted that increases in the "injection enhancement (IE) effect", which give rise to more charge carriers, leads to a reduction in Vce(sat). Although this has been achieved by reducing the mesa width in the device structure, the mesa resistance was thereby increased as well. Reducing the mesa height could help counter the increased resistance but is prone to impeding the (IE) effect. Instead the researchers reduced the mesa width, gate length, and the oxide thickness in the MOSFET to increase the IE effect and so reduce Vce(sat) from 1.70 to 1.26 V. With these alterations the researchers also used a reduced gate voltage, which has advantages for CMOS integration.They conclude, "It was experimentally confirmed for the first time that significant Vce(sat) reduction can be achieved by scaling the IGBT both in the lateral and vertical dimensions with a decrease in the gate voltage."Reference:2SA1987C4706KSC5024RTU