Introduction Operational amplifiers will oscillate in many practical applications. For example, there are many kinds of loads that will cause them to oscillate. A feedback network that is not properly designed can cause them to become unstable. Insufficient power supply bypass capacitors may also make them unstable. Even the input and output may oscillate into a single-port system. This article will tell some common causes that cause the op amp to oscillate and the corresponding countermeasures. Catalog Introduction Ⅰ Basic Op Amp Circuits Ⅱ Example: LTC6268 Amplifier Ⅲ Decompensated Amplifiers Ⅳ Feedback Network Ⅴ Load Problem Ⅵ Strange Impedance Ⅶ Power Ⅷ Conclusion Ⅸ FAQ Ⅰ Basic Op Amp Circuits Figure 1. shows a block diagram of a non-rail-to-rail amplifier. The input controls the gm box, which drives the gain node and is buffered at the output. The compensation capacitor Cc is the main frequency response component. The return pin of Cc should be grounded, if there is such a pin and the op amp is not grounded, the capacitor current will return to one or two power supplies. Figure 1. Block Diagram of a Non-Rail-to-Rail Amplifier Figure 2. is a block diagram of a rail-to-rail output amplifier. The output current of the input box gm is sent through a current coupler, which divides the current into two parts and supplies them to the output transistor. The frequency response is determined by two Cc/2s, which are actually connected in parallel. Figure 2. Block Diagram of a Rail-to-Rail Output Amplifier Figure 3. shows the frequency response of the ideal amplifier. Although the electrical principles of the two circuits are different, the behavior is similar. The single pole compensation formed by gm and Cc provides a unity gain bandwidth product frequency of GBF = gm/(2πCc). In the vicinity of GBF/Avol, the phase lag of these amplifiers changes from -180° to -270°, where Avol is the open-loop DC gain of the amplifier. When the frequency is much higher than this low frequency, the phase stays at –270°. This is the well-known "dominant pole compensation", where the Cc dominates the frequency response, hiding the various frequency limitations of the active circuit. Figure 3. Frequency Response of the Ideal Amplifier Ⅱ Example: LTC6268 Amplifier Figure 4. shows the open-loop gain and phase response of the LTC6268 amplifier with frequency. The LTC6268 is a small and low-noise 500MHz amplifier with rail-to-rail output and only 3fA bias current. It can be used as a good example to illustrate the performance of real amplifiers. The -90° phase lag of the dominant pole compensation starts from about 0.1MHz, reaches -270° around 8MHz, and moves down by more than -270° when it exceeds 30MHz. In fact, all amplifiers have high frequency phase lag, except for the basic dominant compensation lag caused by the additional gain stage and output stage. Generally, the starting point of the additional phase lag is around GBF/10. Figure 4. Open-Loop Gain and Phase Response of the LTC6268 Amplifier with Frequency The stability of the feedback is a matter of loop gain and phase, or Avol multiplied by the feedback coefficient, which is the loop gain. If we connect the LTC6268 in a unity gain configuration, 100% of the output voltage is fed back. At very low frequencies, the output is the negative value of the "–" input, or the phase lags by -180°. Compensation adds a -90° hysteresis through the amplifier, introducing a –270° hysteresis from the "–" input to the output. When the loop phase lag increases to ±360° or its multiples, oscillation will occur, and the loop gain is at least 1V/V or 0dB. The phase margin is a measure of how much the phase lag differs from 360° when the gain is 1V/V or 0dB. Figure 4. shows that the phase margin is about 70° (10pF red curve) at 130MHz, and the phase margin as low as about 35° is feasible.A topic that is not often mentioned is gain margin, although it is an equally important parameter. When it is reduced to zero at some higher frequencies, the amplifier will oscillate if the gain is at least 1V/V or 0dB. As shown in Figure 4, when the phase drops to 0° (or a multiple of 360°, or –180° as shown in the figure), the gain is about –24dB around 1GHz. This is a very low gain and no oscillations will occur at this frequency. In fact, people want the gain margin to be at least 4dB. Ⅲ Decompensated Amplifiers Although the LTC6268 is fairly stable at unity gain, there are still unstable op amps. By designing the amplifier compensation to be stable only at higher closed-loop gains, the design trade-off can provide a higher conversion rate, wider GBF, and lower input noise than the unity gain compensation scheme. Figure 5. shows the open loop gain and phase of the LTC6230-10. The amplifier is intended to be used with a feedback gain of 10 or greater, so the feedback network will attenuate the output by at least 10 times. Through this feedback network, you can find the frequency when the open-loop gain is 10V/V or 20dB, and find that the phase margin is 58° at 50MHz (±5V power supply). At unity gain, the phase margin is only about 0°, so the amplifier oscillates. Figure 5. LT6230-10 Gain and Phase Change with Frequency It is observed that when the closed-loop gain is higher than the minimum stable gain, all amplifiers will be more stable. Even a gain of 1.5 will make a unity gain stable amplifier much more stable. Ⅳ Feedback Network The feedback network itself may also cause oscillations. In Figure 6, put a parasitic capacitor in parallel with the feedback divider resistor. It is inevitable that each terminal of each component on the circuit board has a capacitance of about 0.5pF to the ground, and there is also a wiring capacitance. Figure 6. Parasitic Capacitance In fact, the minimum capacitance of the node is 2pF, and there is about 2pF of wiring capacitance per inch of trace. The accumulated parasitic capacitance can easily reach 5pF. Using LTC6268, in order to reduce the power, we set the values of Rf and Rg to a very high 10kΩ. When Cpar = 4pF, the feedback network has a pole at 1/(2π*Rf||Rg*Cpar) or 8MHz. The phase lag of the feedback network is -atan(f/8MHz), we can estimate that the loop will have a phase lag of 360° around 35MHz. At this time, the phase lag of the amplifier is -261°, and the feedback network lags about -79°. At this phase and frequency, the amplifier still has a gain of 22dB, and the gain of the voltage divider is .At the 0° phase, the amplifier's 22dB multiplied by the feedback divider's –19dB produces a +3dB loop gain, and the circuit oscillates. In order to operate normally in the presence of parasitic capacitance, we must reduce the value of the feedback resistor so that the feedback pole can far exceed the unity gain frequency of the loop. That is, the ratio of the pole to the GBF should be at least 6 times.The input end of the op amp itself may also have a considerable capacitance, the same as Cpar. In particular, low noise and low Vos amplifiers have large input transistors and may have larger input capacitance than other types of amplifiers, and the input capacitance is loaded on the amplifier's feedback network. We need to consult the data sheet to understand how much capacitance will be connected in parallel with Cpar. Fortunately, the LT6268 has only 0.45pF capacitance, which is already very low for such a low noise amplifier. The macro model running on LTspice® provided free of charge by ADI can be used to simulate a circuit with parasitic capacitance. Figure 7. shows how to improve the capacitor tolerance of the voltage divider. Figure 7(a) shows a non-negative output amplifier configuration with Rin. Assuming that Vin is a low impedance source (<Rin), Rin will effectively attenuate the feedback signal without changing the closed-loop gain. And it will also reduce the impedance of the voltage divider and increase the feedback pole frequency, which is expected to far exceed GBF. In addition, Rin reduces the bandwidth around the loop and amplifies the input offset and noise.Figure 7(b) shows a negative output configuration. Rg still performs loop attenuation without changing the closed loop gain. In this case, the input impedance is not affected by Rg, but the noise, offset and bandwidth parameters will deteriorate.Figure 7(c) shows the preferred method of compensating Cpar in a non-inverting amplifier. If we set Cf* Rf = Cpar * Rg, then we have a "compensation attenuator", so that the feedback divider now has the same attenuation at all frequencies and solves the Cpar problem. The mismatch in the product will cause "bumps" in the passband of the amplifier and "shelf" in the response curve (At this time, the low-frequency response is flat, but becomes straight near f = 1/2 * Cpar * Rg.).Figure 7(d) shows the equivalent Cpar compensation for the negative output amplifier. The frequency response must be analyzed to find a correct Cf, and the bandwidth of the amplifier is part of the analysis.Here are some comments on current feedback amplifiers (CFA) in turn. If the amplifier in Figure 7(a) is a CFA, then "Rin" has little effect on changing the frequency response, because the negative input is very low impedance and actively copies the positive input. The noise index will degrade slightly, and the additional negative input bias current will actually appear in the form of Vos/Rin. Similarly, in terms of frequency response, the circuit in Figure (b) is not changed by "Rg". The inverting input is not just a virtual ground, it is a real ground with low impedance, and Cpar has been tolerated (only in negative output mode). The DC error is similar to the situation shown in (a), (c) and (d) may be the preferred solution for voltage input op amps, but CFA can't tolerate a direct feedback capacitor without oscillation at all. Ⅴ Load Problem Just as the feedback capacitor can damage the phase margin, the load capacitor can do the same. Figure 8 shows the change in LTC6268 output impedance with frequency in the case of several gain settings. Note that the unity gain output impedance is lower than the output impedance at higher gains. Full feedback enables the open-loop gain to reduce the inherent output impedance of the amplifier. Therefore, in Figure 8, the output impedance at a gain of 10 is generally 10 times the output impedance at unity gain. Since the feedback attenuator reduces the loop gain, the gain around the loop is 1/10, otherwise it will reduce the closed-loop output impedance. The open-loop output impedance is about 30, which is obvious in the high-frequency flat region of the curve with a gain of 100. In this area, from around gain bandwidth frequency (about 100) to gain bandwidth frequency, there is not enough loop gain to reduce the open loop output impedance. Figure 8. Impedance and Frequency of LTC6268 Under Three Gain Conditions The capacitor load will cause the phase lag and amplitude attenuation of the open-loop output impedance. For example, a 50pF load and our LTC6268 output impedance form another pole at 106MHz, where the output has a –45° phase lag and –3dB attenuation. At this frequency, the amplifier has a phase of -295° and a gain of 10dB. Assuming unity gain feedback is used, we have not fully realized the oscillation because the phase is not brought to ±360° (at 106MHz). However, at 150MHz, the amplifier has 305° phase lag and 5dB gain. The phase of the output pole is –atan(150MHz/106MHz) = -55°, and the gain is .Multiplying the gain cyclically, we get a 360° phase and +0.2dB gain, which is another oscillator. 50pF seems to be the minimum load capacitance that will force the LTC6268 to oscillate.The most common way to prevent oscillations caused by the load capacitor is to simply connect a small resistor in series to the capacitor after the feedback connection. The resistance value of 10Ω to 50Ω will limit the phase lag that may be caused by the capacitive load and isolate the amplifier and low capacitive impedance when the speed is very high. Disadvantages include DC and low frequency errors that vary with load resistance characteristics, capacitive load frequency response is limited, and signal distortion caused if the load capacitance is not constant when the voltage changes.Increasing the closed-loop gain of the amplifier can often prevent the oscillation caused by the load capacitance. Operating the amplifier with a higher closed-loop gain means that at frequencies where the loop phase is ±360°, the feedback attenuator also attenuates the loop gain. For example, if we use the LTC6268, its closed-loop gain is +10, then we will see that the amplifier has a gain of 10V/V or 20dB at 40MHz and a phase lag of 285°. To ignite the oscillation, an output pole is required, causing an additional 75° hysteresis. By -75° =-atan(40MHz/Fpole) →Fpole =10.6MHz, we can find the output pole. This pole frequency comes from a load capacitance of 500pF and an output impedance of 30Ω. The output pole gain is .When the unloaded open-loop gain is 10, the loop gain at the oscillation frequency point is 0.26, so there is no oscillation this time, at least no oscillation caused by the simple output pole. In this way, we increased the tolerable load capacitance from 50pF to 500pF by increasing the closed-loop gain.In addition, unterminated transmission lines are also very bad loads because they will cause "runaway" impedance and phase changes that repeat with frequency (See the impedance of an unterminated 9-foot cable in Figure 9).If your amplifier can safely drive the cable under certain low-frequency resonance conditions, it is likely to oscillate at a higher frequency because its own phase margin is reduced. If the cable must be unterminated, a "back-match" resistor in series with the output can isolate the cable's extreme impedance changes. In addition, even if the transient reflection from the this end of the cable just recoils back to the amplifier, if the resistance of the backward matching resistor matches the characteristic impedance of the cable, the resistor can properly absorb this energy. If the backward resistor does not match the cable impedance, some energy will be reflected from the amplifier and terminals, and back to the unterminated end. When the energy reaches this end, it is quickly reflected back to the amplifier. As a result, there is a series of pulses bouncing back and forth, but attenuate each time. Figure 9. Impedance and Phase of the Unterminated Coaxial Cable Figure 9 shows a more complete output impedance model. The ROUT is the same as what we discussed in the LTC6268, and it is also 30Ω, in addition, add the Lout item. This is a combination of physical inductance and electronic equivalent inductance. The physical package, bonding wire, and external inductance add up to 5nH to 15nH. The smaller the package, the smaller the total value. Figure 10. Inductive Component of Amplifier Output Impedance In addition, any amplifier has an electrical inductance of 20nH to 70nH, especially bipolar devices. The finite Ft of the device turns the parasitic base resistance of the output transistor into an inductance. The harm is that Lout and CL may interact to form a series resonant circuit, then the same problem comes again. If there is no greater phase lag in the loop, the impedance of the series resonant circuit may drop to a level that Rout cannot drive. This may cause oscillations. For example, set Lout = 60nH and CL = 50pF. Resonant frequency is .Just within the passband of the LTC6268. In fact, this series resonant circuit is loaded to the output terminal during resonance, which changes the phase of the loop greatly near the resonant frequency. Unfortunately, Lout is not mentioned in the amplifier's data sheet, but its effect can sometimes be seen on the open-loop output impedance circuit. In short, for amplifiers with a bandwidth of less than 50MHz, this effect is not important.One solution is shown in Figure 10. Rsnub and Csnub form a so-called "shock absorber" whose purpose is to reduce the Q value of the resonant circuit so that the resonant circuit does not have a very low resonant impedance to the output of the amplifier. The value of Rsnub is usually estimated as the reactance of CL to reduce the Q value of the output resonance circuit to about 1. Adjust the size of Csnub to fully insert Rsnub into the output resonance frequency, that is, the reactance of Csnub <Cl. Csnub = 10 * CL is practical. Csnub unloads the amplifier at intermediate and low frequencies, especially at DC. If it is very large, Rsnub will put a heavy load on the amplifier at intermediate frequency, which will affect the low frequency, gain accuracy, closed-loop bandwidth and distortion. However, after a little fine-tuning, shock absorbers are often useful for controlling reactive loads, but shock absorbers must be adjusted through experiments. Figure 11: Using an Output Shock Absorber The negative input of the current feedback amplifier is actually a buffer output and will also have the series characteristics shown in Figure 8. Therefore, it may oscillate under the action of Cpar, just like the output terminal. You should try to reduce Cpar and any related inductance. Unfortunately, the damper on the negative input terminal modifies the relationship between closed-loop gain and frequency, so it is not very useful. Ⅵ Strange Impedance Many amplifiers have an abnormal input impedance at high frequencies. This is most true for amplifiers with two input transistors in series, such as the Darlington configuration. Many amplifiers have PNP/NPN transistor pairs at the input, and their behavior changes with frequency similar to the Darlington configuration. The real part of the input impedance will become negative at some frequencies (generally much higher than GBF). Inductive source impedance will resonate with the input and circuit board capacitance, and negative real components may provoke oscillations. When driving with unterminated cables, this can also cause oscillations at many repetition frequencies. If it is inevitable to use a long inductive wire at the input, you can disconnect the wire with several series-connected resistors that can absorb energy, or install a medium-impedance shock absorber (about 300Ω) on the input lead of the amplifier. Ⅶ Power The last source of oscillation to consider is power supply bypass. Figure 10 shows part of the output circuit. LVS+ and LVS– are the unavoidable packaging, IC bond wires, the physical length of the bypass capacitor (inductive like any conductor), and the series inductance of the circuit board traces. It also includes the external inductance that connects the local bypass component to the rest of the power bus (if not the power plane). Although 3nH to 10nH may seem small, at 200MHz, it is 3.8 to 12Ω. If the output transistor conducts a large high-frequency output current, there will be a voltage drop across the power inductor. Figure 12. Power Supply Bypass Capacitor Details The rest of the amplifier needs a noise-free power supply, because these parts cannot suppress power supply noise as the frequency changes. In Figure 13 we can see the power supply rejection ratio (PSRR) of the LTC6268 with frequency. In all operational amplifiers, because there is no ground pin, the compensation capacitor is connected to the power supply, which will couple power supply noise into the amplifier, and gm must cancel this noise. Due to the compensation, PSRR decreases with 1/f, in addition, the power supply rejection actually increases after 130MHz. Figure 13. LTC6268 Power Supply Rejection with Frequency Variation At 200MHz, due to the increase of PSRR, the output current may interfere with the power supply voltage inside the LVs inductor. Through the amplification of PSRR, the interference becomes a strong amplifier signal, driving the output current, generating internal power signals, etc., causing the amplifier to oscillate. This is why the power supplies of all amplifiers must be carefully bypassed with traces and components with very small inductance. In addition, the power supply bypass capacitor must be much larger than any load capacitor.If consider the frequency around 500MHz, then the range 3nH to 10nH becomes 9.4Ω to 31.4Ω. This is enough for the output transistor to generate self-oscillation by its inductance and IC component capacitance, especially when the output current is large (transistor gm and bandwidth increase). Because the bandwidth of transistors is very large, special attention needs to be paid, especially at high output currents. Ⅷ Conclusion In short, the designer needs to consider the parasitic capacitance and inductance associated with each op amp terminal and the natural characteristics of the load. Usually the designed amplifier is very stable in the nominal environment, but each application needs to analyze it by itself. Ⅸ FAQ 1. Does your op amp oscillate?Well, it shouldn't. We analog designers take great pains to make our amplifiers stable when we design them, but there are many situations that cause them to oscillate in the real world. ... Improperly designed feedback networks can cause instability. Insufficient supply bypassing can offend. 2. What is oscillator in op amp?An oscillator is an electronic circuit that produces a periodic signal. ... The feedback network takes a part of the output of amplifier as an input to it and produces a voltage signal. This voltage signal is applied as an input to the amplifier. 3. What causes an amplifier to oscillate?Causes of parasitic oscillationParasitic oscillation in an amplifier stage occurs when part of the output energy is coupled into the input, with the correct phase and amplitude to provide positive feedback at some frequency. ... Similarly, impedance in the power supply can couple input to output and cause oscillation. 4. How do you compensate an op amp?Another effective compensation technique is the miller compensation technique and it is an in-loop compensation technique where a simple capacitor is used with or without load isolation resistor (Nulling resistor). That means a capacitor is connected in the feedback loop to compensate the op-amp frequency response. 5. How can an op amp improve stability?To ensure stability, the value of RX should be such that the added zero (fZ) is at least a decade below the closed loop bandwidth of the op amp circuit. With the addition of RX,circuit performance will not suffer the increased output noise of the first method, but the output impedance as seen by the load will increase. 6. What are the requirements of oscillations in an amplifier?Oscillations around the 3dB bandwidth of the amplifier are usually due to input/output feedback. Higher frequency oscillations may only be visible on a spectrum analyzer. They may cause waveform distortion and be affected by touching the amplifier on power and signal cables. 7. How do you stop an oscillating op amp?If the op-amp still oscillates, try these things, in this order:1) Add a small resistor to the op-amp's output, either inside or outside the feedback loop. ...2) Do the same as in the previous step, except use a ferrite bead or chip ferrite instead of the resistor. ...3) Raise the amp's gain a bit. 8. How do you increase the gain margin of an op amp?You can increase the phase margin by making a dominant pole nearer to the zero frequency origin. This is accomplished by compensating the op amp through adding a shunting capacitor in the highest impedance node of the amplifier. This is a very well known technique which is used commonly to increase the phase margin. 9. Why the gain of op amp deteriorate with frequency?All opamps have a limit on upper frequency. In a LPF, at low frequencies, the output amplitude is equal to input. But as the frequency increases, the capacitive reactance decreases and the output amplitude starts to decrease. 10. What is used to avoid or minimize instability in amplifiers?It is often desirable to use capacitance to ground from an amplifier's active input terminals to reduce high-frequency interference, RFI and EMI. This filter capacitor has a similar effect on op amp dynamics as increased stray capacitance. 11. Why op amps oscillate an intuitive look at two frequent causes?With delay in the loop, the amplifier does not immediately detect its progress toward the final value. ... It overreacts by racing too quickly toward the proper output voltage. Note the faster initial ramp rate with delayed feedback. 12. How does an op-amp oscillator work?The Op-amp Multivibrator is an astable oscillator circuit that generates a rectangular output waveform using an RC timing network connected to the inverting input of the operational amplifier and a voltage divider network connected to the other non-inverting input.
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