IntroductionWhat is the IC package? To put it simply, chip packaging is the process of placing a bare integrated circuit chip produced in a foundry on a load-bearing substrate, leading the pins out, and then fixing the package as a whole. It is analogous to the chip's shell, which can wrap, fix, and seal the chip to protect it from external forces such as water, air, moisture, chemicals, and so on.With the continuous improvement of IC packaging, there are more and more types of IC packaging. Various IC packaging packages types, names, logos, etc. can sometimes be confusing. This blog will give you a brief introduction to IC packaging related content, which mainly includes the following three parts: common IC brand identification, IC package terminology, classification of IC packaging, and hope to help you further effectively distinguish and understand IC packaging. Catalog IntroductionEvolution of IC Packaging TypeIC Packaging Types10 Common IC Brand Identification71 kinds of IC package terminology explainedFAQ Evolution of IC Packaging TypeIn the early stage of the development of chip packaging, there are mainly two types: 1. Through-hole package2. Surface mount packageThrough hole package mainly includes Dual In-line Package (DIP), Transistor Outline (TO), Pin Grid Array (PGA) and so on. Through-hole packageSurface mount package includes TO-252 (D-PAK), Small-Outline Transistor (SOT), Small Outline Package (SOP), Plastic Quad Flat Package (QFP), Plastic Leaded Chip Carrier (PLCC) and so on.Surface mount packageDue to the increasing demand of the surface mount market, the earlier through-hole TO packaging has also begun to develop to the surface mount mode. For example, DPAK packaging, which is easy for many people to confuse, actually refers to TO-252, D2PAK refers to TO-263 and D3PAK refers to TO-268.In the middle and later stage, chip packaging began to enter the era of area array packaging. During this period, packaging types such as Ball Grid Array Package (BGA), Chip Scale Package (CSP), Quad Flat No-lead Package (QFN) and Multi-Chip Module (MCM) began to become popular.With the further development of packaging technology, some chips have begun to adopt the latest three-dimensional stacking packaging technology. IIC Packaging TypesAccording to the different port direction, the common IC packages can be divided into four categories: unilateral, bilateral, four-sided and matrix and several types can be subdivided from the above four categories according to different packaging forms and port shapes. Please refer to the following table for details. IC packaging types In addition, according to the material medium, IC packaging can also be divided into metal, ceramic, plastic and other types, generally distinguished by prefix. For example, "C" refers to ceramic package, "H" refers to package with heat sink and "P" refers to plastic package. 10 Common IC Brand IdentificationMany integrated circuit models’ prefix is often the abbreviation of the manufacturer's name. If you see the following prefix model, you might as well check the corresponding brand first. Of course, this method is not entirely feasible. So you still have to refer to the PDF file of the specific product according to the actual situation.1. AMDThose prefixed with AM are all AMD products, and there are also some confusion between the prefix PAL, CYPRESS and TI. The specific situation should be determined by checking the information.2. ATMELThose prefixed with AT are ATMEL products.3. CYPRESSThose prefixed with CY are all CYPRESS products, and some of them are confused with prefix PALC, PALCE and TI.4. NSCThose prefixed with DM, LF, LM, DS, etc., are basically NSC products. NSC has many product series with other prefix, but the specific situation should be determined by checking the information.5. AD：Those prefixed with AD, OP are AD brand. AD has many other series, such as prefix: DAC, ADG, ADSP and many other series.6. INTERSIL：Those prefixed with HI1, HI2, HI3, HI4, HA1, HA2, HA3, HA4, CA, ICL, ICM, ID, IS, etc., are INTERSIL products. There is also some confusion between prefix MD and INTEL.7. IDT：The prefix for IDT products is almost the prefix IDT.8. MAXThe prefix for MAX products is almost the prefix MAX.9. AGILENTCommon prefixes are HCPL, HDSP, HSSR, and so on.10. ALTERAThe prefix for ALTERA products is almost the prefix for EPM. IC package Figure (105 kinds in total)71 kinds of IC package terminology explainedStill not sure what some IC packaging terms mean exactly? Here is a list of 71 common IC packaging terms for you.1. BGA (Ball Grid Array)BGA is one of the surface mount packages. Spherical bumps are made on the back of the printed substrate to replace pins. LSI chips are assembled on the front of the printed substrate, and then sealed by molding resin or filling method. It is also known as Pad Array Carrier (PAC) and the number of pins can exceed 200. It is a kind of package for multi-pin LSI.The package was developed by Motorola and was first used in portable phones and other devices. 2. BQFP (Quad Flat Package with Bumper)BQFP is one of the QFP packages that is provided with protrusions (cushions) at the four corners of the package body to prevent bending deformation of the pins during transportation. American semiconductor manufacturers mainly use this package in microprocessors and Asic circuits. The center distance of the pin is 0.635 mm, and the number of pins ranges from 84 to 196. (see QFP). 3. Butt Joint PGA (Butt Joint Pin Grid Array)Butt Joint PGA is an alias for surface mount PGA (see Surface Mount PGA) 4. C- (Ceramic)C- is a mark that represents a ceramic package and is often used in practice. For example, CDIP represents Ceramic DIP. 5. CerdipThe Ceramic Dual In-line Package sealed with glass is for circuits such as ECL RAM, DSP (Digital Signal Processor). Cerdip with glass window is used for ultraviolet erasing EPROM and microcomputer circuit with EPROM. The center distance of the pin is 2.54 mm, and the number of pins ranges from 8 to 42. In Japan, this package is represented as DIP-G (G means glass seal). 6. CerquadOne of the surface mount packages, that is, the lower sealed Ceramic QFP, is used to package logic LSI circuits such as DSP. Cerquad with windows is used to package EPROM circuits. The heat dissipation is better than that of Plastic QFP, and power ranges from 1.5 to 2W can be allowed under natural air cooling conditions. But the cost of packaging is 3 to 5 times higher than that of Plastic QFP. Pin center distance has 1.27 mm, 0.8 mm, 0.65 mm, 0.5 mm, 0.4 mm and other specifications. The number of pins ranges from 32 to 368. 7. CLCC (Ceramic Leaded Chip Carrier)Ceramic Leaded Chip Carrier is one of the surface mount packages, and the pins are drawn from the four sides of the package in T-shaped. Those with windows are used for packaging ultraviolet erasing EPROM and microcomputer circuit with EPROM, etc. This packaging is also known as QFJ and QFJ-G (see QFJ). 8. COB (Chip on Board)Chip on Board package is one of the bare chip mounting technologies. The semiconductor chip is connected and mounted on the printed circuit board, the electrical connection between the chip and the substrate is realized by the lead stitching method. Next, cover it with resin to ensure its reliability. Although COB is the simplest bare chip mounting technology, its packaging density is far lower than that of TAB and reverse chip welding technology. 9. DFP (Dual Flat Package)Dual Flat Package is another name for SOP (see SOP). This was once called in the past, but now it is basically out of use.10. DIC (Dual In-line Ceramic Package)This is another name for Ceramic DIP (including glass seal) (see DIP). 11. DIL (Dual In-Line)DIL is an alias for DIP (see DIP). European semiconductor manufacturers often use this name. 12. DIP (Dual In-line Package)Dual In-line Package is one of the through hole packages. The pins are drawn from both sides of the package, and the packaging materials are plastic and ceramic. DIP is the most popular through-hole package, including standard logic IC, memory LSI, microcomputer circuit and so on. The center distance of the pin is 2.54 mm, and the number of pins ranges from 6 to 64. The packaging width is usually 15.2 mm. Some refer to packages with widths of 7.52 mm and 10.16 mm as skinny DIP and slim DIP (narrow DIP, respectively). In most cases, however, it is indistinguishable and is simply collectively referred to as DIP. In addition, Ceramic DIP sealed with low melting point glass is also known as Cerdip (see Cerdip). 13. DSO (Dual Small Out-lint)DSO is the alias for SOP (see SOP). Some semiconductor manufacturers use this name. 14. DICP (Dual Tape Carrier Package)DICP is one of the TCP (loaded packages). The pins are made on the insulation tape and drawn from both sides of the package. Due to the use of TAB (Tape Automated Bonding) technology, the package shape is very thin. It is commonly used in liquid crystal display drive LSI, but most of them are customized products. In addition, the 0.5 mm thick memory LSI thin package is in the development stage. In Japan, DICP is named DTP according to the standard of EIAJ (Japanese Electronic Machinery Industry). 15. DIP (Dual Tape Carrier Package)As we mentioned above, it is the name of DTCP in the standard of the Japanese Electronic Machinery Industry Association. (see DTCP). 16. FP (Flat Package)FP is one of the surface mount packages and it is another name of QFP or SOP (see QFP and SOP). Some semiconductor manufacturers use this name.17. Flip-chipFlip-chip is one of the bare chip packaging technologies. The metal bump is made in the electrode region of the LSI chip, and then the metal bump is connected to the electrode area on the printed substrate by pressure welding. The occupied area of packaging is basically the same as the size of the chip, which is the smallest and thinnest of all packaging technologies. 18. FQFP (fine pitch quad flat package)FQFP usually refers to the QFP which the center distance of the pin is less than 0.65 mm (see QFP). Some conductor manufacturers use this name.19. CPAC (Globe Top PAD Array Carrier)CPAC is another name for BGA by Motorola in the United States. 20. CQFP (Quad Fiat Package with Guard Ring)CQFP is one of the plastic QFP. The pins are masked with a resin protective ring to prevent bending deformation. Before assembling the LSI on the printed substrate, we need to cut off the pin from the protective ring and make it become L-shaped. This package has been mass produced by Motorola in the United States. The center distance of the pin is 0.5 mm, and the maximum number of pins is about 208.21. H- (with heat sink)H- represents a mark with a heat sink. For example, HSOP represents a SOP with a heat sink.22. Pin Grid Array (surface mount type)PGA is usually a through-hole package with a pin length of about 3.4 mm. The surface mount PGA has display–shaped pins on the bottom of the package, ranging in length from 1.5 mm to 2.0 mm. Mounting uses the method of butt joint with the printed substrate, so it is also known as butt joint PGA. Because the center distance of the pin is only 1.27 mm, which is half smaller than the through-hole PGA, the package body cannot be made very large, and the number of pins is more than the through-hole type (ranges from 250 to 528). It is a package for large-scale logical LSI. The packaging substrate has a multi-layer ceramic substrate and a glass epoxy resin printing base. Packaging based on multi-layer ceramic substrate has been practical. 23. JLCC (J-Leaded Chip Carrier)JLCC refers to the alias for windowed CLCC and windowed Ceramic QFJ (see CLCC and QFJ). The name used by some semiconductor manufacturers. 24. LCC (Leadless chip carrier)LCC refers to a surface mount package with only electrode contact and no pin on the four sides of the ceramic substrate. It is a high-speed and high-frequency IC package, also known as Ceramic QFN or QFN-C (see QFN). 25. LGA (Land Grid Array)LGA , that is, an array state flat electrode contact package made on the bottom surface. All we need to do is to insert the socket when assembling. Ceramic LGA, with 227 contacts (1.27 mm center distance) and 447 contacts (2.54 mm center distance) has been used in high speed logic LSI circuits. LGA can accommodate more input and output pins in a smaller package than QFP. In addition, because of the small impedance of the lead, it is very suitable for high-speed LSI. However, due to the complexity of socket production and high cost, it is basically not used much now. But the demand for it is expected to increase in the future. 26. LOC (Lead on Chip)LOC is one of the LSI packaging technologies. The front end of the lead frame is located at the top of the chip. A convex solder joint is made near the center of the chip, and the lead is stitched for electrical connection. Compared with the original structure in which the lead frame is arranged near the side of the chip, the chip contained in the package of the same size is up to about 1 mm wide. 27. LQFP (Low Profile Quad Flat Package)LQFP is a kind of QFP whose package body thickness is 1.4 mm and this is the name used by the Japanese Electronics and Machinery Industry according to the new QFP shape specification. 28. L-QUADL-QUAD is one of the Ceramic QFP. The thermal conductivity of aluminum nitride for packaging substrate is 7 to 8 times higher than that of alumina and has good heat dissipation. The frame of the package is sealed with alumina and the chip is sealed by filling method, thus the cost is suppressed. It is a package developed for logical LSI that allows 3 w power under natural air cooling conditions. LSI logic packages with 208 pins (0.5 mm center distance) and 160 pins (0.65 mm center distance) have been developed and put into mass production in October 1993. 29. MCM (Multi-Chip Module)MCM is a package that assembles multiple bare semiconductor chips on a wiring substrate. According to the substrate materials, it can be divided into MCM-L, MCM-C and MCM-D. MCM-L is a module that uses the usual glass epoxy resin multi-layer printed substrate. The wiring density is not that high and the cost is low. MCM-C is a module which uses thick film technology to form multi-layer wiring and uses ceramics (alumina or glass-ceramic) as substrate, which is similar to mixing IC with thick film of multi-layer ceramic substrate. There is no significant difference between them, and the wiring density was higher than that of MCM-L.MCM-D is a module which uses thin film technology to form multi-layer wiring and uses ceramics (alumina or aluminum nitride) or Si and Al as substrate. The wiring density is the highest of the three modules, but the cost is also high. 30. MFP (Mini Flat Package)MFP is another name for plastic SOP or SSOP (see SOP and SSOP) and it is used by some semiconductor manufacturers. 31. MQFP (Metric Quad Flat Package)MQFP is a classification of QFP according to the JEDEC standard. It refers to standard QFP with a pin center distance of 0.65 mm and a body thickness of 3.8 mm~2.0 mm (see QFP). 32. MQUAD (Metal Quad)MQUAD is a kind of QFP package developed by Olin Company in the United States. The substrate and cover are made of aluminum and sealed with adhesive. The power of 2.5 w~2.8 w can be allowed under the condition of natural air cooling. SHINKO ELECTRIC INDUSTRIES CO., LTD. was licensed to start production in 1993. 33. MSP (Mini Square Package)MSP is another name for QFI (see QFI) and is often called in the early days of development. QFI is the name specified by the Electronic Machinery Industry Association of Japan. 34. OPMAC (Over Molded Pad Array Carrier)OPMAC is the name used by Motorola for molded resin seal BGA (see BGA). 35. P- (plastic)P- is the mark that represents a plastic package. For example, PDIP represents Plastic DIP. 36. PAC (Pad Array Carrier)PAC is an alias for BGA (see BGA). 37. PCLP (Printed Circuit Board Leadless Package)Fujitsu of Japan uses the name for Plastic QFN (Plastic LCC) (see QFN). The center distance of the pin can be divided into two specifications: 0.55 mm and 0.4 mm. It is currently in the development phase. 38. PFPF (Plastic Flat Package)PFPF is an alias for Plastic QFP (see QFP) and it is used by some LSI manufacturers. 39. PGA (Pin Grid Array)PGA is one of the through-hole packages, and the vertical pins on the bottom are arranged in the form of display. The packaging substrate is basically multi-layer ceramic substrate. In the case of not specifically indicating the name of the material, most of the Ceramic PGA, are used in high-speed and large-scale logic LSI circuits. The cost is high. The center distance of the pin is usually 2.54 mm, and the number of pins ranges from 64 to 447. In order to reduce the cost, the packaging substrate can be replaced by glass epoxy resin printing substrate. There is also Plastic PGA with 64 to 256 pins. In addition, there is a short pin surface mount PGA (Butt Joint PGA) with a pin center distance of 1.27 mm. (see Surface Mount PGA). 40. Piggy BackIt refers to a ceramic package with sockets and its shape is similar to that of DIP, QFP and QFN. It is used to confirm operation on the evaluation program when developing a device with a microcomputer. For example, plug the EPROM into the socket for debugging. This kind of package is basically custom-made, and there is little circulation on the market. 41. PLCC (Plastic Leaded Chip Carrier)PLCC is one of the surface mount packages. The pin is drawn from the four sides of the package in the shape of T and is made of plastic. Texas Instruments was first used in 64k-bit DRAM and 256k-bit DRAM, and now it has been widely used in logic LSI, DLD (or logic device) and other circuits. The center distance of the pin is 1.27 mm, and the number of pins ranges from 18 to 84. The J-shaped pin is not easy to deform and is easier to operate than QFP, but the appearance inspection after welding is more difficult.PLCC is similar to LCC (also known as QFN). In the past, the only difference between the two was that the former used plastic and the latter used ceramics. But now there are J-shaped pin packages made of ceramics and pin-free packages made of plastic. (marked as plastic LCC, PC LP, P-LCC, etc.) Thus they have been unable to distinguish.To this end, the Japanese Electronics and Machinery Industry decided in 1988 to refer to packages with J-shaped pins on four sides as QFJ, and packages with electrode bumps on four sides as QFN (see QFJ and QFN). 42. P-LCC (Plastic Leadless Chip Carrier)Sometimes it is another name for Plastic QFJ, sometimes it is another name for QFN (Plastic LCC) (see QFJ and QFN). Some LSI manufacturers use PLCC for lead package and P-LCC for lead-free package to show the difference. 43. QFH (Quad Flat High Package)QFH is a kind of Plastic QFP. In order to prevent the package body from breaking, the QFP body is made thicker (see QFP). This is the name used by some semiconductor manufacturers. 44. QFI (Quad Flat I-leaded Package)QFI is one of the surface mount packages. The pin is drawn from the four sides of the package in I-shaped. It is also known as MSP (see MSP). The mount is connected with the printed substrate by butt joint. Because there is no protruding part of the pin, the occupied area of the mount is smaller than that of QFP. Hitachi has developed and used this package for video analog IC. In addition, this package is also used by PLL IC of Motorola, a Japanese company. The center distance of the pin is 1.27 mm, and the number of pins is from 18 to 68.45. QFJ (Quad Flat J-leaded Package)QFJ is one of the surface mount packages. The pin is drawn from the four sides of the package in the shape of J. It is the name stipulated by the Japan Electronic Machinery Industry Association. The center distance of the pin is 1.27 mm. There are two kinds of materials: plastic and ceramics. Plastic QFJ is mostly called PLCC (see PLCC), and it is for microcomputers, gate displays, DRAM, ASSP, OTP, etc. The number of pins ranges from 18 to 84. Ceramic QFJ is also known as CLCC and JLCC (see CLCC). The windowed package is used for ultraviolet erasing EPROM and microcomputer chip circuits with EPROM. The number of pins ranges from 32 to 84.46. QFN (Quad Flat Non-leaded Package)QFN is one of the surface mount packages and it is often called LCC now. QFN is the name specified by the Electronic Machinery Industry Association of Japan. The four sides of the package are equipped with electrode contacts. Because there are no pins, the mounting area is smaller than QFP, and the height is lower than QFP. However, when there is a stress between the printed substrate and the package, it cannot be alleviated at the electrode contact. Therefore, it is difficult for electrode contacts to make as many pins as QFP. The number of pins is generally ranges from 14 to 100.There are two kinds of materials: ceramic and plastic. When marked with LCC, they are basically Ceramic QFN. The center of the electrode contact is 1.27 mm.Plastic QFN is a low-cost package for printing substrate with glass epoxy resin. In addition to 1.27 mm, there are two kinds of electrode contact center distance: 0.65 mm and 0.5 mm. This package is also known as Plastic LCC, PCLC, P-LCC and so on.47. QFP (Quad Flat Package)QFP is one of the surface mount packages, with pins drawn from four sides in L-shaped. There are three kinds of substrate: ceramic, metal and plastic. In terms of quantity, plastic packaging accounts for the vast majority. When the material is not specifically indicated, most of the cases are Plastic QFP. Plastic QFP is the most popular multi-pin LSI package. It is not only used in microprocessor, gate display and other digital logic LSI circuits, but also in VTR signal processing, audio signal processing and other analog LSI circuits. The center distance of pin has 1.0 mm, 0.8 mm, 0.65 mm, 0.5 mm, 0.4 mm, 0.3 mm and other specifications. The maximum number of pins in the 0.65 mm center distance specification is 304.In Japan, QFP with a pin center distance less than 0.65 mm is called QFP (FP). But now the Japanese Electronics and Machinery Industry will re-evaluate the shape of the QFP. There is no difference in the center distance of the pin. But according to the thickness of the package body, it can be divided into three types: QFP (2.0 mm~3.6 mm thickness), LQFP (1.4 mm thickness) and TQFP (1.0 mm thickness).In addition, some LSI manufacturers specifically refer to the QFP with the pin center distance as 0.5 mm as shrink QFP or SQFP, VQFP.However, some manufacturers also call the QFP with pin center distance of 0.65 mm and 0.4 mm SQFP, which makes the name a little confused. The disadvantage of QFP is that when the center distance of the pin is less than 0.65 mm, the pin is easy to bend. In order to prevent pin deformation, several improved QFP varieties have emerged such as BQFP with tree finger buffer pads on the four corners of the package (see BQFP); GQFP with a resin protection ring which covers the front of the pin (see GQFP) and TPQFP (see TPQFP)，which is set test bumps in the package body and can be tested in a special fixture to prevent pin deformation.In the aspect of logical LSI, many development products and highly reliable products are packaged in multi-layer ceramic QFP. Products with a minimum pin center distance of 0.4 mm and a maximum number of pins of 348 have also been introduced. In addition, there are glass-sealed ceramic QFP.48. QFP (FP) (QFP fine pitch)This is the name specified in the standard of the Japan Electronic Machinery Industry Association. The pin center distance is 0.55 mm, 0.4 mm, 0.3 mm and so on, which is smaller than that of 0.65 mm (see QFP).49. QIC (Quad In-line Ceramic Package)QIC is another name for Ceramic QFP and it is used by some semiconductor manufacturers (see QFP, Cerquad).50. QIP (Quad In-line Plastic Package)QIP is another name for Ceramic QFP and is used by some semiconductor manufacturers (see QFP, Cerquad).51. QTCP (Quad Tape Carrier Package)QTCP is one of the TCP packages that forms pins on the insulation tape and leads out from the four sides of the package. It is a thin package using TAB technology (see TAB, TCP).52. QTP (Quad Tape Carrier Package)QTP is the name used by the Japanese Electronic Machinery Industry for the shape specifications developed by QTCP in April 1993 (see TCP).53. QUIL (Quad In-Line)QUIL is an alias for QUIP (see QUIP).54. QUIP (Quad In-line Package)The pin is drawn from both sides of the package and bends down into four columns at every other pin. The pin center distance is 1.27 mm. When inserted into the printed substrate, the insertion center distance becomes 2.5 mm. Therefore, it can be used for standard printed circuit boards.It is smaller package than the standard DIP. Nippon Electric has adopted this kind of package in microcomputer chips for desktop computers and household appliances. There are two kinds of materials: ceramics and plastics. The number of pins is 64. 55. SDIP (Shrink Dual In-line Package)SDIP is one of the through-hole packages with the same shape as the DIP. Its pin center distance (1.778 mm) is less than DIP (2.54 mm) so it gets this name. The number of pins ranges from 14 to 90. It is also known as SH-DIP. There are two kinds of materials: ceramics and plastics.56. SH-DIP (Shrink Dual In-line Package)SH-DIP is the same as SDIP and it is used by some semiconductor manufacturers. 57. SIL (Single In-Line)SIL is an alias for SIP (see SIP). European semiconductor manufacturers often use this name. 58. SIMM (Single In-line Memory Module)A memory module provided with electrodes only near one side of the printed substrate. It usually refers to a module inserted into a socket. The standard SIMM has two specifications: 30 electrodes with center distance of 2.54 mm and 72 electrodes with center distance of 1.27 mm. The SIMM with 1 megabit and 4 megabit DRAM packaged with SOJ on one or both sides of the printed substrate has been widely used in personal computers, workstations and other devices. There are at least 30 to 40 percent of DRAM is installed in SIMM. 59. SIP (Single In-line Package)The pins are drawn from one side of the package and arranged in a straight line. The package is laterally mounted on the printed substrate. The center distance of the pin is usually 2.54 mm, and the number of pins ranges from 2 to 23, most of which are customized products. Packages come in different shapes. Sometimes packages with the same shape as ZIP are called SIP.60. SK-DIP (Skinny Dual In-line Package)SK-DIP is a kind of DIP which has a narrow body with a width of 7.62 mm and a pin center distance of 2.54 mm. It is often collectively referred to as DIP (see DIP).61. SL-DIP (Slim Dual In-line Package)SL-DIP is a kind of DIP which has a narrow body with a width of 10.16 mm and a pin center distance of 2.54 mm. It is commonly referred to as DIP. 62. SMD (Surface Mount Devices)Occasionally, some semiconductor manufacturers classify SOP as SMD (see SOP).63. SO (Small Out-line)SO is another name for SOP and is used by many semiconductor manufacturers in the world. (see SOP).64. SOI (Small Out-line I-leaded Package)SOI is one of the surface mount packages. The pin is drawn down from both sides of the package in I-shaped, with a center distance from 1.27 mm and 26 pins. The occupied area of mounting is smaller than that of SOP. Hitachi uses this package in analog IC (IC for motor drive).65. SOIC (Small Out-line Integrated Circuit)SOIC is an alias for SOP (see SOP). Many semiconductor manufacturers abroad use this name.66. SOJ (Small Out-Line J-Leaded Package)SOJ is one of the surface mount packages. The pin is J-shaped from both sides of the package, so it gets its name. They are usually plastic products and are used in memory LSI circuits such as DRAM and SRAM. But most of them are used in DRAM.Many of the DRAM devices packaged in SOJ are mounted on SIMM. The center distance of the pin is 1.27 mm, and the number of pins ranges from 20 to 40 (see SIMM).67. SOL (Small Out-Line L-leaded Package)The name used for SOP in accordance with the JEDEC standard (see SOP).68. SONF (Small Out-Line Non-Fin)SONF is the SOP without heat sink. As the same as the usual SOP, the NF (non-fin) mark is intentionally added In order to show that there is no heat sink in the power IC package. The name is used by some semiconductor manufacturers (see SOP).69. SOF (Small Out-Line Package)SOF is one of the surface mount packages with pins drawn from both sides of the package in L-shaped. There are two kinds of materials: plastic and ceramics. And it is also known as SOL and DFP.SOP is not only used for memory LSI, but also widely used in small-scale ASSP and other circuits. SOP is the most popular surface mount package in areas where the input and output terminals do not exceed 10 to 40. The center distance of the pin is 1.27 mm, and the number of pins is from 8 to 44.In addition, a SOP with a pin center distance less than 1.27 mm is also known as a SSOP. A SOP with assembly height less than 1.27 mm is called TSOP (see SSOP, TSOP). There is also a SOP with a heat sink. 70. SOW [Small Outline Package(Wide-Type)]SOW refers to wide body SOP and this name is used by some semiconductor manufacturers.71. COG (Chip on Glass)COG (Chip on Glass) packaging technology, which has great influence on the development of Liquid Crystal Display (LCD) technology, is becoming more and more practical in the world.FAQ 1. What is package in IC?The case, known as a "package", supports the electrical contacts which connect the device to a circuit board. In the integrated circuit industry, the process is often referred to as packaging. Other names include semiconductor device assembly, assembly, encapsulation or sealing.2. What are the different types of IC packages?What is IC packaging?DIP (Double In-line Package)SOP/SOIC/SO (Small Outline Package)QFP (Quad Flat Package)QFN/LCC (Quad Flat Non-leaded Package)BGA (Ball Grid Array Package)CSP (Chip Scale Package)3. What is IC and how it works?An integrated circuit, or IC, is small chip that can function as an amplifier, oscillator, timer, microprocessor, or even computer memory. An IC is a small wafer, usually made of silicon, that can hold anywhere from hundreds to millions of transistors, resistors, and capacitors.4. What are the types of ICs?Below is the classification of different types of ICs basis on their chip size.SSI: Small scale integration. 3 – 30 gates per chip.MSI: Medium scale integration. 30 – 300 gates per chip.LSI: Large scale integration. 300 – 3,000 gates per chip.VLSI: Very large scale integration. More than 3,000 gates per chip.5. How do I know my IC type?How to Identify Integrated Circuit ChipsIdentify the manufacturer first. ...Look up data sheets in the manufacturer's printed catalog. ...Look up a part number in an electronic retailer's catalog. ...Use the technical specifications for a piece of equipment to find part numbers and alternates.6. What is the most common type of digital IC package?DIP (Dual in-line packages)DIP, short for dual in-line package, is the most common through-hole IC package you'll encounter. These little chips have two parallel rows of pins extending perpendicularly out of a rectangular, black, plastic housing.7. What are the advantages of IC?The advantages of ICs : (i) Extremely small in size, (ii) Low power consumption, (iii) Reliability, (iv) Reduced cost, (v) Very small weight and (vi) Easy replacement. 8. What is the IC package?What Is the Package in IC? IC packaging refers to the material that contains a semiconductor device. The package is a case that surrounds the circuit material to protect it from corrosion or physical damage and allow mounting of the electrical contacts connecting it to the printed circuit board (PCB). 9.Why IC packaging is important?IC packaging is the ability to provide more and more I/O interconnections to a die (bare chip) that is increasingly shrinking in size is an ever-present problem.10. What are the three basic types of linear IC packages?IC packages can be grouped into three general categories; Dual In-line Packages, Chip Carriers and Grid Arrays. All the packages, regardless of the category has a body style that scales with pin count.
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