The Kynix Blog

Warm hints: The word in this article is about 1000 and the  reading time is about 6 minutes.SummaryFujitsu,a company that provide innovative IT services and digital technologies like mobile,AI,cloud or etc,announced the development of a gallium-nitride(GaN) high-electron mobility transistor(HEMT) power amplifier for use in W-band(75-110 GHz)transmissions in July 2017 at the 12th international Conference. To realize long-distance,high-capacity wireless communications,a promising approach is to utilize the W-band and other high frequency bands that encompass a broad range of usable frequencies, and increase output with a transmission power amplifier. At the same time, demand exists for improved efficiency in power amplifiers in order to mitigate the increased power consumption of communication systems. Fujitsu has now succeeded in developing a power amplifier for use in W-band transmissions that offers both high output power and high efficiency, improving transistor performance through the reduction of electrical current leakage and internal GaN-HEMT resistance. Fujitsu has achieved 4.5 watts per millimeter of gate width, the world's highest output density in the W-band, and has confirmed a 26% reduction in energy consumption compared to conventional technology. Fujitsu anticipates that setting this power amplifier between wireless communication systems in two locations will achieve high-bandwidth communications at 10 gigabits per second (Gbit/s) over a distance of 10km. Part of this research was carried out with support from Innovative Science and Technology Initiative for Security, established by the Acquisition, Technology & Logistics Agency (ATLA), Japan Ministry of Defense. Development Background Wireless data traffic from mobile communications has increased dramatically over the last few years, and with the spread of 5G and IoT devices it is predicted to increase at an annual growth rate of 1.5 times until the year 2020. In order to build this sort of high capacity next-generation wireless communications network, attention has been focused on wireless communication technology using the high frequency W-band. The range of frequencies that can be used in the W-band is very broad, and because communication speed can be rapidly increased in this band, it is well-suited for this kind of high bandwidth wireless communication. Conventional wireless communications technology, has allowed for performance of several Gbit/s over distances of several kilometers, but achieving an even greater increase in wireless communication distance and capacity utilizing the W-band demands further increases to the output of power amplifiers to boost signals during transmission. Issues To increase distance and capacity, it will be necessary to expand the frequency bandwidth that can be amplified while simultaneously supporting modulation methods that can transmit more information within the same frequency bandwidth, and a strong requirement is to have less distortion when the signal is amplified. Another pursuit is keeping in check the energy consumption of communication systems that accompanies greater distances and capacities, and the improved energy efficiency in power amplifiers.In order to both increase the distance and capacity of wireless communications and decrease energy consumption with indium-aluminum-gallium-nitride (InAlGaN) HEMTs, Fujitsu has developed two technologies that effectively reduce internal resistance and current leakage. Features of the newly developed technologies are as follows: Technology to reduce internal resistance Fujitsu has developed device technology that can reliably reduce resistance to one tenth that of previous technology when current flows between the source or drain electrodes and the GaN-HEMT device. The technology utilizes a manufacturing process that embeds GaN plugs directly below the source and drain electrodes, which generate electrons at high densities (fig. 1). It is necessary to transport the electrons that come from the source electrode to the two dimensional electron gas field as smoothly as possible. The structure of the previous technology causes the electron supply layer to become a barrier, however, and internal resistance increases between the source electrode and the two dimensional electron gas. By applying this new technology, Fujitsu succeeded in running high currents through the transistor with significantly less resistance (fig. 2). Technology to control current leakageA current leakage occurs when the two dimensional electron gas, which moves at high speed on the boundary at the top of the channel layer, takes a detour below the gate when the transistor is in its off-state. This leakage causes deterioration in the operational performance of the power amplifier. Normally, it is possible to reduce current leakage by placing a barrier layer beneath the channel layer, but in that case the amount of two dimensional electron gas also decreases, and leads to a reduction of the drain current. This new technology maintains high drain currents by effectively distributing indium-gallium-nitride (InGaN) to create a barrier layer below the channel layer. This reduces electron detours during operation, successfully providing significant reductions in current leakage(just see the fist and second picture).Effects The previous world record for power amplifier output density in the W-band for transmitters was 3.6 watts per millimeter of gate width with technology developed by Fujitsu Laboratories. This has improved significantly with the newly developed technology, which delivers power output of 4.5 watts per millimeter of gate width for a power amplifier designed to operate at 94GHz. In addition, this new technology achieved a reduction in energy consumption of 26% compared to the previous technology through a reduction in current leakage. It is anticipated that the use of this power amplifier will allow the achievement of high capacity, long distance wireless communications between two connected systems at different locations at over 10Gbit/s and at distances greater than 10km.Fujitsu aims to apply this technology broadly to the development of power amplifiers for purposes that call for wireless communications that offer long range and higher capacity, while offering easier installation than fiber optics. The goal is to commercialize this technology in high speed wireless communication systems by 2020, with an aim to employ it in such situations as a method of restoring communications when fiber optic cables have been severed by natural disasters or as a way of setting up temporary communications infrastructure when holding events.  Article provide by FujitsuArticle edited by kynix

SummarySome electornic or electrical appliances needs time limited power supply,or usage of some devices are depends on limitted time.To automate electrical devices depends on time simple and robust solution given based on arduino.Today let's make a arduino variable time relay together.By using this arduino variable timer relay we can control high voltage electrical appliances or electronic devices.Now let me share the process. To indicate the time duration and status 16×2 LCD display is included in this design, once the program uploaded to the Arduino then it can work independent with some external battery power source. Connection DiagramConstruction and Working In this project arduino uno board is used to control SPDT (Single pole double throw) Relay and 16 x 2 character LCD indicates the time duration status. Digital pins D2 to D7 are connected to the LCD display. VR1 varible resistor helps to control the contrast of LCD display, Transistor Q1 BC547 reacts as a Switching device and controls the power supply to the Relay coil depends on arduino output. There are three push buttons are placed to set different time durations, S1 Switch makes the count start, S2 changes the Hours and S3 changes the Minutes of time duration. Output signal from the Arduino is taken from D8 pin and it drives the Relay through transistor. After making the connection, upload the following arduino sketch and pretest the operation with real timer clock.Note:- Candle with extreme care if you using High voltage supply at the Relay end. Arduino Code #include <LiquidCrystal.h>LiquidCrystal lcd(7,6,5,4,3,2);const int set = 9;int hours=10;int start=11; int relay=8;int b=0,h=0,t=0;int buttonState = 0; int lastButtonState = 0; void setup() {    pinMode(set,INPUT);  pinMode(hours,INPUT);  pinMode(relay,OUTPUT);  pinMode(start,INPUT);  lcd.begin(16,2);  lcd.setCursor(0,0);  lcd.print("Adjustable Timer");  }int timer( int b,int h){         if(b<=9)           {            lcd.setCursor(3,1);            lcd.print(0);            lcd.setCursor(4,1);            lcd.print(b);          }     else{lcd.setCursor(3,1);lcd.print(b);}         lcd.setCursor(2,1);         lcd.print(":");     if(h<=9)           {            lcd.setCursor(0,1);            lcd.print(0);            lcd.setCursor(1,1);            lcd.print(h);          }     else{lcd.setCursor(0,1);lcd.print(h);}    }void loop()       {           buttonState = digitalRead(set);                         if (buttonState != lastButtonState)       {                 if(buttonState == HIGH)         {                       lcd.clear();           lcd.print("Set time in min:");                      ++b;           timer(b,h);                                   }                   lastButtonState = buttonState;          }       if (digitalRead(hours)== HIGH)          {              lcd.clear();              lcd.print("Set time in hours");              ++h;              timer(b,h);              while(digitalRead(hours)==HIGH);                                    }             if(digitalRead(start)==HIGH)          {             lcd.clear();             t=((h*60)+(b))*1000;             lcd.print("Timer is set for");             timer(b,h);             digitalWrite(relay,HIGH);             delay(t);             digitalWrite(relay,LOW);             while(digitalRead(start) == HIGH );                                   }                        } Have you make it successfully?  

SummaryAs we all known,better knowledge of the absorption and scattering of light inside the LED,the performance of white LEDs can be improved.Yeah,LEDs can be made even more efficient and powerful.When in May,2017,researchers who from the University of Twente and Philips Lighting have developed a new method which can lead to efficiency improvement and powerful design tools. They found a detailed way to describe the light that stays inside the LED by absorption and scattering. This is very valuable information for the design process. The Theory about Light Sources From relatively weak light sources to strong lights at home and in cars, for example: since the blue and white LED were invented, we've seen a rapid development in possible applications. Low energy consumption and long lifetime are major advantages over existing lighting solutions. White LEDs consist of a semiconductor emitting blue light, with on top of that phosphor plates that turn the blue light into yellow. What we see then, is white light. The light will be scattered by the phosphor particles, but it is absorbed as well. What part of the light will exit the LED, is not easy to predict. Unless you look at absorption and scattering in another way, according to Maryna Meretska and her colleages. Theory from astronomy helps. Good Prediction is Difficult What makes good prediction particularly difficult: some of the light is absorbed, but re-emitted in another colour. One way is trying to define all possible light rays, and use a lot of computing time to get a result. This doesn't give much insight in what is actually happening. A theory that is often used for light propagation in a LED, is diffusion theory. In strongly absorbing media, however, this approach isn't valid anymore. Meretska therefore has built a setup to collect all the light around the phosphor plates, in the whole visual spectrum. Based on this, absorption and scattering can be deduced using the radiative transfer equation, well known in astronomy.  This results in a full description of light propagation inside and outside the phosphor plates. Compared to a description using diffusion theory, the absorption level is up to 30 percent higher. At the same time, the method is about 17 times faster than the numerical approach. ConclusionThis new insights leaded to powerful and predictive tools for LED designers.They help in further improving the efficiency and overall performance.The research has been done in the Complex Photonic System group of UT's MESA+Institute for Nanotechnology,together with Philips Lighting in Eindhoven. The University of Twente has a strong concentration of research groups and facilities within the rapidly growing field of photonics.  Article provided by University of TwenteArticle edited by kynix 

SummaryThere is an article named "Working principle and Development of Solar Cell" in the Kynix Semiconductor Electronic Blog, it detailed shows that the development of new energy sources mainly concentrates on renewable energies such as solar energy,hydrogen energy, wind energy and geothermal energy, among which solar energy resources are abundant and widely distributed, and are the most promising renewable energy sources. In 1839,French scientist E.Becquerel discovered the photovoltaic effect of the liquid,the solar cell has undergone a long development history of more than 160 years. In terms of the overall development, both basic research and technological advancement have played a positive role in promoting them. Now,researchers at Osaka University, in an international collaboration with Max Planck Institute for Polymer Research, have redesigned one of their previously reported polymers to make a new kind of solar cell that needs no extra special treatments. They also managed to keep excellent power conversion efficiency of solar power to electricity, as recently reported in Advanced Energy Materials.  DiscussionIt's truely that energy industry  is not only the basic industry of national economy, but also a technology-intensive industry.Due to the continuous demand of mankind for renewable energy, people are devoted to developing new sources. The energy that the sun shines on the Earth's surface in 40 minutes can be used for one year at a speed of the current global energy consumption. Reasonable utilization of solar energy will be a long-term development strategy for mankind to solve energy problems and it is also one of the most studied research hot spots.Humankind is in the midst of a massive drive to harness solar energy to power our homes, gadgets, and industry. Plastic solar cells, based on blends of conducting organic polymers, are of interest for making lightweight and cheap solar cells. The problem with these kinds of solar cells is that their solar power efficiencies are very closely related to the way the different types of materials mix and crystalize in thin films. This means complex and careful processing is usually needed to make efficient polymer solar cells. According to lead author Yutaka le,Conventional organic solar cells have now achieved good efficiencies but the polymer films in these devices typically require special processing to ensure correct crystallization.(Organic solar cells, as its name implies, are solar cells that form of organic materials. We are not familiar with organic solar cells, which is a reasonable thing. More than 95% of today's solar cells are silicon-based, while less than 5% of the remaining solar cells are made from other inorganic materials.) Instead, we have been focusing on amorphous polymer blends to avoid these issues. Organic solar cells work based on light energy exciting electrons in a polymer. The excited electrons can then transfer to a soccer ball-shaped fullerene and move to the positive side of the solar cell. The space left by an electron is known as a hole. It too must move through the polymer to the other side of the device to complete the circuit. The Osaka researchers knew that one of their polymers could not transport holes so effectively. They redesigned the structure by adding an extra component, which improved its hole conductivity, and in turn enhanced the solar power conversion performance. Coauthor Yoshio Aso says, "Being able to make these cells without having to pay such close attention to the crystal structure of the polymer films could allow us to mass produce these devices by simple printing methods, which should considerably lower costs of the devices and lead to much wider uptake." 

Summary As is listed in the market,there is a little of small,inexpensive switch for latching power to a load unless you buy low-current,momentary action pushbotton switches like PCB-mount‘tactile types'. However, we can get a suitable latching power switch passing by converting a pushbutton's momentary action into a latching function.   New Design Idea Previous Design Ideas have proposed solutions based on discrete components  and IC-based circuits . The circuit outlined below, however, requires just two transistors and a handful of passive components to achieve the same result.   Circuit One The circuit in Figu1(a) is configured to latch power to a low-side (ground-referred) load. It works in 'toggle' mode; that is, the first switch closure applies power to the load, the second removes power, and so on. fig1  Circuit converts momentary action push switch into latching power switch     To understand how the circuit operates, assume that the DC power supply, +VS, has just been applied, capacitor C1 is initially uncharged, and Q1 is off. The P-channel MOSFET, Q2, is held in its off state by R1 and R3, which work in series to pull the gate up to +VS, such that VGS is zero. The circuit is now in its 'unlatched' state, where the load voltage, VL, at the OUT (+) terminal is zero.   If the normally-open push switch is momentarily closed, C1 – being uncharged – pulls Q2's gate to 0V, thus turning on the MOSFET. The load voltage at OUT (+) now rises immediately toward +VS , and Q1 receives base bias via R4 and turns on. Under these conditions, Q1 saturates and pulls Q2's gate low via R3, thus holding the MOSFET on when the switch has opened. The circuit is now in its 'latched' state, where both transistors are on, the load is energized, and C1 charges up to +VS via R2.   When the switch is momentarily closed for a second time, the voltage on C1 (by now approximately equal to +VS) is transferred to Q2's gate. Since Q2's gate-source voltage is now roughly zero, the MOSFET turns off and the load voltage falls to zero. Q1's base-emitter voltage also falls to zero and the transistor turns off. Therefore, when the switch is released, there is nothing to hold Q2 on, and the circuit reverts to its 'unlatched' state, where both transistors are off, the load is de-energized, and C1 discharges via R2. Resistor R5 across the output terminals is an optional component that acts as a pull-down. When the switch is released, C1 discharges via R2 into the load. If the load impedance is very high (i.e., similar in magnitude to R2), or if it contains active devices such as LEDs, the load voltage at the instant Q2 turns off may be large enough to bias Q1 on via R4, thereby preventing the circuit from turning off properly. The presence of R5 pulls the OUT (+) terminal down to 0V when Q2 turns off, thus ensuring that Q1 turns off rapidly, and allowing the circuit to revert to its unlatched state in a proper manner.   Provided the transistors are correctly rated, the circuit will work over a wide voltage range and is well suited to driving loads such as relays, solenoids, LEDs, and so on. However, beware that certain DC fans and motors continue to rotate when their drive power is removed. This rotation can generate an EMF large enough to bias Q1 on, thereby preventing the circuit from switching off. You can eliminate this problem by inserting a blocking diode in series with the output, as shown in Fig1(b). You must also include R5 to ensure Q1 turns off properly.   Ciruit Two The complementary circuit outlined in Fig2 is intended for 'high-side' loads connected to the positive supply rail such as the relay shown in this example. fig2 Complementary circuit intended for high-side loads   Note that Q1 has been replaced with a PNP transistor, and Q2 is now an N-channel MOSFET. The circuit operates in a similar way to the one described above. Here, R5 acts as a pull-up resistor which pulls the OUT (-) terminal up to +VS when Q2 turns off, thus ensuring that Q1 turns off quickly. As in the previous circuit, R5 is optional and only necessary for the types of load mentioned previously.   Note that in both circuits, the time constant produced by C1-R2 provides for debouncing of the push switch contacts. Normally, a value of 0.25s to 0.5s should be adequate. Smaller time constants may lead to erratic behaviour, whereas a larger time constant increases the waiting time between switch closures necessary to ensure that C1 charges and discharges properly. With C1 = 330nF and R2 = 1MΩ as shown, the time constant is nominally 0.33s. This is usually sufficient to debounce the contacts and to allow the load power to be toggled after a couple of seconds or so.   Both circuits are intended to latch and unlatch in response to brief, momentary switch closures. However, they have each been designed to ensure correct operation even if the push switch is held closed for any length of time. Consider the circuit in Fig2 when Q2 is on. When the switch is pressed to unlatch the circuit, the gate is pulled down toward 0V (since C1 is uncharged) and the MOSFET switches off, allowing  the junction of R1-R2 to rise toward +VS via R5 and the load impedance. At the same time, Q1 also switches off, such that Q2's gate is pulled to 0V via the series combination of R3 & R4. If the switch is released immediately, C1 will simply charge up toward +VS via R2. However, if the switch is kept closed, Q2's gate voltage will be defined by the potential divider formed mainly by R2 and R3+R4. If we assume that the OUT (-) terminal is roughly equal to +VS when the circuit is unlatched, Q2's gate-source voltage is given by: VGS = (+VS) × (R3 + R4)/(R2 + R3 + R4) = 0.02(+VS). Even if +VS is as high as 30V, the resulting gate-source voltage of around 0.6V will be too low to switch the MOSFET on again. Consequently, both transistors remain off until the switch contacts open.   The circuit in Fig2 is latched on by momentarily closing the push switch when C1 has charged up to +VS , which causes OUT (-) to drop to 0V as Q2 immediately turns on, rapidly followed by Q1. A momentary switch closure would allow C1 to discharge to zero via R2 after the contacts open. However, if the switch is held closed, Q2's gate voltage will be defined by the potential divider formed by R2 and R3. Since Q1 is saturated, the junction of R3-R4 at Q1's collector will be pulled up to +VS, and the junction of R1-R2 will be pulled down to 0V via Q2. Therefore, with the switch held closed, Q2's gate-source voltage is given by: VGS = (+VS) × R2/(R2 + R3) = 0.99(+VS). Consequently, provided the supply voltage is at least equal to Q2's gate-source threshold voltage, both Q2 and Q1 will remain on until the switch contacts open.   Both circuits provide an inexpensive way of deriving a latching function from a momentary switch and, just like a mechanical latching switch, the quiescent (unlatched) power dissipation is zero.

SummarryWhen I see this paper,The things occurred in my mind is that I need to let others to know it and prevent it.From morning until now,I always solve my computer's Trojans.This is terrible. Trojans may break our computer although it look like there doesn't matter.Trojans aren everywhere even the hardware in some instances, hardware Trojans could even open backdoors in custom silicon. BodyOutsourcing has reshaped the way electronics products are made – and helped to cut manufacturing costs massively. But, as production margins have fallen, so too has trust in the organisations that make up the supply chain. Companies which rely on outsourced manufacturing are having to come up with ways of ensuring that the products shipped to them have not had secure keys leaked or stuffed with viruses and compromised software. Even custom silicon is not safe.Almost a decade ago, researchers from Case Western Reserve University described to delegates at the IEEE High-Level Design Validation and Test Workshop the ways in which they could see hardware malware – or Trojans – being introduced to an IC-design project. The widespread use of foundry services, third-party intellectual property and standard-cell libraries – as well as designers bribed to make circuit-level changes – all provide ways in which Trojans could be sneaked into circuitry.Once it receives a trigger signal, the Trojan could open a backdoor to the group that wanted it introduced. In some use-cases, the Trojan may be introduced simply to compromise the product; no matter how it is used. However, the nature of IC design makes hardware Trojans difficult to deploy as they require skills and levels of access that are probably out of reach of most cybercriminals. But other, lower hanging, fruit remains available to them. State actors have the skills, access and motive that may make the surrepticious deployment of some kinds of silicon highly attractive to them. In practice, such organisations may not bother trying to introduce backdoors without the knowledge of the manufacturer or find other ways to make gain access to secrets. In 2015, the BBC identified declassified documents that confirmed the government convinced Crypto AG in the mid-1950s to compromise the security of its C-52 electromechanical encryption machines. Rather than making physical changes to the hardware itself, the company told the US National Security Agency (NSA) and the UK’s GCHQ which models target governments had bought – a practice that would allow the agencies to target decryption resources more effectively. In 2013, the NSA came under suspicion of encouraging the use of algorithms supplied by specialist RSA that had been subtly weakened to make decryption easier. While some ICs behave as if they have Trojans installed, in reality the backdoors were placed intentionally into the silicon by authorised designers. Usually, they are debug aids that were meant to stay secret, but often did not. Five years ago, Sergei Skorobogatov of the University of Cambridge and Christopher Woods of Quo Vadis Labs used side-channel emissions from the devices to uncover the key that would open the backdoor in the JTAG circuitry of an FPGA and to provide access to the encryption keys stored inside. Although side-channel emissions provide one way to determine whether an IC has been compromised with a backdoor, designers have other options available through the deployment of EDA techniques with Trojan detection in mind. As with anything in cybersecurity, a cat-and-mouse game has produced ever more subtle ways of introducing Trojans and more powerful ways of detecting them. The hardware Trojan is the subject of regular hacking competitions between research teams. For example, the Cyber Security Awareness Week (CSAW) organised by New York University has run several challenges around Trojans. In these challenges, red teams try to circumvent the detection mechanisms used by blue teams. 2013’s CSAW challenge focused on methods to beat FANCI, a largely effective detector developed at Columbia University and NYU. FANCI works on the basis that a Trojan would only have a loose connection to the design such that its logic would seem to be practically unreachable. Code-coverage analysis of the RTL can identify such unconnected lumps of circuitry and flag them up as possible Trojans. A couple of years later, the DeTrust technique created by Jie Zhang and colleagues at the Chinese University of Hong Kong showed one method for fooling FANCI: spreading the suspicious logic across many otherwise independent gates. Months later, Syed Haider and coworkers from the University of Connecticut developed the hardware Trojan catcher (HaTCH), designed to track down stealthier functions inserted at the logic level. Rather than isolate the Trojans before manufacture so they can be removed, HaTCH focuses on remediation. It adds tagging circuitry to legitimate cores that work to prevent any on chip Trojans from activating or succeeding in displaying malicious behaviour, such as opening a backdoor. A more wide-ranging technique that could serve as a defence against Trojans is to insist that all IP be supplied with formal proofs that describe the operations it would be allowed to perform. Any changes would be flagged by formal-verification tools during design and prototyping. Such approaches could still be vulnerable to attacks that tweak designs below the abstraction of RTL. As with the cases where the NSA is understood to have sought the help of manufacturers, weakened encryption is one of the most likely ways in which a practical hardware Trojan might work and evade detection by all but side-channel analysis. And it is possible using a tiny change at manufacture according. At the 2013 International Workshop on Cryptographic Hardware and Embedded Systems, Georg Becker and colleagues from the University of Massachusetts at Amherst showed a proof of concept that simply switched dopants used for one of the transistors in an inverter within a larger AOI standard cell (see figure 1). The result would be an inverter that generated a constant output.A transistor that no longer switched might be caught by a scan test looking for stuck-at faults. But embedded in a pseudorandom number generator, the inverter’s problem could be very hard to track down. Once there, the Amherst team estimated the fault could massively reduce the entropy of the random numbers it produced, resulting in very weak cryptographic keys. In 2014, Takeshi Sugawara of Mitsubishi Electric and a team from the company and Ritsumeikan University showed such a tiny change in manufacturing could be detected after the fact. A combination of focused ion beams and scanning electron microscopy can reveal the dopants diffused into the substrate. It is an expensive proposition, involving delayering of the design and extensive analysis against a layout that contains a map of the expected dopants. However, for the kinds of high-value cryptographic IC that might be the targets of well-financed attackers, it is arguably one more in a list of checks that are readily justified. As with other areas of embedded cybersecurity, the most feasible approach to dealing with the risk of hardware Trojans is one of focusing effort. Architectures such as Trustzone pull functions that need high levels of protection into a small portion of the overall SoC. In principle, this subset is much easier to verify than a design that calls for the either chip to analysed for vulnerabilities. If the secure core is guaranteed to not leak information or provide trapdoors, the value to an attacker of putting a Trojan in the more weakly protected part of the SoC diminishes greatly. For the user of SoCs and the buyer of IP to go into them, the question then becomes one of the level of expected risk and the degree of trust they can put in staff, suppliers and contractors.