The Kynix Blog

A new type of transistor that could make possible fast and low-power computing devices for energy-constrained applications such as smart sensor networks, implantable medical electronics and ultra-mobile computing is feasible, according to Penn State researchers. Called a near broken-gap tunnel field effect transistor (TFET), the new device uses the quantum mechanical tunneling of electrons through an ultrathin energy barrier to provide high current at low voltage.Penn State, the National Institute of Standards and Technology and IQE, a specialty wafer manufacturer, jointly presented their findings at the International Electron Devices Meeting in Washington, D.C. The IEDM meeting includes representatives from all of the major chip companies and is the recognized forum for reporting breakthroughs in semiconductor and electronic technologies.Tunnel field effect transistors are considered to be a potential replacement for current CMOS transistors, as device makers search for a way to continue shrinking the size of transistors and packing more transistors into a given area. The main challenge facing current chip technology is that as size decreases, the power required to operate transistors does not decrease in step. The results can be seen in batteries that drain faster and increasing heat dissipation that can damage delicate electronic circuits. Various new types of transistor architecture using materials other than the standard silicon are being studied to overcome the power consumption challenge."This transistor has previously been developed in our lab to replace MOSFET transistors for logic applications and to address power issues," said lead author and Penn State graduate student Bijesh Rajamohanan. "In this work we went a step beyond and showed the capability of operating at high frequency, which is handy for applications where power concerns are critical, such as processing and transmitting information from devices implanted inside the human body." For implanted devices, generating too much power and heat can damage the tissue that is being monitored, while draining the battery requires frequent replacement surgery. The researchers, led by Suman Datta, professor of electrical engineering, tuned the material composition of the indium gallium arsenide/gallium arsenide antimony so that the energy barrier was close to zero—or near broken gap, which allowed electrons to tunnel through the barrier when desired. To improve amplification, the researchers moved all the contacts to the same plane at the top surface of the vertical transistor.This device was developed as part of a larger program sponsored by the National Science Foundation through the Nanosystems Engineering Research Center for Advanced Self-Powered Systems of Integrated Sensors and Technologies (NERC-ASSIST). The broader goal of the ASSIST program is to develop battery-free, body-powered wearable health monitoring systems with Penn State, North Carolina State University, University of Virginia, and Florida International University as participating institutions.   

Researchers at Chalmers University of Technology, Sweden, have demonstrated an integrated amplifier with the lowest noise performance so far. The amplifier offers new possibilities for detecting the faintest electromagnetic radiation, for example from distant galaxies.Last year, Chalmers reported a world record for a low-noise amplifier in the prestigious journal Electron Device Letters. The amplifier exhibited a minimum noise figure of 0.018 dB across a bandwidth of 4-8 GHz. However, since the low-noise amplifier was designed in a hybrid solution, scaling up to larger quantities turned out to be very difficult.Chalmers has now in collaboration with a company called Low-Noise Factory published an article on an integrated ultra-low-noise amplifier. The scientists have developed a unique indium phosphide-based process for what is known as high electron mobility transistors (HEMT). Transistors and other semiconductor components have been fabricated on a monolithic chip on an indium phosphide wafer. All parts of the design such as semiconductor layers, components, process and circuit design have been optimised for the lowest noise performance.As a result, an integrated 2.0 x 0.75 mm amplifier with an ultra-low-noise figure of 0.045 dB was demonstrated. The amplifier had a very large bandwidth of 0.5-13 GHz and a high gain exceeding 38 dB across the frequency band. In order to show such extreme performance, the amplifier was cooled to minus 260 degrees of Celsius."The combination of high gain, large bandwidth and ultra-low-noise figure makes this circuit very attractive for large multipixel arrays containing thousands of antennas," says Jan Grahn, research group leader at Chalmers."The integrated ultra-low-noise process enables the fabrication of thousands of amplifiers with identical performance. One potential future application is in the world's largest radio telescope SKA (Square Kilometer Array) that is being planned, an international project where the Onsala Space Observatory at Chalmers is one of the acting members. In huge applications such as the SKA, even a small noise-figure reduction in the first low-noise amplifier in the receiver chain may potentially bring about major savings in the final system design." 

Thermal Solution Resources, LLC (TSR) introduced the world's smallest wireless LED lamp – the intelliSSL MR16 – which can be controlled remotely from IOS, Android or Windows smartphones, tablets or PCs. The intelliSSL lamp incorporates an ultra-compact driver architecture with a powerful antenna system, designed to maximize reception strength, and uses the ultra-low-power JN5168 wireless microcontroller from NXP Semiconductors N.V.. The TSR intelliSSL wireless MR16 lamp will be featured in the NXP booth this week at LIGHTFAIR (no. 2453) and the LEDdynamics booth (no. 100), as well as the ZigBee Alliance booth (no. 3251) as part of a ZigBee Light Link network. The patent-pending intelliSSL design provides strong wireless reception, eliminating signal interference even under high temperatures, while conforming to a standard ANSI format – 1.98 inches in diameter and 1.98 inches in length – with a GU 5.3 base. A GU 10 base version is planned for release later this year. Compliant with the IEEE 802.15.4 standard for wireless communication, TSR's new wireless MR16 LED can be used with a wide range of network software stacks, including ZigBee Light Link, ZigBee Home Automation and JenNet-IP. The intelliSSL smart MR16 LED is ideal for commercial, architectural and outdoor lighting installations, as well as general lighting applications. "Wireless lighting control is becoming a strategic investment for commercial and residential buildings, with significant ROI in terms of energy savings and total cost of ownership, as well as safety and security," said Mikhail Sagal, president of Thermal Solution Resources. "With the world's first wireless MR16 LED, we've opened a host of new use cases for wireless smart lighting. The flexible, ultra-compact design of the intelliSSL lamp enables wireless LED replacement lamps to be integrated in nearly any type of lighting installation, as well as security systems and devices such as motion sensors, cameras and automated shade controls." The intelliSSL smart MR16 LED lamp is made with TSR's moduLED design, which eliminates thermal bottlenecks and inefficient assembly steps, while strengthening wireless range and data accuracy. TSR, a design and manufacturing firm for LED lighting headquartered in Rhode Island, offers unique expertise and IP in thermal management, LED lighting design, manufacturing and wireless integration. "Wireless smart lighting has been embraced enthusiastically by tech-savvy consumers. Now with the first wirelessly-enabled MR16 from TSR, we expect to see broader adoption, also by businesses, for commercial and architectural lighting installations," said Marcel Walgering, general manager, smart home and energy product line, NXP Semiconductors. "As part of a connected home, smart building or intelligent city network, smart LEDs have the potential to significantly change the way we manage lighting, security and energy consumption on a grand scale."  

Stream video on your smartphone, or use its GPS for an hour or two, and you'll probably see the battery drain significantly. As data rates climb and smartphones adopt more power-hungry features, battery life has become a concern. Now a technology developed by MIT spinout Eta Devices could help a phone's battery last perhaps twice as long, and help to conserve energy in cell towers.The primary culprit in smartphone battery drain is an inefficient power amplifier, a component that is designed to push the radio signal out through the phones' antennas. Similar larger modules are found in wireless base stations, where they might use 10 or even 100 times the power.Prepared to send sizeable chunks of data at any given time, the amplifiers stay at maximum voltage, eating away power—more than any other smartphone component, and about 75 percent of electricity consumption in base stations—and wasting more than half of that power as heat. This means smartphone batteries lose longevity, and base stations waste energy and lose money.But Eta Devices has developed a chip (for smartphones) and a shoebox-size module (for base stations)—based on nearly a decade of MIT research—to essentially "switch gears" to adjust voltage supply to power amplifiers as needed, cutting the waste."You can look at our technology as a high-speed gearbox that, every few nanoseconds, modulates the amount of power that the power amplifier draws from the battery," explains Joel Dawson, Eta Devices' chief technology officer and a former associate professor of electrical engineering and computer science who co-invented the technology. "That turns out to be the key to keeping the efficiency very high."When trialed in a base station last year, Eta Devices' module became the first transmitter for 4G LTE networks to achieve an average efficiency greater than 70 percent, Dawson says. "The highest number we've heard before that was 45 percent—and that's probably being generous," he says.Backed by millions in funding, Eta Devices—co-founded by David Perreault, an MIT professor of electrical engineering, and former MIT Sloan fellow Mattias Astrom—has partnered with a large base-station manufacturer. The goal is to deploy the technology in live base stations by the end of 2015. The savings could be substantial, Dawson says, noting that a large carrier could save $100 million in annual electricity costs.Eta Devices has also entered conversations with major manufacturers of LTE-enabled smartphones to incorporate their chips by the end of next year. Dawson says this could potentially double current smartphone battery life.Besides battery life, Dawson adds, there are many ways the telecommunications industry can take advantage of improved efficiency. Eta Devices' approach could lead to smaller handset batteries, for example, and even smaller handsets, since there would be less dissipating heat. The technology could also drive down operating costs for base stations in the developing world, where these stations rely on expensive diesel fuel for power.And ultimately, it could impact the environment: If all midsized carrier networks were to replace current radio amplifiers with Eta Devices' technology, he says, the reduction in greenhouse gases would be equivalent to taking about 5 million cars off the road. "There are so many ways to leverage high efficiency if you have it," Dawson says.In August, the World Economic Forum named Eta Devices the 2015 Technology Pioneer, a designation awarded previously to Dropbox, Spotify, and Twitter, to name a few.In the mobile marketEta Devices' commercial success is, in part, a product of engineering ingenuity intersecting with business acumen at MIT.In 2008, Dawson and Perreault, who directs the Power Electronics Research Group, submitted an early concept of the Eta technology—then called asymmetrical multilevel outphasing (AMO)—to an Innovation Teams (i-Teams) class that brought together MIT students from across disciplines to develop commercial products.The AMO technology was a new transmitter architecture, where algorithms could choose from different voltages needed to transmit data in each power amplifier, and select the optimal choice for power conservation—and do so roughly 20 million times per second. This could be done on the transmitting and receiving end of data transfers.This caught the eye of Astrom, who had come to MIT after working in the mobile industry for 10 years, "looking for the next big thing." With help from Astrom, the professors started designing the technology for the mobile market—initially leaning toward base stations."At the time, I was suffering, as everyone else was, from my iPhone running out of battery at lunchtime," Astrom says. "The iPhone was only a year old, but you could see how much data traffic would explode."Fleshing out a business plan from an i-Teams draft, the two professors earned a Deshpande Center for Technological Innovation grant in 2009, allowing for the first demonstration of the hardware, showing a 77 percent gain in efficiency over standard systems. (A paper detailing the technology was presented at that year's IEEE Radio Frequency Integrated Circuits Symposium.)"That Deshpande Center grant was big in terms of the funding and connecting us with local venture capitalists, and really helping with being in that business mindset," Dawson says.Spinning out a company has been the best way to validate the technology—especially with novel power-electronics hardware, Dawson says. "People in our industry take ideas a lot more seriously when there's a company behind it," he says. "We had impressive performance at MIT, but now we have a team of professionals working on the technology full-time. The resulting performance numbers are jaw-dropping. Now people are going back and frantically studying the original MIT research papers."Luckily, Dawson says, several significant changes were made to those old research projects in order to develop today's ETAdvanced—so the secret ingredients of the technology are safe. "The joke I like to tell is: When I was a professor, I was going around the world trying to give the technology away," Dawson says, laughing. "If I had succeeded, then there'd be no business."Future-proofing technologyToday, Eta Devices' major advantage is that its technology is able to handle ever-increasing data bandwidths.A few major smartphone manufacturers are now using envelope tracking (ET), which adjusts voltage to power amplifiers on the fly. But by adjusting that voltage continuously, ET efficiency falls apart for 4G/LTE and 802.11ac (WiFi) wireless standards, even up to 20 MHz bandwidth. ETAdvanced, in contrast, already accommodates ultrahigh bandwidths used by newer communication standards, such as LTE Advanced (up to 80 megahertz), and the next-generation WiFi standard (up to 160 megahertz).Prepping for future communication standards is one thing that's helped the company thrive, Dawson says. "As a small company, you'll lose a fair fight with another technology—you have to have some overpowering advantage that they can't match you on," he says. "In introducing new hardware, you not only have to be better than the product of today, but also have to make compelling case for being future-proof."  

By combining 3D holographic lithography and 2D photolithography, researchers from the University of Illinois at Urbana-Champaign have demonstrated a high-performance 3D microbattery suitable for large-scale on-chip integration with microelectronic devices."This 3D microbattery has exceptional performance and scalability, and we think it will be of importance for many applications," explained Paul Braun, a professor of materials science and engineering at Illinois. "Micro-scale devices typically utilize power supplied off-chip because of difficulties in miniaturizing energy storage technologies. A miniaturized high-energy and high-power on-chip battery would be highly desirable for applications including autonomous microscale actuators, distributed wireless sensors and transmitters, monitors, and portable and implantable medical devices.""Due to the complexity of 3D electrodes, it is generally difficult to realize such batteries, let alone the possibility of on-chip integration and scaling. In this project, we developed an effective method to make high-performance 3D lithium-ion microbatteries using processes that are highly compatible with the fabrication of microelectronics," stated Hailong Ning, a graduate student in the Department of Materials Science and Engineering and first author of the article, "Holographic Patterning of High Performance on-chip 3D Lithium-ion Microbatteries," appearing in Proceedings of the National Academy of Sciences."We utilized 3D holographic lithography to define the interior structure of electrodes and 2D photolithography to create the desired electrode shape." Ning added. "This work merges important concepts in fabrication, characterization, and modeling, showing that the energy and power of the microbattery are strongly related to the structural parameters of the electrodes such as size, shape, surface area, porosity, and tortuosity. A significant strength of this new method is that these parameters can be easily controlled during lithography steps, which offers unique flexibility for designing next-generation on-chip energy storage devices."Enabled by a 3D holographic patterning technique—where multiple optical beams interfere inside the photoresist creating a desirable 3D structure—the battery possesses well-defined, periodically structured porous electrodes, that facilitates the fast transports of electrons and ions inside the battery, offering supercapacitor-like power."Although accurate control on the interfering optical beams is required to construct 3D holographic lithography, recent advances have significantly simplified the required optics, enabling creation of structures via a single incident beam and standard photoresist processing. This makes it highly scalable and compatible with microfabrication," stated John Rogers, a professor of materials science and engineering, who has worked with Braun and his team to develop the technology."Micro-engineered battery architectures, combined with high energy material such as tin, offer exciting new battery features including high energy capacity and good cycle lives, which provide the ability to power practical devices," stated William King, a professor of mechanical science and engineering, who is a co-author of this work.   

Using microfluidic passages cut directly into the backsides of production field-programmable gate array (FPGA) devices, Georgia Institute of Technology researchers are putting liquid cooling right where it's needed the most - a few hundred microns away from where the transistors are operating.Combined with connection technology that operates through structures in the cooling passages, the new technologies could allow development of denser and more powerful integrated electronic systems that would no longer require heat sinks or cooling fans on top of the integrated circuits. Working with popular 28-nanometer FPGA devices made by Altera Corp., the researchers have demonstrated a monolithically-cooled chip that can operate at temperatures more than 60 percent below those of similar air-cooled chips.In addition to more processing power, the lower temperatures can mean longer device life and less current leakage. The cooling comes from simple de-ionized water flowing through microfluidic passages that replace the massive air-cooled heat sinks normally placed on the backs of chips."We believe we have eliminated one of the major barriers to building high-performance systems that are more compact and energy efficient," said Muhannad Bakir, an associate professor and ON Semiconductor Junior Professor in the Georgia Tech School of Electrical and Computer Engineering. "We have eliminated the heat sink atop the silicon die by moving liquid cooling just a few hundred microns away from the transistors. We believe that reliably integrating microfluidic cooling directly on the silicon will be a disruptive technology for a new generation of electronics."Liquid cooling has been used to address the heat challenges facing computing systems whose power needs have been increasing. However, existing liquid cooling technology removes heat using cold plates externally attached to fully packaged silicon chips - adding thermal resistance and reducing the heat-rejection efficiency.To make their liquid cooling system, Bakir and graduate student Thomas Sarvey removed the heat sink and heat-spreading materials from the backs of stock Altera FPGA chips. They then etched cooling passages into the silicon, incorporating silicon cylinders approximately 100 microns in diameter to improve heat transmission into the liquid. A silicon layer was then placed over the flow passages, and ports were attached for the connection of water tubes.In multiple tests - including a demonstration for DARPA officials in Arlington, Virginia - a liquid-cooled FPGA was operated using a custom processor architecture provided by Altera. With a water inlet temperature of approximately 20 degrees Celsius and an inlet flow rate of 147 milliliters per minute, the liquid-cooled FPGA operated at a temperature of less than 24 degrees Celsius, compared to an air-cooled device that operated at 60 degrees Celsius.Sudhakar Yalamanchili, a professor in the Georgia Tech School of Electrical and Computer Engineering and one of the research group's collaborators, joined the team for the DARPA demonstration to discuss electrical-thermal co-design."We have created a real electronic platform to evaluate the benefits of liquid cooling versus air cooling," said Bakir. "This may open the door to stacking multiple chips, potentially multiple FPGA chips or FPGA chips with other chips that are high in power consumption. We are seeing a significant reduction in the temperature of these liquid-cooled chips."The research team chose FPGAs for their test because they provide a platform to test different circuit designs, and because FPGAs are common in many market segments, including defense. However, the same technology could also be used to cool CPUs, GPUs and other devices such as power amplifiers, Bakir said.In addition to improving overall cooling, the system could reduce hotspots in circuits by applying cooling much closer to the power source. Eliminating the heat sink could allow more compact packaging of electronic devices - but only if electrical connection issues are also addressed.In a separate research project, Bakir's group has demonstrated the fabrication of copper vias that would run through the silicon columns that are part of the cooling structure fabricated on the FPGAs. Graduate student Hanju Oh, co-advised with College of Engineering Dean Gary May, fabricated high aspect ratio copper vias through the silicon columns, reducing the capacitance of the connections that would carry signals between chips in an array."The moment you start thinking about stacking the chips, you need to have copper vias to connect them," Bakir said. "By bringing system components closer together, we can reduce interconnect length and that will lead to improvements in bandwidth density and reductions in energy use."The cooling research was funded by DARPA's Microsystems Technology Office, through the ICECOOL program. At Georgia Tech, DARPA funds two major cooling and system integration projects, one called STAECool directed by George W. Woodruff School of Mechanical Engineering Professor Yogendra Joshi, and the other, called SuperCool, that is directed by Bakir. In collaboration with the STAECool effort, Bakir and Joshi, along with Professors Andrei Fedorov and Suresh Sitaraman from the School of Mechanical Engineering, developed a thermal design vehicle to emulate challenging power maps to test the benefits of microfluidic cooling."We have reached an important milestone that we hope to use as a stepping stone to reach other objectives," said Bakir. "There is still a big challenge ahead, but we expect this to allow much denser, higher-performance computing systems that will dissipate less power. We can think of many interesting applications for these cooling technologies."Altera's principal investigator for the project, Arifur Rahman, said: "Future high-performance semiconductor electronics will be increasingly dominated by thermal budget and ability to remove heat. The embedded microfluidic channels provide an intriguing option to remove heat from future microelectronics systems."