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Using microfluidic passages cut directly into the backsides of production field-programmable gate array (FPGA) devices, Georgia Institute of Technology researchers are putting liquid cooling right where it's needed the most - a few hundred microns away from where the transistors are operating.Combined with connection technology that operates through structures in the cooling passages, the new technologies could allow development of denser and more powerful integrated electronic systems that would no longer require heat sinks or cooling fans on top of the integrated circuits. Working with popular 28-nanometer FPGA devices made by Altera Corp., the researchers have demonstrated a monolithically-cooled chip that can operate at temperatures more than 60 percent below those of similar air-cooled chips.In addition to more processing power, the lower temperatures can mean longer device life and less current leakage. The cooling comes from simple de-ionized water flowing through microfluidic passages that replace the massive air-cooled heat sinks normally placed on the backs of chips."We believe we have eliminated one of the major barriers to building high-performance systems that are more compact and energy efficient," said Muhannad Bakir, an associate professor and ON Semiconductor Junior Professor in the Georgia Tech School of Electrical and Computer Engineering. "We have eliminated the heat sink atop the silicon die by moving liquid cooling just a few hundred microns away from the transistors. We believe that reliably integrating microfluidic cooling directly on the silicon will be a disruptive technology for a new generation of electronics."Liquid cooling has been used to address the heat challenges facing computing systems whose power needs have been increasing. However, existing liquid cooling technology removes heat using cold plates externally attached to fully packaged silicon chips - adding thermal resistance and reducing the heat-rejection efficiency.To make their liquid cooling system, Bakir and graduate student Thomas Sarvey removed the heat sink and heat-spreading materials from the backs of stock Altera FPGA chips. They then etched cooling passages into the silicon, incorporating silicon cylinders approximately 100 microns in diameter to improve heat transmission into the liquid. A silicon layer was then placed over the flow passages, and ports were attached for the connection of water tubes.In multiple tests - including a demonstration for DARPA officials in Arlington, Virginia - a liquid-cooled FPGA was operated using a custom processor architecture provided by Altera. With a water inlet temperature of approximately 20 degrees Celsius and an inlet flow rate of 147 milliliters per minute, the liquid-cooled FPGA operated at a temperature of less than 24 degrees Celsius, compared to an air-cooled device that operated at 60 degrees Celsius.Sudhakar Yalamanchili, a professor in the Georgia Tech School of Electrical and Computer Engineering and one of the research group's collaborators, joined the team for the DARPA demonstration to discuss electrical-thermal co-design."We have created a real electronic platform to evaluate the benefits of liquid cooling versus air cooling," said Bakir. "This may open the door to stacking multiple chips, potentially multiple FPGA chips or FPGA chips with other chips that are high in power consumption. We are seeing a significant reduction in the temperature of these liquid-cooled chips."The research team chose FPGAs for their test because they provide a platform to test different circuit designs, and because FPGAs are common in many market segments, including defense. However, the same technology could also be used to cool CPUs, GPUs and other devices such as power amplifiers, Bakir said.In addition to improving overall cooling, the system could reduce hotspots in circuits by applying cooling much closer to the power source. Eliminating the heat sink could allow more compact packaging of electronic devices - but only if electrical connection issues are also addressed.In a separate research project, Bakir's group has demonstrated the fabrication of copper vias that would run through the silicon columns that are part of the cooling structure fabricated on the FPGAs. Graduate student Hanju Oh, co-advised with College of Engineering Dean Gary May, fabricated high aspect ratio copper vias through the silicon columns, reducing the capacitance of the connections that would carry signals between chips in an array."The moment you start thinking about stacking the chips, you need to have copper vias to connect them," Bakir said. "By bringing system components closer together, we can reduce interconnect length and that will lead to improvements in bandwidth density and reductions in energy use."The cooling research was funded by DARPA's Microsystems Technology Office, through the ICECOOL program. At Georgia Tech, DARPA funds two major cooling and system integration projects, one called STAECool directed by George W. Woodruff School of Mechanical Engineering Professor Yogendra Joshi, and the other, called SuperCool, that is directed by Bakir. In collaboration with the STAECool effort, Bakir and Joshi, along with Professors Andrei Fedorov and Suresh Sitaraman from the School of Mechanical Engineering, developed a thermal design vehicle to emulate challenging power maps to test the benefits of microfluidic cooling."We have reached an important milestone that we hope to use as a stepping stone to reach other objectives," said Bakir. "There is still a big challenge ahead, but we expect this to allow much denser, higher-performance computing systems that will dissipate less power. We can think of many interesting applications for these cooling technologies."Altera's principal investigator for the project, Arifur Rahman, said: "Future high-performance semiconductor electronics will be increasingly dominated by thermal budget and ability to remove heat. The embedded microfluidic channels provide an intriguing option to remove heat from future microelectronics systems."   

Japan's Toshiba is teaming up with US chip giant SanDisk to produce a "3D" memory chip they hope will allow users to save up to 50 hours of ultra-high definition video.In a deal worth a reported 500 billion yen ($4.84 billion) the companies will build a factory to make flash memory consisting of several layers of semiconductors stacked together to give as much as a terabyte—1,000 gigabytes—of storage.That is around 16 times bigger than the largest 64-gigabyte Toshiba memory currently available in smart phones and tablet devices.Toshiba will demolish its existing plant in Japan to build a new facility that will house production apparatus using technologies from both firms and which the firms hope will start operating in 2016, a statement said."In about five years (from the planned start of the factory), we would like to produce one-terabyte products," said a Toshiba spokeswoman.The plan comes at a time of increasing competition among the world's technology firms to meet demand for ever-higher capacity memory chips for consumers increasingly using mobile devices such as smart phones, tablet computers and wearable gadgets.The spread of high-definition video, with so-called 4K screens at the leading edge, is boosting demand for computing memory to store content."Small, high-capacity memories can of course be applied to smartphones, but they could also be used for wearable devices," the Toshiba spokeswoman said.Manufacturers have traditionally competed with regular chips by trying to make the physical object smaller.Toshiba, along with major rivals such as Samsung, believe they are reaching the physical limit, and are shifting toward 3D memories, where layering—effectively a third dimension—is used to boost the capacity of objects the same size.Yasuo Naruke, Toshiba senior vice president, said in a statement: "Our determination to develop advanced technologies underlines our commitment to respond to continued demand (for) flash memory."SanDisk president and chief executive Sanjay Mehrotra said the plant "will advance our leadership in memory technology into the 3D... era". 

The ongoing research in the field of microelectronics and semiconductor microchips is made by Dr. Yue Kuo, professor in the Artie McFerrin Department of Chemical Engineering at Texas A&M University, is continuing, which is evolving everyday technology such as cellphones, televisions, computers and more through the use of light emitting diodes (LED).Kuo's research group focuses on the development of semiconductors for micro and nano electronic uses. This has entailed working with technologies from television screens to devices like universal serial bus (USB) flash drives to make them faster, smaller and more power efficient.Kuo and his research group have developed a new type of LED known as a solid state incandescent light emitting device (SSI-LED). This device would emit light for an extended lifetime at a very low energy cost. Kuo currently has one of these LEDs his group has deployed that has been continuously emitting light for in excess of 18,000 hours. The development of these LED devices has progressed from the same kind of technology that powered the first incandescent light bulb developed by Thomas Edison."The chips used to make electronic devices work from the vacuum tube," Kuo said. "It was invented in 1907, and this tube was big. The first computer ever invented was made of thousands of these tubes. However, these vacuum tubes are not very reliable and the power consumption is very high and they burn out easily."Kuo explains that technology has leaped from the vacuum tube, to transistor, to the modern microchip, which enables scientists to fit billions and billions of transistors into a single chip. Beyond microchips are the semiconductors that Kuo primarily works with that form the essential computer hardware components of electronic circuits. While advanced, similar issues that plagued traditional vacuum tubes such as a short life span and energy inefficiency, still effect modern day semiconductors, according to Kuo."What I and my group have done is invented a new light bulb that is very similar in comparison to the leap from a vacuum tube to a computer chip," Kuo said. "We make a small chip with no vacuum that can emit light, but is so small, smaller than your fingernail, that it will not burn out after even 20,000 hours of use.For comparison, current larger incandescent light bulbs have a maximum lifespan of around 2,000 hours of use, meaning that Kuo's SSI-LED is both more energy efficiency and has greater device longevity than conventional technology in addition to being no bigger than a human fingernail. The SSI-LED that Kuo and his group have developed has many uses, one of which includes potentially using the light emitting technology to transfer electrical signals within computing devices. Kuo believes that a development of this magnitude would change the way everyday computer users are able to communicate with one another."The computer chips we have today are very fast, but as you know nothing satisfies us and no matter how fast we have, we want faster," Kuo said. "We've come, in terms of the modern design for computer chips, almost near the limit. The current speed is limited by how fast the signal is transmitted by metal. What we want to do is to transmit signals by light."The LED Kuo's group has invented is made out of silicon, giving it the potential to transmit signals in machines by light. This method would send signals tens of thousands of times faster than current transmission methods allow."SSI-lEDs are an extension of Edison's technology in a way," Kuo said. "Inside each are many, many small dots that emit light, each one is like Edison's lamp. The engineers in my group use chemical engineering training to make computer chips and transistors that we make into things like your LCD TV's that affect the lives of all people every day and that kind of potential is limitless." 

Vendors and consumers can agree: connectivity matters, and not just poetically speaking, or in the context of social networking. As for many, staying digitally connected is quite real a requirement and has become a lifeline of its own, in terms of ability to do work and in terms of access to vital information. San Diego-based Ethertronics is a business that provides connectivity via antenna and RF systems solutions. On Tuesday the company announced news of an active steering IC, with embedded processor for Multiple Input Multiple Output (MIMO) applications. This is the EC482, with potential impact on cable and satellite markets. The company said its team can integrate EC482 products, including access points, set-top boxes, WiFi clients, WiFi extenders, wearables and other Internet of Things (IoT) devices.Translating what this means, Gigaom's senior writer Kevin Fitchard, who covers mobile broadband, carriers and wireless technologies, said that the new chip from Ethertronics "will bring its active steering algorithms to Wi-Fi antennas, increasing their range and boosting their throughput in less than optimal conditions." Ethertronics Chief Scientist Jeff Shamblin told Firchard that with the new version of the EtherChip, "active steering helps signals navigate multiple walls and ceilings which often separate a router from a Wi-Fi device."Quoted in RCR Wireless News, Shamblin, referring to the Active Steering technology, said, "Now that we can dynamically control the radiation pattern, not only can we improve the communication link you're trying to establish, we can start to null out interfering sources, so it brings interference mitigation."The EE Times explained that the company was leveraging its experience developing embedded antennas to create a line of dedicated beamforming chips. "Algorithms on EC482's processor monitor RF link performance on a wireless device to generate up to four radiation patterns and select the optimal antenna for the best performance," wrote Jessica Lipsky, associate editor. "The company's EtherChip EC482 aims to improve RF signal for Wi-Fi and 5 GHz backend applications."The company said the EtherChip EC482 had "superior single- and multi-antenna performance at frequencies even beyond the WiFi high-band." The operating frequency range is 100 MHz to 7000 MHz. The small footprint is just 3.0 x 3.0 x 0.75 mm3 in a QFN 24-pin package. Very low power consumption is required for operation, said the news release, which makes the EC482 suitable for even battery-operated systems.Ethertronics will show its new EtherChip EC482 and "Active Steering" solutions during Mobile World Congress next month in Barcelona.Laurent Disclos, Ethertronics CEO, shared his predictions in January for the new year in RCR Wireless News. "Regardless of the application – streaming a favorite show via a 5 GHz set-top box, keeping tabs on one's health via a wearable, or simply placing a voice call via a smartphone – the antenna is the only RF sensor in a wireless device, and those of us working to make that heartbeat stronger will have an exciting year in 2015, and beyond." 

Linear Technology introduces the LTM4631, a dual 10-A or single 20-A µModule (power module) step-down regulator in a 1.91-mm-high LGA package with a 16 x 16-mm footprint. The packaging is what makes this module significant and sets it apart from the competition. Why? Because the device provides a regulator, including the inductor, in one package, while others, like Intersil and Altera/Enpirion, need two chips for the solution. That means that the Linear product needs 400 mm2 compared to the 750 mm2 for the Intersil product and about 600 mm2 for the Altera/Enpirion solutions. At 1.91 mm, the height of the package is also very significant because it means it’s under 2.00 mm, which is a barrier to designs that aim to provide solutions for the underside of the PCB. Presently, Altera/Enpirion, at 1.85 mm, is the only other company that can offer a solution profile less than 2.00 mm. The LTM4631 regulator, although a very significant achievement in packaging, is not a solution for every design because not everyone is looking for a cutting-edge solution. However, for the targeted markets, designers could find this device to be aspirin for their design pains. It is a solution you can’t find anywhere else. The micro-module can be placed on a PCB very close to the load, such as an FPGA, and can share one heat sink covering both of the low-profile packages. It frees space on the topside for components such as DDR-QDR memory and transceiver ICs. Examples of applications include plug-in and mezzanine cards in embedded systems, data storage systems, gateway controllers, and 40- to 100-Gbps networks. These applications are very competitive and gaining space as shown in the figure is a significant advantage, to system designers.  When I first looked at this product, I was very impressed with the specs, especially the packaging, but the price could give you heartburn. Some companies with the technical chops could design a discrete solution for a much lower cost, but then there’s the obvious problem of excessive footprint caused by all of those components. There is also a potential of reduced reliability with discretes. At $24.88 ea/1,000, deciding to use this product isn’t quite a no-brainer, but if you do, it means that you want to spend your engineering time on what you design best, such as embedded systems or gateway controllers, and getting the extra board space for your latest product.  The LTM4631 wasn’t just a simple redesign of what Linear already offered, although according to Afshin Odabaee, business unit manager of power modules for Linear Technology, at the start of the regulator design, they thought it would take about six months to finish. It took much longer to finish — almost 2 years. But they learned a lot along the way, such as how to get the inductor smaller, what materials to use in the inductor, and even how to get the accuracy down to 1.5% for the total dc output error over line, load and temperature. The specs for the LTM4631 show that it operates from 4.5- to 15-V input supplies and regulates an output voltage from 0.6 to 1.8 V with ±1.5% maximum total dc output voltage error from –40°C to 125°C. Its two outputs operate 180° out-of-phase, each capable of delivering 10 A or 20 A when the outputs current share. Two devices can current share, delivering up to 40 A while minimizing input and output ripple current. The device features output overcurrent foldback and overvoltage protection. 

Silicon memory chips come in two broad types: volatile memory, such as computer RAM that loses data when the power is turned off, and nonvolatile flash technologies that store information even after we shut off our smartphones.In general, volatile memory is much faster than nonvolatile storage, so engineers often balance speed and retention when picking the best memory for the task. That's why slower flash is used for permanent storage. Speedy RAM, on the other hand, works with processors to store data during computations because it operates at speeds measured in nanoseconds, or billionths of a second.Now Stanford-led research shows that an emerging memory technology, based on a new class of semiconductor materials, could deliver the best of both worlds, storing data permanently while allowing certain operations to occur up to a thousand times faster than today's memory devices. The new approach may also be more energy efficient."This work is fundamental but promising," said Aaron Lindenberg, an associate professor of materials science and engineering at Stanford and of photon science at the SLAC National Accelerator Laboratory. "A thousandfold increase in speed coupled with lower energy use suggests a path toward future memory technologies that could far outperform anything previously demonstrated."Lindenberg led a 19-member team, including researchers at SLAC, who detailed their experiments in Physical Review Letters.Their findings provide new insights into the experimental technology of phase-change memory.Entering a new phaseToday memory chips are commonly based on silicon technologies that efficiently switch electron flows on and off, representing the ones and zeroes that drive digital software. But researchers continue searching for new materials and processes that use less energy and require less space than silicon solutions.Phase-change memory is one possible next-generation technology. Scientists have known for some time that certain materials have flexible atomic structures that offer interesting electronic possibilities.For instance, phase-change materials can exist in two different atomic structures, each of which has a different electronic state. A crystalline, or ordered, atomic structure, permits the flow of electrons, while an amorphous, or disordered, structure inhibits electron flows.Researchers have developed ways to flip-flop the structural and electronic states of these materials – changing their phase from one to zero and back again – by applying short bursts of heat, supplied electrically or optically.Phase-change materials are attractive as a memory technology because they retain whichever electronic state conforms to their structure. Once their atoms flip or flop to form a one or a zero, the material stores that data until another energy jolt causes it to change. This ability to retain stored data makes phase-change memory nonvolatile just like the silicon-based flash memory in smartphones.But permanent storage is only one desired attribute. A next-generation memory technology also needs to perform certain operations faster than today's chips. By using extremely precise measurements and instrumentation, the researchers sought to demonstrate the speed and energy potential of phase-change technology – and what they found was encouraging."Nobody had ever been able to investigate these processes on such fast time-scales before," Lindenberg said.A faster phaseThe new research focused on the unimaginably brief interval when an amorphous structure began to switch to crystalline, when a digital zero became a digital one. This intermediate phase – where the charge flows through the amorphous structure like in a crystal – is known as "amorphous on."In the presence of a sophisticated detection system, the Stanford researchers jolted a small sample of amorphous material with an electrical field comparable in strength to a lightning strike. Their instrumentation detected that the amorphous-on state – initiating the flip from zero to one – occurred less than a picosecond after they applied the jolt.To comprehend the brevity of a picosecond, it's roughly the time it would take for a beam of light, traveling at 186,000 miles per second, to pass through two pieces of paper.Showing that phase-change materials can be transformed from zero to one by a picosecond excitation suggests that this emerging technology could store data many times faster than silicon RAM for tasks that require memory and processors to work together to perform computations.Space is always a consideration in design, and previous experiments have shown that phase-change technology has the potential to pack more data in less space, giving it a favorable storage density.Taking energy into account, researchers say the electrical field that triggered the phase change was of such a brief duration that it points toward a storage process that could become more efficient than today's silicon-based technologies.Finally, although this experiment did not establish precisely how much time would be required to completely flip an atomic arrangement from amorphous to crystalline or back, these results suggest that phase-change materials could perform superfast memory chores and permanent storage – depending on how long the thermal excitation is engineered to stay inside the material.Much work remains to turn this discovery into functioning memory systems. Nonetheless, attaining such speed using a low-energy switching technique on a material that can store more information in less space suggests that phase-change technology has the potential to revolutionize data storage."A new technology which demonstrate a thousandfold advantage over incumbent technologies is compelling," Lindenberg said. "I think we've shown that phase change deserves further attention.Written by Tom Abate