The Kynix Blog

Thermal Solution Resources, LLC (TSR) introduced the world's smallest wireless LED lamp – the intelliSSL MR16 – which can be controlled remotely from IOS, Android or Windows smartphones, tablets or PCs. The intelliSSL lamp incorporates an ultra-compact driver architecture with a powerful antenna system, designed to maximize reception strength, and uses the ultra-low-power JN5168 wireless microcontroller from NXP Semiconductors N.V.. The TSR intelliSSL wireless MR16 lamp will be featured in the NXP booth this week at LIGHTFAIR (no. 2453) and the LEDdynamics booth (no. 100), as well as the ZigBee Alliance booth (no. 3251) as part of a ZigBee Light Link network. The patent-pending intelliSSL design provides strong wireless reception, eliminating signal interference even under high temperatures, while conforming to a standard ANSI format – 1.98 inches in diameter and 1.98 inches in length – with a GU 5.3 base. A GU 10 base version is planned for release later this year. Compliant with the IEEE 802.15.4 standard for wireless communication, TSR's new wireless MR16 LED can be used with a wide range of network software stacks, including ZigBee Light Link, ZigBee Home Automation and JenNet-IP. The intelliSSL smart MR16 LED is ideal for commercial, architectural and outdoor lighting installations, as well as general lighting applications. "Wireless lighting control is becoming a strategic investment for commercial and residential buildings, with significant ROI in terms of energy savings and total cost of ownership, as well as safety and security," said Mikhail Sagal, president of Thermal Solution Resources. "With the world's first wireless MR16 LED, we've opened a host of new use cases for wireless smart lighting. The flexible, ultra-compact design of the intelliSSL lamp enables wireless LED replacement lamps to be integrated in nearly any type of lighting installation, as well as security systems and devices such as motion sensors, cameras and automated shade controls." The intelliSSL smart MR16 LED lamp is made with TSR's moduLED design, which eliminates thermal bottlenecks and inefficient assembly steps, while strengthening wireless range and data accuracy. TSR, a design and manufacturing firm for LED lighting headquartered in Rhode Island, offers unique expertise and IP in thermal management, LED lighting design, manufacturing and wireless integration. "Wireless smart lighting has been embraced enthusiastically by tech-savvy consumers. Now with the first wirelessly-enabled MR16 from TSR, we expect to see broader adoption, also by businesses, for commercial and architectural lighting installations," said Marcel Walgering, general manager, smart home and energy product line, NXP Semiconductors. "As part of a connected home, smart building or intelligent city network, smart LEDs have the potential to significantly change the way we manage lighting, security and energy consumption on a grand scale."  

Stream video on your smartphone, or use its GPS for an hour or two, and you'll probably see the battery drain significantly. As data rates climb and smartphones adopt more power-hungry features, battery life has become a concern. Now a technology developed by MIT spinout Eta Devices could help a phone's battery last perhaps twice as long, and help to conserve energy in cell towers.The primary culprit in smartphone battery drain is an inefficient power amplifier, a component that is designed to push the radio signal out through the phones' antennas. Similar larger modules are found in wireless base stations, where they might use 10 or even 100 times the power.Prepared to send sizeable chunks of data at any given time, the amplifiers stay at maximum voltage, eating away power—more than any other smartphone component, and about 75 percent of electricity consumption in base stations—and wasting more than half of that power as heat. This means smartphone batteries lose longevity, and base stations waste energy and lose money.But Eta Devices has developed a chip (for smartphones) and a shoebox-size module (for base stations)—based on nearly a decade of MIT research—to essentially "switch gears" to adjust voltage supply to power amplifiers as needed, cutting the waste."You can look at our technology as a high-speed gearbox that, every few nanoseconds, modulates the amount of power that the power amplifier draws from the battery," explains Joel Dawson, Eta Devices' chief technology officer and a former associate professor of electrical engineering and computer science who co-invented the technology. "That turns out to be the key to keeping the efficiency very high."When trialed in a base station last year, Eta Devices' module became the first transmitter for 4G LTE networks to achieve an average efficiency greater than 70 percent, Dawson says. "The highest number we've heard before that was 45 percent—and that's probably being generous," he says.Backed by millions in funding, Eta Devices—co-founded by David Perreault, an MIT professor of electrical engineering, and former MIT Sloan fellow Mattias Astrom—has partnered with a large base-station manufacturer. The goal is to deploy the technology in live base stations by the end of 2015. The savings could be substantial, Dawson says, noting that a large carrier could save $100 million in annual electricity costs.Eta Devices has also entered conversations with major manufacturers of LTE-enabled smartphones to incorporate their chips by the end of next year. Dawson says this could potentially double current smartphone battery life.Besides battery life, Dawson adds, there are many ways the telecommunications industry can take advantage of improved efficiency. Eta Devices' approach could lead to smaller handset batteries, for example, and even smaller handsets, since there would be less dissipating heat. The technology could also drive down operating costs for base stations in the developing world, where these stations rely on expensive diesel fuel for power.And ultimately, it could impact the environment: If all midsized carrier networks were to replace current radio amplifiers with Eta Devices' technology, he says, the reduction in greenhouse gases would be equivalent to taking about 5 million cars off the road. "There are so many ways to leverage high efficiency if you have it," Dawson says.In August, the World Economic Forum named Eta Devices the 2015 Technology Pioneer, a designation awarded previously to Dropbox, Spotify, and Twitter, to name a few.In the mobile marketEta Devices' commercial success is, in part, a product of engineering ingenuity intersecting with business acumen at MIT.In 2008, Dawson and Perreault, who directs the Power Electronics Research Group, submitted an early concept of the Eta technology—then called asymmetrical multilevel outphasing (AMO)—to an Innovation Teams (i-Teams) class that brought together MIT students from across disciplines to develop commercial products.The AMO technology was a new transmitter architecture, where algorithms could choose from different voltages needed to transmit data in each power amplifier, and select the optimal choice for power conservation—and do so roughly 20 million times per second. This could be done on the transmitting and receiving end of data transfers.This caught the eye of Astrom, who had come to MIT after working in the mobile industry for 10 years, "looking for the next big thing." With help from Astrom, the professors started designing the technology for the mobile market—initially leaning toward base stations."At the time, I was suffering, as everyone else was, from my iPhone running out of battery at lunchtime," Astrom says. "The iPhone was only a year old, but you could see how much data traffic would explode."Fleshing out a business plan from an i-Teams draft, the two professors earned a Deshpande Center for Technological Innovation grant in 2009, allowing for the first demonstration of the hardware, showing a 77 percent gain in efficiency over standard systems. (A paper detailing the technology was presented at that year's IEEE Radio Frequency Integrated Circuits Symposium.)"That Deshpande Center grant was big in terms of the funding and connecting us with local venture capitalists, and really helping with being in that business mindset," Dawson says.Spinning out a company has been the best way to validate the technology—especially with novel power-electronics hardware, Dawson says. "People in our industry take ideas a lot more seriously when there's a company behind it," he says. "We had impressive performance at MIT, but now we have a team of professionals working on the technology full-time. The resulting performance numbers are jaw-dropping. Now people are going back and frantically studying the original MIT research papers."Luckily, Dawson says, several significant changes were made to those old research projects in order to develop today's ETAdvanced—so the secret ingredients of the technology are safe. "The joke I like to tell is: When I was a professor, I was going around the world trying to give the technology away," Dawson says, laughing. "If I had succeeded, then there'd be no business."Future-proofing technologyToday, Eta Devices' major advantage is that its technology is able to handle ever-increasing data bandwidths.A few major smartphone manufacturers are now using envelope tracking (ET), which adjusts voltage to power amplifiers on the fly. But by adjusting that voltage continuously, ET efficiency falls apart for 4G/LTE and 802.11ac (WiFi) wireless standards, even up to 20 MHz bandwidth. ETAdvanced, in contrast, already accommodates ultrahigh bandwidths used by newer communication standards, such as LTE Advanced (up to 80 megahertz), and the next-generation WiFi standard (up to 160 megahertz).Prepping for future communication standards is one thing that's helped the company thrive, Dawson says. "As a small company, you'll lose a fair fight with another technology—you have to have some overpowering advantage that they can't match you on," he says. "In introducing new hardware, you not only have to be better than the product of today, but also have to make compelling case for being future-proof."  

By combining 3D holographic lithography and 2D photolithography, researchers from the University of Illinois at Urbana-Champaign have demonstrated a high-performance 3D microbattery suitable for large-scale on-chip integration with microelectronic devices."This 3D microbattery has exceptional performance and scalability, and we think it will be of importance for many applications," explained Paul Braun, a professor of materials science and engineering at Illinois. "Micro-scale devices typically utilize power supplied off-chip because of difficulties in miniaturizing energy storage technologies. A miniaturized high-energy and high-power on-chip battery would be highly desirable for applications including autonomous microscale actuators, distributed wireless sensors and transmitters, monitors, and portable and implantable medical devices.""Due to the complexity of 3D electrodes, it is generally difficult to realize such batteries, let alone the possibility of on-chip integration and scaling. In this project, we developed an effective method to make high-performance 3D lithium-ion microbatteries using processes that are highly compatible with the fabrication of microelectronics," stated Hailong Ning, a graduate student in the Department of Materials Science and Engineering and first author of the article, "Holographic Patterning of High Performance on-chip 3D Lithium-ion Microbatteries," appearing in Proceedings of the National Academy of Sciences."We utilized 3D holographic lithography to define the interior structure of electrodes and 2D photolithography to create the desired electrode shape." Ning added. "This work merges important concepts in fabrication, characterization, and modeling, showing that the energy and power of the microbattery are strongly related to the structural parameters of the electrodes such as size, shape, surface area, porosity, and tortuosity. A significant strength of this new method is that these parameters can be easily controlled during lithography steps, which offers unique flexibility for designing next-generation on-chip energy storage devices."Enabled by a 3D holographic patterning technique—where multiple optical beams interfere inside the photoresist creating a desirable 3D structure—the battery possesses well-defined, periodically structured porous electrodes, that facilitates the fast transports of electrons and ions inside the battery, offering supercapacitor-like power."Although accurate control on the interfering optical beams is required to construct 3D holographic lithography, recent advances have significantly simplified the required optics, enabling creation of structures via a single incident beam and standard photoresist processing. This makes it highly scalable and compatible with microfabrication," stated John Rogers, a professor of materials science and engineering, who has worked with Braun and his team to develop the technology."Micro-engineered battery architectures, combined with high energy material such as tin, offer exciting new battery features including high energy capacity and good cycle lives, which provide the ability to power practical devices," stated William King, a professor of mechanical science and engineering, who is a co-author of this work.   

Using microfluidic passages cut directly into the backsides of production field-programmable gate array (FPGA) devices, Georgia Institute of Technology researchers are putting liquid cooling right where it's needed the most - a few hundred microns away from where the transistors are operating.Combined with connection technology that operates through structures in the cooling passages, the new technologies could allow development of denser and more powerful integrated electronic systems that would no longer require heat sinks or cooling fans on top of the integrated circuits. Working with popular 28-nanometer FPGA devices made by Altera Corp., the researchers have demonstrated a monolithically-cooled chip that can operate at temperatures more than 60 percent below those of similar air-cooled chips.In addition to more processing power, the lower temperatures can mean longer device life and less current leakage. The cooling comes from simple de-ionized water flowing through microfluidic passages that replace the massive air-cooled heat sinks normally placed on the backs of chips."We believe we have eliminated one of the major barriers to building high-performance systems that are more compact and energy efficient," said Muhannad Bakir, an associate professor and ON Semiconductor Junior Professor in the Georgia Tech School of Electrical and Computer Engineering. "We have eliminated the heat sink atop the silicon die by moving liquid cooling just a few hundred microns away from the transistors. We believe that reliably integrating microfluidic cooling directly on the silicon will be a disruptive technology for a new generation of electronics."Liquid cooling has been used to address the heat challenges facing computing systems whose power needs have been increasing. However, existing liquid cooling technology removes heat using cold plates externally attached to fully packaged silicon chips - adding thermal resistance and reducing the heat-rejection efficiency.To make their liquid cooling system, Bakir and graduate student Thomas Sarvey removed the heat sink and heat-spreading materials from the backs of stock Altera FPGA chips. They then etched cooling passages into the silicon, incorporating silicon cylinders approximately 100 microns in diameter to improve heat transmission into the liquid. A silicon layer was then placed over the flow passages, and ports were attached for the connection of water tubes.In multiple tests - including a demonstration for DARPA officials in Arlington, Virginia - a liquid-cooled FPGA was operated using a custom processor architecture provided by Altera. With a water inlet temperature of approximately 20 degrees Celsius and an inlet flow rate of 147 milliliters per minute, the liquid-cooled FPGA operated at a temperature of less than 24 degrees Celsius, compared to an air-cooled device that operated at 60 degrees Celsius.Sudhakar Yalamanchili, a professor in the Georgia Tech School of Electrical and Computer Engineering and one of the research group's collaborators, joined the team for the DARPA demonstration to discuss electrical-thermal co-design."We have created a real electronic platform to evaluate the benefits of liquid cooling versus air cooling," said Bakir. "This may open the door to stacking multiple chips, potentially multiple FPGA chips or FPGA chips with other chips that are high in power consumption. We are seeing a significant reduction in the temperature of these liquid-cooled chips."The research team chose FPGAs for their test because they provide a platform to test different circuit designs, and because FPGAs are common in many market segments, including defense. However, the same technology could also be used to cool CPUs, GPUs and other devices such as power amplifiers, Bakir said.In addition to improving overall cooling, the system could reduce hotspots in circuits by applying cooling much closer to the power source. Eliminating the heat sink could allow more compact packaging of electronic devices - but only if electrical connection issues are also addressed.In a separate research project, Bakir's group has demonstrated the fabrication of copper vias that would run through the silicon columns that are part of the cooling structure fabricated on the FPGAs. Graduate student Hanju Oh, co-advised with College of Engineering Dean Gary May, fabricated high aspect ratio copper vias through the silicon columns, reducing the capacitance of the connections that would carry signals between chips in an array."The moment you start thinking about stacking the chips, you need to have copper vias to connect them," Bakir said. "By bringing system components closer together, we can reduce interconnect length and that will lead to improvements in bandwidth density and reductions in energy use."The cooling research was funded by DARPA's Microsystems Technology Office, through the ICECOOL program. At Georgia Tech, DARPA funds two major cooling and system integration projects, one called STAECool directed by George W. Woodruff School of Mechanical Engineering Professor Yogendra Joshi, and the other, called SuperCool, that is directed by Bakir. In collaboration with the STAECool effort, Bakir and Joshi, along with Professors Andrei Fedorov and Suresh Sitaraman from the School of Mechanical Engineering, developed a thermal design vehicle to emulate challenging power maps to test the benefits of microfluidic cooling."We have reached an important milestone that we hope to use as a stepping stone to reach other objectives," said Bakir. "There is still a big challenge ahead, but we expect this to allow much denser, higher-performance computing systems that will dissipate less power. We can think of many interesting applications for these cooling technologies."Altera's principal investigator for the project, Arifur Rahman, said: "Future high-performance semiconductor electronics will be increasingly dominated by thermal budget and ability to remove heat. The embedded microfluidic channels provide an intriguing option to remove heat from future microelectronics systems."   

Random-access memory, or RAM, is where computers like to store the data they're working on. A processor can retrieve data from RAM tens of thousands of times more rapidly than it can from the computer's disk drive.But in the age of big data, data sets are often much too large to fit in a single computer's RAM. The data describing a single human genome would take up the RAM of somewhere between 40 and 100 typical computers.Flash memory—the type of memory used by most portable devices—could provide an alternative to conventional RAM for big-data applications. It's about a tenth as expensive, and it consumes about a tenth as much power.The problem is that it's also a tenth as fast. But at the International Symposium on Computer Architecture in June, MIT researchers presented a new system that, for several common big-data applications, should make servers using flash memory as efficient as those using conventional RAM, while preserving their power and cost savings.The researchers also presented experimental evidence showing that, if the servers executing a distributed computation have to go to disk for data even 5 percent of the time, their performance falls to a level that's comparable with flash, anyway.In other words, even without the researchers' new techniques for accelerating data retrieval from flash memory, 40 servers with 10 terabytes' worth of RAM couldn't handle a 10.5-terabyte computation any better than 20 servers with 20 terabytes' worth of flash memory, which would consume only a fraction as much power."This is not a replacement for DRAM [dynamic RAM] or anything like that," says Arvind, the Johnson Professor of Computer Science and Engineering at MIT, whose group performed the new work. "But there may be many applications that can take advantage of this new style of architecture. Which companies recognize: Everybody's experimenting with different aspects of flash. We're just trying to establish another point in the design space."Joining Arvind on the new paper are Sang Woo Jun and Ming Liu, MIT graduate students in computer science and engineering and joint first authors; their fellow grad student Shuotao Xu; Sungjin Lee, a postdoc in Arvind's group; Myron King and Jamey Hicks, who did their PhDs with Arvind and were researchers at Quanta Computer when the new system was developed; and one of their colleagues from Quanta, John Ankcorn—who is also an MIT alumnus.Outsourced computationThe researchers were able to make a network of flash-based servers competitive with a network of RAM-based servers by moving a little computational power off of the servers and onto the chips that control the USB flash drives. By preprocessing some of the data on the flash drives before passing it back to the servers, those chips can make distributed computation much more efficient. And since the preprocessing algorithms are wired into the chips, they dispense with the computational overhead associated with running an operating system, maintaining a file system, and the like.With hardware contributed by some of their sponsors—Quanta, Samsung, and Xilinx—the researchers built a prototype network of 20 servers. Each server was connected to a field-programmable gate array, or FPGA, a kind of chip that can be reprogrammed to mimic different types of electrical circuits. Each FPGA, in turn, was connected to two half-terabyte—or 500-gigabyte—flash chips and to the two FPGAs nearest it in the server rack.Because the FPGAs were connected to each other, they created a very fast network that allowed any server to retrieve data from any flash drive. They also controlled the flash drives, which is no simple task: The controllers that come with modern commercial flash drives have as many as eight different processors and a gigabyte of working memory.Finally, the FPGAs also executed the algorithms that preprocessed the data stored on the flash drives. The researchers tested three such algorithms, geared to three popular big-data applications. One is image search, or trying to find matches for a sample image in a huge database. Another is an implementation of Google's PageRank algorithm, which assesses the importance of different Web pages that meet the same search criteria. And the third is an application called Memcached, which big, database-driven websites use to store frequently accessed information.Chameleon clustersFPGAs are about one-tenth as fast as purpose-built chips with hardwired circuits, but they're much faster than central processing units using software to perform the same computations. Ordinarily, either they're used to prototype new designs, or they're used in niche products whose sales volumes are too small to warrant the high cost of manufacturing purpose-built chips.But the MIT and Quanta researchers' design suggests a new use for FPGAs: A host of applications could benefit from accelerators like the three the researchers designed. And since FPGAs are reprogrammable, they could be loaded with different accelerators, depending on the application. That could lead to distributed processing systems that lose little versatility while providing major savings in energy and cost."Many big-data applications require real-time or fast responses," says Jihong Kim, a professor of computer science and engineering at Seoul National University. "For such applications, BlueDBM"—the MIT and Quanta researchers' system—"is an appealing solution."  

A new, environmentally-friendly electronic alloy consisting of 50 aluminum atoms bound to 50 atoms of antimony may be promising for building next-generation "phase-change" memory devices, which may be the data-storage technology of the future, according to a new paper published in the journal Applied Physics Letters, which is produced by AIP Publishing.Phase-change memory is being actively pursued as an alternative to the ubiquitous flash memory for data storage applications, because flash memory is limited in its storage density and phase-change memory can operate much faster.Phase-change memory relies on materials that change from a disordered, amorphous structure to a crystalline structure when an electrical pulse is applied. The material has high electrical resistance in its amorphous state and low resistance in its crystalline state—corresponding to the 1 and 0 states of binary data.Flash memory has problems when devices get smaller than 20 nanometers. But a phase-change memory device can be less than 10 nanometers—allowing more memory to be squeezed into tinier spaces. "That's the most important feature of this kind of memory," said Xilin Zhou of the Shanghai Institute of Microsystem and Information Technology at the Chinese Academy of Sciences. Data can also be written into phase-change memories very quickly and the devices would be relatively inexpensive, he added.So far, the most popular material for phase-change memory devices contains germanium, antimony, and tellurium. But compounds with three elements are more difficult to work with, Zhou said."It's difficult to control the phase-change memory manufacturing process of ternary alloys such as the traditionally used germanium-antimony-tellurium material. Etching and polishing of the material with chalcogens can change the material's composition, due to the motion of the tellurium atoms," explained Zhou.Zhou and his colleagues turned to a material with just two elements: aluminum and antimony. They studied the material's phase-changing properties, finding that it's more thermally stable than the Ge-Sb-Te compound. The researchers discovered that Al50Sb50, in particular, has three distinct levels of resistance—and thus the ability to store three bits of data in a single memory cell, instead of just two. This suggests that this material can be used for multilevel data storage."A two-step resistance drop during the crystallization of the material can be used for multilevel data storage (MLS) and, interestingly, three distinct resistance levels are achieved in the phase-change memory cells," Zhou says. "So the aluminum-antimony material looks promising for use in high-density nonvolatile memory applications because of its good thermal stability and MLS capacity."