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Ⅰ IntroductionIf you've been around electrical equipment for a long time, you may have heard of the transformer. Yeah, they're the enormous bulky things found in the corners of the street that make random scary noises and spit sparks sometimes. There is also a sort of small transformer in your phone charger, but much, much smaller and with a different mechanism.CatalogⅠ IntroductionⅡ Transformer DefinitionⅢ Importance of Transformers in Electrical SystemⅣ Transformer SymbolsⅤ Working Principle of a TransformerⅥ Transformer PropertiesⅦ Transformer Construction  7.1 BOBBIN  7.2 CORE  7.3 WINDINGSⅧ Transformers ApplicationⅨ ConclusionⅩ FAQⅡ Transformer DefinitionA transformer is a device that converts one voltage or current to another using the principles of electromagnetism. It consists of a pair of wounds around a magnetic core of the insulated wire. The winding to which the voltage or current to be converted is connected is called the primary winding and the secondary winding is called the output winding. Transformers come in two types: step up, which increases the voltage or current, and step down, which lowers the input of the voltage or current. The transformers in your microwave oven, for example, are a secondary transformer that is used in the microwave oven to supply about 2200Volts to the vacuum tube. One thing to remember is that transformers only operate with AC voltages or adjustments and do not work with DC. We'll understand why now. Ⅲ Importance of Transformers in Electrical SystemIt was around 1856 that there was a rivalry between two brilliant minds, Nikola Tesla and Thomas Edison. Those were the days when electricity and its applications were merely noticed by glowing a lamp and driving a motor. It was Edison and his associates who first discovered the DC (Direct Current) system, and then Tesla developed his AC (Alternating Current) system sometime after that. The two have since tried to show that their scheme is more advantageous than the other. The time has come for houses to get electricity by then. Although Edison was busy showing how dangerous AC is by electrocuting elephants, Tesla and his team came up with the transformers that made it much simpler and more effective to transmit electricity. Also, transformers play a key role in the transmission system today. Let's learn why. High-voltage and low-current transmission of electricity will help us minimize the thickness of the transmission wires and thus the cost, which will also improve the system's performance. For this purpose, a typical transmission system may be anywhere from 22KV to 66KV, although some generators have an output voltage of only 11kV in the power plant and need only 220V/110V for the household AC unit. So where does this transfer of voltage take place and who does it? Transformers are the answer to the issue. There will be transformers in the system from the power plant to your home that will either step-up the voltage (increase voltage) or step-down (decrease voltage) to preserve the system's efficiency. The transformers are therefore referred to as the heart of an electrical transmission system. In this post, we will be learning more about them. Ⅳ Transformer SymbolsFor a transformer, the circuit symbol is simply two inductors placed together side by side that share the same center. The type of core used is shown by the existence of the line between the two windings: a dashed line represents ferrite, two parallel lines represent laminated iron, and no line represents the core of air.The number of 'bumps' is often used as a rough measure of the role of the transformer-less bumps on one side and more on the other which means that there is a lower number of turns on the first side than the other.Ⅴ Working Principle of a TransformerWe need to go back in time, to the laboratory of Michael Faraday, to understand the operation of a transformer. Perhaps the father of the transformer can be named Michael Faraday, as it was his experiments that helped us understand electromagnetism and create devices such as motors and generators. There was a race to try to create a practical system that could harness the strength of magnets to produce electricity in the late 1800s when it was discovered that electricity and magnetism were related phenomena. Faraday figured out that by bringing a magnet close to a coil of wire, electricity could be produced. What he discovered was that only when the magnetic field shifts can the voltage be produced, that is, whether either the coil or the magnet is shifted relative to the other. In DC, the movement of the current is constant and so is the magnetic field. There is no voltage generated on the secondary because the field is constant and not changing and the transformer just looks like a regular coil of resistive wire to the power supply. So, with DC currents, transformers do not operate. He also found that a current flowing in one coil might cause the current in the other coil when two coils of wire were held close to each other. This definition is referred to as mutual inductance, which governs the operation of all modern transformers.The transformer consists of two windings wound on a magnetic core, as shown in the figure. The goal of having a core is that air is not a very good magnetic field supporter, so having a magnetic core increases the magnetic field for a certain amount of current flowing through one winding, which in turn generates a stronger current in the other, improving the device's overall performance. A magnetic field is built up in the core as a current moves through the primary and is limited mostly to the core. This magnetic field passes through the center of the secondary and, thus, the law of reciprocal induction causes a current in the other. The beauty of this method is that the ratio between the input voltage and the output voltage is simply the ratio between the main and the secondary windings, summarized by the following formula:Vout/Vin = Nsec/NpriVin is the input voltage, Nsec is the number of turns in the secondary winding, and Npri is the number of turns in the main winding, where Vout is the output voltage.So if you have two transformers, one with 100 turns on the primary and 1000 turns on the secondary and one with 10 turns on the primary and 100 turns on the secondary, you can measure the ratio of turns to be 1:10 on both of them, so that they both increase voltage to the same degree. Ⅵ Transformer PropertiesIf we take a closer look at the above example, the first transformer would have higher winding resistance (since more wire is used) and will restrict the amount of current that can be drawn from the transformer in certain instances. This property is called winding resistance, but since the copper wire used normally has a low resistance, it does not matter in most cases. Another thing you see is that the main and secondary windings have no direct electrical connection. This is called galvanic isolation and, as we can see, can be very useful. Looking at each of the transformer windings, we can see that they are shaped like inductors and also have an inductance, a coil of wire wrapped around a magnetic center. This inductance, given by this formula, is proportional to the square of the number of turns:Lpri/Lsec = Npri2/Nsec2Where Lpri is the primary winding inductance, Lsec is the secondary winding inductance, Npri is the number of turns on the primary windings and Nsec is the number of turns on the secondary windings. The proportionality constant can be found in the datasheet for a given core and is typically given in μH/turn2 units. The exact value is based on the core form and scale. Suppose you have a transformer core with a 1uH/turn2 specification. If you wind one winding on that heart, the value of the constant multiplied by the number of turns squared will be the inductance, in this case, 1. So the winding inductance of that one will be 1μH. If you wind the same core with another winding with 10 turns, then the inductance will be:(1µH/turn2)*(10 turns)2 = 100µHSince the windings have inductance, they provide an impedance to AC signals, given by the formula:XL = 2π*f*LWhere XL is the impedance in ohms, f is the frequency in ohms and L is the inductance in Henries.Say, you want to design a transformer at 50Hz, which is the standard power line frequency, that draws 3A at 220V AC. Then, by Ohm's law, the impedance of the main will need to be 73.3 Ohms. Now that we know the appropriate impedance and the frequency, we can rearrange the formula to find out the inductance required for the winding:L = (XL)/(2π*f)Substituting the values, we find that 233mH would be the required inductance.We can calculate the windings necessary to get the inductance needed using this information and the value of μH/turns2 from the datasheet.Assuming the value is 50μH/turns2, we can rearrange the formula to evaluate the inductance: Where N is the number of turns, L is the inductance required, and the term t2/μH is just the inverse of the value of the datasheet.We get the necessary number of turns of 2158 when adding our values to the formula. So, as you can see, you can build transformers for almost any application once you get the hang of the formulas! Ⅶ Transformer ConstructionAn awareness of transformer construction is vital for someone who wants to wind their own transformers.A transformer is made up of a few fundamental components: 7.1 BOBBINFor every transformer, the bobbin is the fundamental structure. It provides a spool on which the windings will wind and keeps the core in place as well. It is typically composed of plastic that is heat resistant. It also sometimes involves metal pins onto which, for example, you can weld the ends of the windings if you want to mount it to a PCB. 7.2 COREPerhaps the most significant aspect of the transformer is this. The cores can come in several shapes and sizes, as seen in the image. It is the core's magnetic properties that decide the transformer's electrical properties that are built around the core. 7.3 WINDINGSThe wire used in the house, though it can seem like a trivial item, is as critical as any other element. In general, solid enameled copper wire is used because the insulation is strong and thin, so plastic insulating sheaths do not waste space. Ⅷ Transformers Application • MAINS VOLTAGE CONVERSIONThis is possibly the most common transformer application, stepping down the mains voltage for low voltage devices. This stuff, like microwaves and old TVs and wall brick power supplies, you might even find inside. These transformers have iron cores that make them bulky and much less efficient than other types, providing excellent permeability.Three secondary wires mark them as 12-0-12 or 6-0-6. If you make the center wire the ground reference, this means that the outer two wires have an output of 12V AC RMS. If you calculate the 12v winding over each, you get 24V AC RMS. This gives you the flexibility to use the transformer as you may like. • SWITCH MODE POWER SUPPLIESThese are very specific type of power supplies that generate a DC output and take a DC input. Both modern phone chargers are located here. The transformers used in these PSUs are shaped more like medium- to high-permeability inductors with a limited number of turns and ferrite cores. For a brief period, a DC voltage is applied across the 'primary' so that the current ramps up to a certain amount and retains some magnetic energy in the core. At a lower voltage, this energy is then passed to the secondary, since it has a smaller number of turns. They work and achieve outstanding efficiencies at high frequencies and are very thin. • ELECTRICAL ISOLATIONThere are special transformers with a 1:1 turn ratio, such that the voltages of the input and output are the same. They are used to decouple equipment from the earth's mains. Since mains are referred to as earth, touching even one wire will lead to a shock since the return path is simply the ground. The unit is separated from the main earth by the use of isolation transformers, as transformers are galvanically insulated. • VOLTAGE CONVERSION TRANSFORMERSMany countries use 220V AC as the normal supply voltage around the world, but some countries use 110V AC, such as the US. This means that it is not possible to operate certain devices such as blenders in all countries. To this end, transformers that convert from 110V to 220V or vice versa can be used to ensure that appliances can be used in any region. • IMPEDANCE MATCHINGThere are unique transformer types that are used to balance the source and load impedance. RF and audio circuits are commonly used.The ratio of turns is equal to the source's square root and load impedance. • AUTOTRANSFORMERThis is a special type of transformer that has only one winding that forms the secondary with a 'tap' output. This tap is normally variable, so the output AC voltage can be varied, much like a voltage divider. Ⅸ ConclusionTransformers are useful instruments and it can be very useful to learn how to build and operate with them! Although we have covered the basics here, it is something that can be discussed in another whole article to build a transformer right from scratch, so for some other time. But now, you'll know why it's there and how it works when you see a transformer again. Ⅹ FAQ1. How does a transformer convert AC into DC?The transformer is not designed to convert ac to dc. It is a pure AC device used to step down/up voltage levels keeping frequency, power, FLUX constant. In mobile charger, we use transformer along with bridge rectifier to convert domestic AC supply to dc. (with ripples) Finally, such a transformer that converts ac to dc is not designed yet. 2. Will a transformer work with DC?Transformers work in the principle of Faraday's law of 'mutual induction', in which an EMF is induced in the transformer's secondary coil by the magnetic flux generated by the voltages and currents flowing in the primary coil winding. As in DC(voltage being always constant), the change in flux is zero so no mutual induction, thus transformers can't work with a DC supply. Moreover, if DC or a similar rating of AC(Voltage & Current) is fed into the terminals of a Transformer there is a high possibility that it would burn the primary coil. 3. What is a transformer's simple definition?Transformer, device that transfers electric energy from one alternating-current circuit to one or more other circuits, either increasing (stepping up) or reducing (stepping down) the voltage. 4. What is the use of a transformer?Transformers are most commonly used for increasing low AC voltages at high current (a step-up transformer) or decreasing high AC voltages at low current (a step-down transformer) in electric power applications, and for coupling the stages of signal-processing circuits. 5. What is the basic principle of a transformer?A transformer consists of two electrically isolated coils and operates on Faraday's principle of ‘mutual induction’, in which an EMF is induced in the transformer's secondary coil by the magnetic flux generated by the voltages and currents flowing in the primary coil winding. 6. What are the two types of transformer?The different types of transformer are Step up and Step down Transformer, Power Transformer, Distribution Transformer, Instrument transformer comprising current and Potential Transformer, Single phase and Three phase transformer, Auto transformer, etc. 7. What are the main parts of the transformer?There are three basic parts of a transformer:• an iron core that serves as a magnetic conductor,• a primary winding or coil of wire.• a secondary winding or coil of wire. 8. What does a transformer look like?A transformer keeps wired doorbells powered at the right voltage for optimal operation. It looks like a small metal box and can be silver, off-white, or even brass colored. If your doorbell is no longer working, you may need to troubleshoot the transformer in order to perform the repair. 9. What is a transformer ratio?The transformer turns ratio is the number of turns of the primary winding divided by the number of turns of the secondary coil. The transformer turns ratio provides the expected operation of the transformer and the corresponding voltage required on the secondary winding. 10. What are the ideal transformers?A transformer that doesn't have any losses like copper and core is known as an ideal transformer. In this transformer, the output power is equivalent to the input power. The efficiency of this transformer is 100%, which means there is no loss of power within the transformer. 

Ⅰ IntroductionComputer memory is used to store programs and data. The main function of memory is to read and write. For random access memory RAM, their main functions are to read and write, and for read-only memory ROM, the main function is only to read. In general, the memory can be a card,  a floppy disk, etc., they can be active or fixed, which used to access data.This Video Introduce How Memory Store Data and How CPU Access Them.Program is the basis of computer operation, and data is the object of computer operation. Regardless of whether it is a program or data, it is expressed in binary form in the memory, and is collectively referred to as information. In a computer, the memory capacity represents by byte (abbreviated as B) as the basic unit, a byte is composed of 8 binary bits. In addition to bytes, the storage capacity is expressed in KB, MB, GB, and TB (which may be referred to as K, M, G, and T, respectively. For example, 128MB may be referred to as 128M). Among them, 1KB=1024B, 1MB=1024KB, 1GB=1024MB, 1TB=1024GB.CatalogⅠ IntroductionⅡ How to Store and Access Data?Ⅲ What Computer Memory Do?3.1 Explain Computer Memory3.2 Binary Decoder3.3 Chip Select & BusⅣ Example: 8086 MicroprocessorⅤ Technology Improvement5.1 What is Direct Memory Access (DMA)?5.2 DMA Transfer Modes5.3 DMA Transfer Process5.4 DMA Advantages and DisadvantagesⅥ Questions Related to Computer Memory WorksⅡ How to Store and Access Data?Before you know how the electronic memory works, it is necessary to get a general idea of the normal computer operation.Turn on the computer.First, the computer loads data from ROM and executes a power-on self-test (POST) to ensure that all major components are working properly. As part of this test, fast read/write operations check all memory addresses to ensure that there are no errors in the memory chip by memory controller. Read-write operation means writing data to a certain bit and then reading from it.Second, the computer loads the basic input/output system (BIOS) from the ROM. The BIOS provides the most basic information about storage devices, boot order, security, automatic identification functions, and other basic items.The computer loads the operating system from the hard drive into the system RAM. Normally, as long as the computer is turned on, the critical part of the operating system is kept in RAM. This allows the CPU to immediately access the operating system, thereby enhancing the performance and functionality of the entire system.Third, when an application is opened, it will be loaded into RAM. To save RAM space, only the basic part of the app programs are loaded, and then load other parts as needed. After the application is loaded, all files that have been opened for use in the RAM. When saving files and closing applications, files will be written to the designated storage device, and then the loading will be cleared from the RAM. It should be noted a fact that, if the changed files are not saved to the permanent storage device before being erased, they will be lost.In the above operation, every time the content is loaded or opened, it is put into RAM. This only means that it has been put into the temporary storage area of computer so that the CPU can more easily access the information. The CPU requests the required data from the RAM, processes it, and then writes the new data back to the RAM with successive cycles. In most computers, data processing reached millions of times between the CPU and RAM per second.Ⅲ What Computer Memory Do?3.1 Explain Computer MemoryThe memory is composed of a storage body, an address decoder, a read-write control circuit, an address bus, and a data bus.A semiconductor memory is like a small drawer, and there are eight small grids in it. Each small grid is used to store charge. The charge is transferred in or discharged through the wire connected to it. It is easy to understand, if you think of a wire as a water pipe, and the electric charge in the small grid is like the water. Each small drawer in the memory is a place to store data, which we call a cell.Figure 1. Computer MemoryThere are many cells in a memory, and the lines are connected in parallel. When the charge is applied, the charge will fill all the cells. When the charge is released, the charge in each cell will be discharged. This is of course not what we want. To avoid it, the memory structure should be changed slightly. There is a control line on each cell. Which unit you want to put the data, a signal is given to the control line of this unit. Be specific, this control line is like a switch, the charge can flow freely when switch on, and there is no signal on the control line of other cells to affect each other. So as long as you control the control lines of different cells, you can write different data to each unit. In the same way, if you want to get data from a unit, you only need to turn on the corresponding control line. 3.2 Binary DecoderFigure 2. DecoderFirst, how to control the control lines of each unit is not easy. For example, there are 655,36 units in a 27,512 memory chip, and each wire has to led out. This integrated circuit must have more than 60,000 pins. Obviously, this is clumsy. At this time, a way of decoding is made. Let’s briefly introduce it: a line can represent 2 states, 2 lines can represent 4 states, etc. And so on, 16 lines can be represented for 65536 states. 3.3 Chip Select & BusNext to the last question, let us focus on another problem. Where did the eight wires connect with each cell come from? In general, there are connected from the computer, and they also connect with other parts except for a memory chip. In this case, a problem arises. Since these eight lines are not dedicated between the memory and the computer, if you always connect a unit to these eight lines, this may cause confusion . For example, the value in a memory unit is 0FFH, in other memory cell is 00H, it is hard to figure out the high level or low level which these lines represent. So we have to separate them. The method is, when external wires are connected to the pins of the integrated circuit, they are not directly connected to each unit, and a group of switches is added between chip and computer. If we really want to write data to this memory or read data from the memory, then just turn on the switch. This group of switches is selected by three leads: read control end, write control end and chip select end.To write data to the chip, first is selecting chip, then send out a write signal, and the switch is turn on, therefore, the data is written to the chip. If you want to read, first is selecting chip, then send the read signal, and the switch is closed, the data is sent out. In addition, the read and write signals should be connected to another memory. Since the chip select terminals are different, there is no conflict when having read or write operation. Many people still have a question, will these two chips be selected at the same time? As long as it is a well-designed system, it will not happen, because it is controlled by mathematical calculation, not a manual control. If there is a situation where two chips are selected at the same time, it may be a circuit failure.It can be seen from the above that the eight lines used to transfer data are not dedicated, but are shared by many components, so we call them the data bus. The other 16 address lines are also connected together, called the address bus. Ⅳ Example: 8086 MicroprocessorThe CPU is connected to the storage unit and the I/O interface circuit through an address bus, a data bus, and a control bus. So how does the CPU access a certain address in the memory? Next, we will use the 8086 microprocessor architecture as an example, because its structure is simple and easy to introduce.Figure 3. 8086 MicroprocessorIf the CPU wants to read and write memory data, there must be wires to connect them together. In a computer, this kind of wire is called a bus. If you disassemble the computer case, it is easy to see that there is a collection of wires. These wires send signals at the same time, and each wire is either high or low level. The bus is divided into address bus, data bus and control bus according to different functions. Taking the above diagram as an example, the CPU needs to read the information at address 3, which is roughly divided into the following steps:The CPU outputs the physical address 3 to the address line.The control line needs to select the corresponding storage device, and then inform the device that data will be read from it.The storage device will send data 8 to the data line.Figure 4. 8086 CPUFrom here we see that there is a bus connection between the CPU and the storage device. In fact, there is a bus inside the CPU. It connects different components, such as registers, operators, and controllers. But in the computer, the bit number of different buses is not necessarily the same. For example, the internal bus of the 8086 is 16-bit, the address bus is 20-bit, and the data bus is 16-bit.Another question, since the 8086 CPU is a 16-bit structure, how can it output a 20-bit physical address? In fact, it is very simple. The address adder solves this way: segment address (16 bits) x 16 + offset address (16 bits) = physical address (20 bits), such as B800H x 16 + 1111H = B9000H. If you are not familiar with hexadecimal, then we can use decimal to describe this calculation. For example, home, school, and library are on a straight line. The distance between them is as shown in the following figure. Show the distance of the library: the library is 200m away from home, which is actually its physical address. But now there are some limits. We can only communicate with our friends through paper slips. Unfortunately, we can only write 2 digits on the papers, and the number of paper is not limited, so we agreed on the rule: paper 1x10+paper 2 = physical address, for example, write 11 on the paper 1 and 90 on the paper 2, which means that the school is 110m away from home and the library is 90m away from the school. The maximum distance that these two pieces of paper can represent is 99x10+99=1089.The above mentioned is the concept of offset address of the segment address. Let's imagine that if the internal bus of the 8086 CPU is 20-bits, it can directly represent the physical address. Therefore, the concept of segment address is not critical here. What's more, the CPU hardware design will change in the future, and it may be completely different.What we should know is how the CPU reads information from memory, and how does the CPU know whether the read information is ordinary data or a program that needs to be executed? We know that there are many registers in the CPU (that is used to store information), it specifies 2 registers, called CS, IP (CS is used to store the segment address, IP is used to store the offset address). They represent the physical address of the current machine code that needs to be executed. During the execution of the code, the CPU will maintain the values of CS and IP. For example, for each execution of the machine code, IP will increase the corresponding value to point to the next instruction. By analogy, we can use other registers to represent the physical address of the data. Therefore, the binary information in the memory has no difference to the CPU. Distinguishing the program and the data depends on the register. Ⅴ Technology ImprovementWhether it is a PC card or the high-speed read-write disk in the storage system, we can not do data operation without the support of a hardware DMA.Figure 5. 8237 DMA Controller5.1 What is Direct Memory Access (DMA)?DMA refers to the interface technology that the external device directly exchanges data with the system memory without going through the CPU. It is a high-speed data transfer method that allows direct reading and writing of data between external devices and memory, neither through the CPU nor CPU intervention.To read the data of the peripherals into the memory or transfer the data of the memory to the peripherals, it is generally done through CPU control, such as CPU program query or interrupt mode. Using interrupts for data transfer can greatly increase the CPU utilization. But it has shortcomings. For a high-speed I/O device and the case of batch exchange of data, the DMA method can be used to solve the efficiency and speed problems. DMA directly exchanges data between peripherals and memory, so the speed of data transfer depends on the working speed of the memory and peripherals.The data transfer operation is performed under a "DMA controller". In addition to the CPU doing a little processing at the beginning and end, the CPU can execute other tasks during the transfer. In this way, the CPU and I/O are in parallel operation. Therefore, the efficiency of the computer system is greatly improved.Figure 6. DMA ControllerWhen realizing DMA transmission, the bus is directly controlled by the DMA controller. Therefore, there is a problem of bus control transfer. That is, before the DMA transfer, the CPU should hand over the bus control to the DMA controller, and after the transfer is done, the DMA controller should immediately return the bus control to the CPU. 5.2 DMA Transfer ModesPeripherals can directly access the memory through the DMA controller, and at the same time, the CPU can continue to execute programs. So how does the DMA controller and CPU use memory in the same time? The following three modes are generally used:(1) Burst mode: Stop the CPU access.(2) Cycle stealing mode: DMA return the control of buses to CPU after transfer of one word at a time.(3) Transparent mode: DMA and CPU access memory alternately. Burst ModeWhen the peripheral device requests to transfer a batch of data, the DMA controller sends a stop signal to the CPU, requesting the CPU to give up to use the address bus, data bus, and related control bus. After the DMA controller obtains the bus control right, it starts the data transfer. After a batch of data has been transferred, the DMA controller informs the CPU that it can use the memory and returns the bus control to it. Figure (a) is a time chart of this transmission method. Obviously, in this DMA transfer process, the CPU is basically in a non-working state or stands by.Advantage: It is suitable for group transmission of equipment requiring high data transmission rate.Disadvantages: In the internal access stage of the DMA controller, the memory performance is not fully utilized, that is to say, a considerable part of the memory work cycle is idle. This is because the interval between two data transmitted by a peripheral device is generally always greater than the memory storage period, even for high-speed I/O devices. For example, a floppy disk requires about 32us to read an 8-bit binary number, and the storage period of semiconductor memory is less than 0.5us, so many idle storage periods cannot be used by the CPU. Cycle Stealing ModeWhen the I/O device has no DMA request, the CPU accesses the memory as required by the program. Once the I/O device executes a DMA request, one or several memory cycles will be embezzled.The time sharing of this transmission mode is as follows:　1) At this time, the CPU does not need to access RAM, for example, the CPU is executing a multiplication instruction. Due to the long execution time of this instruction, there is no conflict between the I/O access and the CPU access, that is, the I/O device stealing one or two memory cycles has no effect on the CPU execution.2) When the I/O device accesses, so does the CPU, which creates an access violation. In this case, the I/O device takes first, because it has an access time requirement, the previous I /O data must be accessed before the next request arrives. Obviously, the I/O device steals one or two memory cycles, which means that the CPU has delayed the execution of the instruction. More specifically, inserting a DMA request during the CPU's execution of the in-access instruction embezzles one or two memory cycles. Compared with the method of stopping CPU access, cycle stealing not only achieves I/O transfer, but also utilizes the efficiency of memory and CPU greatly. It is a win-win  method. However, I/O device diversion has the process of applying for bus control, establishing line control, and returning bus control. Transferring a word takes one cycle for RAM, but it is generally 2-5 memory cycles for DMA controllers (depending on the delay of the logic line). Therefore, the method is suitable for the case where the read/write cycle of the I/O device is greater than the RAM storage cycle. Transparent ModeIf the CPU's work cycle is much longer than the memory access cycle, this method can make the highest efficiency of CPU and DMA access at the same time. Assuming that the CPU work cycle is 1.2μs and the memory access cycle is less than 0.6μs, then a CPU cycle can be divided into two sub-cycles, C1 and C2, where C1 is for DMA controller access and C2 is for CPU access.The time sharing of this transmission method is as follows: The following figure is the detailed time of DMA and CPU alternate accesses. C1 is dedicated to the DMA controller and C2 is dedicated to the CPU. This method does not require the bus usage right. It is allocated through C1 and C2. The CPU and the DMA controller each have their own control registers such as internal address registers, data registers, and read/write signals. In the C1 cycle, if the DMA controller has an access request, it can send signals such as address and data to the bus. In the C2 cycle, if the CPU has an access request, it also do the same process. In fact, for the bus, this is a multiplexer controlled by C1 and C2. This transfer of bus control power takes almost no time, so the efficiency of DMA transfer is very high.It is like transparent glass to the CPU, without any influence. Working in a transparent DMA mode, the CPU neither stops the main program running nor enters the stand-by state. It is an efficient working method, and the corresponding hardware logic is more complicated. 5.3 DMA Transfer ProcessFigure 7. DMA Working ProcessRequestThe CPU initializes the DMA controller and gives an operation command to the I/O interface, then the I/O interface issues a DMA request. ResponseThe DMA controller determines the priority and shielding of the DMA request, and makes a bus request to the bus adjudication logic. When the CPU executes the current bus cycle, the bus control can be released. At this time, the bus arbitration logic outputs a bus response, indicating that the DMA has responded, and notifies the I/O interface to take the DMA transfer through controller. TransferAfter the DMA controller obtains the bus control right, the CPU immediately stops s or only performs internal operations. The DMA controller outputs read and write commands to control the RAM and I/O interface directly. Under the control of the DMA controller, the data is directly transferred between the memory and the external device. In addition, it is necessary to provide the starting position and length of the data to be transferred. Rising an InterruptWhen the specified batch of data transfer is finished, the DMA controller releases the bus control right and sends an end signal to the I/O interface. When the I/O interface receives it, on the one hand, it stops the I/O device, on the other hand, it makes an interrupt request to the CPU. The CPU is free from the state of non-intervention, and performs a section to check the correctness of the DMA transfer operation code. Finally, the CPU will show the transfer result and carry out the original program.It can be seen that the DMA transfer method does not require the CPU to directly control the transfer, nor does it have the process of retaining and restoring the scene when having the interrupt process. Through the hardware, a direct path for data transfer is opened for the RAM and I/O devices, that is DMA. 5.4 DMA Advantages and DisadvantagesA:DMA reduces the clock cycle requires to read or write a patch of data, which improve the system operation efficiency.D:As a hardware device, running DMA control will increase cost.DMA can cause cache coherence problem. Ⅵ Questions Related to Computer Memory Works1. What is the purpose of computer memory?Computer random access memory (RAM) is one of the most important components in determining your system's performance. RAM gives applications a place to store and access data on a short-term basis. It stores the information your computer is actively using so that it can be accessed quickly. 2. What is the role of memory in a computer system?Computer memory or random access memory (RAM) is your system's short-term data storage; it stores the information your computer is actively using so that it can be accessed quickly. The more programs your system is running, the more memory you'll need. 3. Where is 8086 microprocessor used for?8086 Microprocessor is an enhanced version of 8085Microprocessor that was designed by Intel in 1976. It is a 16-bit Microprocessor having 20 address lines and16 data lines that provides up to 1MB storage. It consists of powerful instruction set, which provides operations like multiplication and division easily. 4. How does direct memory access DMA work?With DMA, the CPU first initiates the transfer, then it does other operations while the transfer is in progress, and it finally receives an interrupt from the DMA controller (DMAC) when the operation is done. ... DMA can also be used for "memory to memory" copying or moving of data within memory. 5. Why is DMA faster than CPU?The direct memory access or DMA mode of data transfer is faster amongst all the mode of data transfer . ... The device request the cpu through a DMA controller to hold its data ,address and control bus so that the device may transfer data directly to or from memory.

Access to clean, safe water is one of the world’s pressing needs, yet today’s water distribution systems lose an average of 20 percent of their supply because of leaks. These leaks not only make shortages worse but also can cause serious structural damage to buildings and roads by undermining foundations, which is a great loss.Many property losses experienced by business owners involve water damage caused by leaky pipes. Water can be very destructive whether it seeps from a loose fitting or gushes from a ruptured main.Unfortunately, leak detection systems are expensive and slow to operate — and they don’t work well in systems that use wood, clay, or plastic pipes, which account for the majority of systems in the developing world. Now, a new system developed by researchers at MIT could provide a fast, inexpensive solution that can find even tiny leaks with pinpoint precision, no matter what the pipes are made of. The system, which has been under development and testing for nine years by professor of mechanical engineering Kamal Youcef-Toumi, graduate student You Wu, and two others, will be described in detail at the upcoming IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS) in September. Meanwhile, the team is carrying out tests this summer on 12-inch concrete water-distribution pipes under the city of Monterrey, Mexico. The system uses a small, rubbery robotic device that looks something like an oversized badminton birdie. The device can be inserted into the water system through any fire hydrant. It then moves passively with the flow, logging its position as it goes. It detects even small variations in pressure by sensing the pull at the edges of its soft rubber skirt, which fills the diameter of of the pipe.(The fast, inexpensive robotic device that developed by engineers from MIT can find even tiny leaks in pipes with pinpoint precision, no matter what the pipes are made of.)This device contains two parts: "skirt" sensor and soft body drone. It is then retrieved using a net through another hydrant, and its data is uploaded. No digging is required, and there is no need for any interruption of the water service. In addition to the passive device that is pushed by the water flow, the team also produced an active version that can control its motion.Monterrey itself has a strong incentive to take part in this study, since it loses an estimated 40 percent of its water supply to leaks every year, costing the city about $80 million in lost revenue. Leaks can also lead to contamination of the water supply when polluted water backs up into the distribution pipes. The MIT team, called PipeGuard, intends to commercialize its robotic detection system to help alleviate such losses. In Saudi Arabia, where most drinking water is provided through expensive desalination plants, some 33 percent is lost through leakage. That’s why that desert nation’s King Fahd University of Petroleum and Minerals has sponsored and collaborated on much of the MIT team’s work, including successful field tests there earlier this year that resulted in some further design improvements to the system, Youcef-Toumi says. DKNY CEO Caroline Brown, said “PipeGuard has created a simple, pragmatic and elegant solution to a complex problem. … This robot is a great example of utilizing smart design to simplify complexity and maximize efficiency.”

The world's most precise clock has been fine-tuned to boost radar and GPS capabilities.The Cryogenic Sapphire Oscillator, or Sapphire Clock, has been enhanced by researchers from the University of Adelaide in South Australia to achieve near attosecond capability. The oscillator is 10-1000 times more stable than competing technology and allows users to take ultra-high precision measurements to improve the performance of electronic systems. Increased time precision is an integral part of radar technology and quantum computing, which have previously relied on the stability of quartz oscillators as well as atomic clocks such as the Hydrogen Maser. Atomic clocks are the gold-standard in time keeping for long-term stability over months and years. However, electronic systems need short-term stability over a second to control today's devices. The new Sapphire Clock has a short-term stability of better than 1x10-15, which is equivalent to only losing or gaining one second every 40 million years, 100 times better than commercial atomic clocks over a second. The original Sapphire Clock was developed by Professor Andre Luiten in 1989 in Western Australia before the team moved to South Australia to continue developing the device at the University of Adelaide. Lead researcher Martin O'Connor said the development group was in the process of modifying the device to meet the needs of various industries including defence, quantum computing and radio astronomy. The 100cm x 40cm x 40cm clock uses the natural resonance frequency of a synthetic sapphire crystal to maintain a steady oscillator signal.Associate Professor O'Connor said the machine could be reduced to 60 per cent of its size without losing much of its capability."Our technology is so far ahead of the game, it is now the time to transfer it into a commercial product," he said. "We can now tailor the oscillator to the application of our customers by reducing its size, weight and power consumption but it is still beyond current electronic systems." The Sapphire Clock, also known as a microwave oscillator, has a 5 cm cylinder-shaped crystal that is cooled to -269C. Microwave radiation is constantly propagating around the crystal with a natural resonance. The concept was first discovered by Lord Rayleigh in 1878 when he could hear someone whispering far away on the other side of the church dome at St Paul's Cathedral. The clock then uses small probes to pick up the faint resonance and amplifies it back to produce a pure frequency with near attosecond performance."An atomic clock uses an electronic transition between two energy levels of an atom as a frequency standard," Associate Professor O'Connor said."The atomic clock is what is commonly used in GPS satellites and in other quantum computing and astronomy applications but our clock is set to disrupt these current applications."  The lab-based version already has an existing customer in the Defence Science and Technology Group (DST Group) in Adelaide, but Associate Professor O'Connor said the research group was also looking for more clients and was in discussion with a number of different industry groups. The research group is taking part in the Commonwealth Scientific and Industrial Research Organisation's (CSIRO's) On Prime pre-accelerator program, which helps teams identify customer segments and build business plans. Ref.KY45-E3X-DA6KY163-TX179

A new, electronic skin microsystem tracks heart rate, respiration, muscle movement and other health data, and wirelessly transmits it to a smartphone. The electronic skin offers several improvements over existing trackers, including greater flexibility, smaller size, and the ability to stick the self-adhesive patch -- which is a very soft silicone about four centimeters (1.5 inches) in diameter -- just about anywhere on the body. （A research team led by Professor Kyung-In Jang of Robotics Engineering collects, analyzes, and diagnoses bio-signals wirelessly transmitted to mobile application from the soft electronic skin.）   The microsystem was developed by an international team led by Kyung-In Jang, a professor of robotics engineering at South Korea's Daegu Gyeongbuk Institute of Science and Technology, and John A. Rogers, the director of Northwestern University's Center for Bio-Integrated Electronics. The team described the new device in the journal Nature Communications.   The electronic skin contains about 50 components connected by a network of 250 tiny wire coils embedded in protective silicone. The soft material enables it to conform to body, unlike other hard monitors. It wirelessly transmits data on movement and respiration, as well as electrical activity in the heart, muscles, eyes and brain to a smartphone application.   Unlike flat sensors, the tiny wires coils in this device are three-dimensional, which maximizes flexibility. The coils can stretch and contract like a spring without breaking. The coils and sensor components are also configured in an unusual spider web pattern that ensures "uniform and extreme levels of stretchability and bendability in any direction." It also enables tighter packing of components, minimizing size. The researchers liken the design to a winding, curling vine, connecting sensors, circuits and radios like individual leaves on the vine.   The key to creating this novel microsystem is stretching the elastic silicone base while the tiny wire arcs, made of gold, chromium and phosphate, are laid flat onto it. The arcs are firmly connected to the base only at one end of each arc. When the base is allowed to contract, the arcs pop up, forming three-dimensional coils.   The entire system is powered wirelessly rather than being charged by a battery. The researchers also considered key electrical and mechanical issues to optimize the system's physical layout, such as sensor placement or wire length, to minimize signal interference and noise.   The electronic skin could be used in a variety of applications, including continuous health monitoring and disease treatment. Professor Jang states "Combining big data and artificial intelligence technologies, the wireless biosensors can be developed into an entire medical system which allows portable access to collection, storage, and analysis of health signals and information." He added "We will continue further studies to develop electronic skins which can support interactive telemedicine and treatment systems for patients in blind areas for medical services such as rural houses in mountain village." The microsystem could also be used in other areas of emerging interest, such as soft robotics or autonomous navigation, which the team is now investigating.   Ref. KY32-AD22050RZ KY32-AD9945KCPZ

  Catalog   Brief Introduction What Is System on Chip?         Content of The Study Bus Architecture Technology IP Core Reuse Technology Reliability Design Technology   Software and Hardware Co-design Technology SoC Design Verification Technology   Chip Synthesis / Timing Analysis Technology   Testability / Debuggability Design Technology Low Power Consumption Design Technology New Circuit Implementation Technology Embedded Software Migration / Development     SoC classification   Technical Characteristics of CSoC   Technical Characteristics of SoPC Technical Characteristics of ASIC SoC Classification Principles of SoC Classification Model of SoC     Development Direction of SoC Technology   Computer Science Promotes the Level of SoC      Technology SoC Promotes the Development of Computer Architecture SoC Opens Up a New World for The Development  of      Interdisciplinary Disciplines Brief Introduction of SoC A system on chip (SoC) is a microchip which has all the necessary electronic circuits and other parts of a given system on a single integrated circuit. This technology is especially used in small yet extremely complex consumer electronic devices. There are some devices which have more processing power and memory than a standard desktop. This is possible only with the use of system on chip design. In simple terms a system on chip is an integrated circuit which integrates all components of a computer or any other electronic system into a single chip. It may include analog, digital, mixed-signal and other radio frequency funtions on a single chip substrate. Due to their low power consumption, SoCs are quite common in the mobile electronics market. Embedded systems is the best example of the use of system on chip. Figure 1   The structure of a typical system of chip consists of: —A microcontroller, digital signal processor or microprocessor core. —Memory blocks along with a selection of RAM, ROM, EEPROM and flash memory. —Oscillators, phase-locked loops and other timing sources. —Counter-timers, eral-time timers as well as power-on reset generators. —USB, FireWire, Ethernet, SPI, USART and other external interfaces as well. —Analog interfaces including ADCs and DACs.   Along with the above mentioned hardware, system on chip design also has software which controls the microcontroller, microprocessor, peripherals and interfaces. The design flow of a SoC aims at developing both the hardware and software in a parallel manner. Typically most of the system on chip are developed from pre-qualified hardware blocks along with the software drivers which control their operation. While the hardware blocks are arranged together with the help of CAD tools, software-development environment is used to integrate the software modules.   The next step is functional verification of the system on chip design to verify and debug both harware as well as software prior to tapeout. The technologies with which SoC can be fabricated are: —Standard Cell —Full Custom —Field-programmable Gate Array   As SoC designs consume less power and have higher reliability and lower cost as compared to the multi-chip systems which they replace, they are regarded as the best option to be used.   The major problems/ challenges faced by SoC designers are as follows: Functional content complexity – The amount of the content involved in build SoCs leads one to the conclusion that designing these systems is not easy even for large design teams. This is why some form of intellectual property reuse has become an inevitable part of SoC design. Along with functional content complexity, architectural as well as verification challenge are some of the major problems inherent in the SoC designing.     Content of The Study SoC design methodology mainly studies Bus Architecture Technology, IP Core Reuse Technology, Reliability Design Technology, Software and Hardware Co-design Technology, SoC Design Verification Technology, Chip Synthesis / Timing Analysis Technology, Testability / Debuggability Design Technology, Low Power Consumption Design Technology, New Circuit Implementation Technology, etc. In addition, Operating System / Embedded Software Migration, Development and Research are also needed to be done in this new interdisciplinary field of research.   Bus Architecture Technology Bus structure and interconnection technology directly affect the overall performance of the chip. For a single application field, mature bus architecture can be selected; for those with high serialization or comprehensive performance requirements, in-depth architecture research can be carried out, and the bus architecture with its own characteristics can be constructed. Therefore, it can be refined and strengthened without being restricted by third parties, develop synchronously with the system and become more competitive. At present, the development of SoC is mainly based on platform (including independent construction of the overall architecture), based on core, based on synthesis and other methods, and constantly introduce better performance, stronger scalability of the bus specification.   IP Core Reuse Technology IP core is generally divided into hard IP core, soft IP core and firm IP core. Hard IP core refers to the IP core which has been pre-arranged and cannot be modified by the system designer. The soft IP core is usually submitted in the form of HDL language. Firm IP core is composed of RTL description and synthesizable network table. The research focus of IP core reuse is to develop the integration of specification and testability to adapt to a variety of bus interfaces in order to achieve the purpose of reuse with as few outsourcing and test vectors as possible. IP cores should have good development documentation and reference manuals, including data manuals, user guidelines, simulation and reuse models, and compatibility is an important factor.   Reliability Design Technology Because SoC is composed of multi-level bus and each bus contains multiple devices (IP core). Therefore, it is very important to ensure the normal operation of the whole chip. And the anti-"deadlock" mechanism and "unlocking" mechanism must be considered, which means that a device (IP core) will not affect the other functions of the whole chip even if it is paralyzed. In addition, with the development of ultra-deep submicron technology, the reliability of bus transmission becomes a serious challenge, so it is necessary to study the fault-tolerant mechanism and fault recovery mechanism.   Software and Hardware Co-design Technology Due to the pressure of market and design risk, SoC hardware and software co-design becomes particularly important. Improving hardware / software co-description, co-analysis, co-design, co-simulation and co-verification can greatly reduce the risk of hardware design and shorten the development and debugging time of embedded software. At the same time, the fatal problems existing in the software and hardware can be found in the co-verification environment in time, and the readjustment of the software and hardware can be avoided in the final integration test.   SoC Design Verification Technology It is mainly divided into three levels: IP core verification, IP core and bus interface compatibility verification and system-level verification, including design concept verification, design implementation verification, design performance verification, fault simulation, chip testing and so on. From the type of verification, there are compatibility test, corner test, random test, real code test, regression (Regression) test, assertion verification and so on. Due to the increasing complexity of the chip and the high cost of software simulation, hardware simulation verification has become an important verification method. Verification accounts for about 70% of the whole design work. And how to improve the verification coverage and efficiency is the eternal topic of design verification.     Chip Synthesis / Timing Analysis Technology Due to the increasing complexity and scale of SoC system, new topics such as multi-clock, multi-voltage and ultra-deep submicron continue to emerge, which puts forward higher requirements for the comprehensive research of SoC. In particular, the research on how to classify and decompose the time series budget and special constraints of critical path requires researchers to master a great deal of system background knowledge. At the same time, the static timing analysis (STA) is becoming more and more complex and the efficiency of back-end dynamic simulation is low, which poses a severe challenge to the overall designers.     Testability / Debuggability Design Technology This paper mainly studies and solves the problems of batch production testability and online debuggability. The implementation technologies include DFT, SCAN, BIST, Iddq, JTAG/eJTAG. To study the SoC test architecture based on various IP cores and test the efficient transitivity of vector, It is more important to consider the parallelization of testing and reduce the time occupied by chip testing. In addition, we should pay attention to online debugging to facilitate users to develop and debug SoC-based products.   Low Power Consumption Design Technology Low power consumption has become an equally important design goal as area and performance, so accurate evaluation of power consumption has also become an important issue. The power consumption of the chip is mainly composed of jump power consumption, short circuit power consumption and leakage power consumption. In order to reduce power consumption, it is necessary to study the circuit implementation technology, input vector control (IVC) technology, multi-voltage technology, power consumption management technology and software (algorithm) low-power utilization technology from the perspective of SoC multi-level stereo to solve the problem comprehensively.   New Circuit Implementation Technology Due to the sharp increase in the number of transistors, the decreasing chip size, the increasing density, the increased reuse frequency of IP cores, the emergence of low voltage, multi-clock, high frequency, high testability, new and difficult packaging and other requirements, as well as the endless emergence of new design technologies, the minimum dimensions of semiconductor technologies develop towards deep submicron. And this requires SoC designers to constantly study new technologies, new tools, key circuit architecture, timing convergence, signal integrity, antenna effect and so on.     Embedded Software Migration / Development The main research and development of BIOS and embedded operating system transplantation / development of SoC is to support multi-task, to make program development easier, to improve the stability and reliability of the system, to make maintenance convenient, to make reading and understanding easier. Therefore, it should have the characteristics of good security, strong robustness, high code execution efficiency and so on. For example, the embedded Linux operating system code implantation research on SoC chip can reduce the difficulty based on BSP development for system developers. At the same time, it improves the development efficiency and shortens the development cycle.     SoC classification In this paper, SoC is classified into three categories: CSoC, SOPC and ASIC SoC, and then unified them into SoC architecture classification model.   Technical characteristics of CSoC CSoC is generally composed of processor, memory, ASIC-based kernel and on-chip reconfigurable components, which has obvious advantages over ASIC SoC and multi-chip board-level development based on standard components. It is characterized by:    —CPU + reconfigurable processing artifacts. —Efficiency and flexibility combine well. —Refactoring based determination processing function. —It is superior to supercomputer in image processing, pattern matching and so on. —According to the needs of the task, it can be dynamically reconfigurable to improve the performance-price ratio.   At present, the academia pays more attention to the XPP (eXtreme Processing Platform), which is the efficient processor with dynamic reconfiguration. XPP embeds programmable logic modules in a SoC based on a microprocessor core based on a bus architecture to form a reconfigurable SoC platform, as shown in figure 1. The applicable reconfigurable data processing architecture is often composed of processing array element (PAE), communication network packet oriented, hierarchical reconfiguration management tree (CM) and I/O module. XPP has the ability to automatically reconstruct streams and process data streams, breaking through the traditional John von Neumann instruction stream mode. Because of the high degree of regularity, it is easy to obtain instruction-level parallelism and pipeline efficiency.   Figure 2.     CSoC Architecture based on XPP/Leon   Technical characteristics of SoPC SoPC is a special on-chip system. It is a programmable system which has flexible design mode. It can be cut, expanded and upgraded and it also has programmable functions in the development of software and hardware on-line system. It combines the advantages of SoC and FPGA, including the following basic characteristics: —Contains at least one embedded processor IP core —Small capacity on-chip high-speed RAM resources —Rich IP core resources for choice —Sufficient on-chip programmable logic resources —Shared or coexisting processor debugging interface and FPGA programming interface —May contain partially programmable analog circuits   The block diagram of SoPC is shown in figure 2. In addition to the above characteristics, it also involves the software and hardware co-design technology, which has aroused widespread concern at present. Because the main logic design of SoPC is carried out in programmable logic devices, and BGA packaging has been widely used in the field of micropackaging, traditional debugging equipment, such as logic analyzer and digital oscilloscope, has been difficult to carry out direct test and analysis. Therefore, it is necessary to put forward higher requirements for software and hardware co-design technology based on simulation technology. At the same time, new debugging technology has been emerging.   Figure 3.  The block diagram of SoPC Technical characteristics of ASIC SoC ASIC SoC is an application-specific on-chip system, which has the characteristics of high performance, strong real-time, high reliability, low power consumption, low cost and so on. It generally has the following basic characteristics:  —At least one CPU kernel.  —Normative bus architecture  —RAM resources (or on-chip memory access controller)  —An appropriate amount of I/O equipment (including analog ones)  —Extensible interfaces (such as PCI)  —On-line debugging port (eJTAG)  —Circuits with testability   Figure 4.  L*BUS Bus Architecture Diagram   ASIC SoC is generally a product based on IP core or SoC development platform. It requires expertise, IP libraries, SoC bus architecture, and embedded software support (including BIOS, OS). It also requires a wide range of multifunctional IP cores and the design to integrate customer logic with it to meet customers’ needs for product development. SoC designers not only take advantage of the latest technology, but also reduce the development cycle and risk by reusing the proven IP core.   At present, there are many kinds of SoC bus architecture and each of them is developed to meet the requirements of its specific application field. Some are suitable for downmarket embedded products, some are suitable for handheld products, and some are suitable for high-energy products. In a word, everyone has its own advantages. The development of SoC cannot be separated from the constraints of power consumption, performance, cost, testability, reliability, IP core reusability, platform technical support and software and hardware’s co-development. Developers need to have a strong background in computer architecture in order to support its rapid development.   Classification principles of SoC SOC can be classified according to the architecture it adopts: One is the architecture based on instruction stream computing, which is typically represented by the traditional ASIC SoC. According to the control of instruction stream and data stream, this type can be divided into SISD (single instruction stream-single data stream), SIMD (single instruction stream-multiple data stream), MISD (multiple instruction stream-single data stream) and MIMD (multiple instruction stream-multiple data stream) in order to flexibly adapt to the needs of different algorithms in various applications.   The second one is an architecture based on data stream computing, which only controls the input / output data of the unit. Working according to the principle of data stream, it is more efficient than instruction stream, but less flexible. Pulsating array based on data stream computing is a typical architecture of this kind. A pulsating array is an array of data path components DPU (Data Path Unit). The data streams out of the data memory according to the beat, completes the calculation through the PU array, and the result flows back to the data memory. PU arrays have only the ability to control data, which is also the origin of FlowWare. Conventional SoPC is its typical technical representative.   The third is the architecture based on configuration stream computing. Using coarse-grained FPGA chip as carrier，SoC can dynamically reconstruct the hardware form of architecture design by adopting Morphwave. It can be an array of rPU (reconfigurable Processing Unit) and implemented by Configuwave. The configuration stream comes from the configuration memory called CM (reConfiguration Memory), which controls the changes of the rPU array through reConfiguration Manager and works according to the principle of data stream. CSoC is its typical technical representative.   Classification model of SoC According to the classification principles of the SoC architecture mentioned above, we establish a three-dimensional classification model of CDI architecture on the basis of the concepts of instruction stream, data stream and configuration stream, corresponding to I (Instruction Stream Architecture) axis, D (Data Stream Architecture) axis and C (reConfiguration Stream Architecture) axis. And it is shown in figure 4.   Any SoC with hybrid computer architecture of instruction stream computing, data stream computing and configuration stream computing can be summarized in CDI three-dimensional space. There are four basic architecture classifications on I axis: SISD, SIMD, MISD and MIMD. On the D axis, there are only two basic states: single data stream architecture and multiple data stream architecture. And there are also only two basic states on the C axis: single reconfiguration stream architecture and multiple reconfiguration stream architecture.      Figure 5.  CDI Classification Model Diagram     Development Direction of SoC Technology Since the concept of SoC was put forward in the late 1990s, the technology has been developed rapidly. Whether it is CSoC, SoPC or ASIC SoC, all of them are gradually related to computer science, microelectronics, materials and technology, electronic communication and so on. Their interdisciplinary development provides a strong support for the technical development of SoC.   Computer Science promotes the level of SoC Technology John von Neumann architecture and data stream architecture are the mainstream architectures of computers. The first one is characterized by the integration of program and data while the second one is characterized by the separation of program and data. The miniaturization of general purpose computer provides a source for the development of SoC technology.   Bus Architecture Technology, Algorithm Implementation Technology, Modular Design Technology, BIOS Technology, Software Engineering Technology, Software and Hardware Debugging Technology, System Verification Technology, performance Evaluation Technology, Real-time Processing Technology, Reliability Design Technology, Human-computer Interaction Technology, Load Balancing Technology and Low-power Consumption Design Technology in computer field are all reflected in SoC design technology. It also promotes the rapid development of SoC in a few years and becomes one of the main development directions of computers in the post-PC era.   Although the development of SoC technology is closely related to the development of technology and the improvement of EDA design means, its core is CPU core, bus architecture and various IP cores. In the overall performance evaluation and implementation technology, all of them are related to the computer professional field. Especially in upmarket applications, such as multi-CPU core integration and heterogeneous integration and other system requirements, computer science will continue to promote the development of SoC technology from different levels.   SoC promotes the Development of computer Architecture The development of SoC technology is closely related to the market demand. The main application fields of SoC are computer, communication, consumer electronics, industrial control, transportation and so on. Communications, computers and consumers account for more than 80 percent of SoC's sales, and the proportion of consumers is growing.   It can be divided into different categories if we further subdivide SoC market. For computer, there is image processing, hard disk drive, high-grade printer, personal assistant and so on. For communication, there is wired network, wireless network, mobile phone, visual equipment, communication base station and so on. For industrial control, there is process control or processing, test or instrument, medical equipment, monitoring system and so on. And for transportation, there is engine control, instrument device, safety system and so on. With the increasing scale of SoC market, it plays a more and more important role in the field of information technology and electronic products. At present, the SoC market is basically based on middle and low-grade SoC products. With the increasing demand for digital products, the demand for upmarket SoC is becoming more and more urgent. For example, in audio, video, communication and other fields, higher requirements are placed on SoC such as dual-core, quad-core and other multi-core integration. SoC will replace the traditional CPU in the middle and high grade to develop in the direction of better system performance, lower power consumption, lower cost, higher reliability and easier development in order to meet the interactive needs of people with GUI screen-centered multimedia interface and information terminals such as handwritten text input, identity recognition, voice dial-up Internet, sending and receiving e-mail, video playback, online games, videophone, language simultaneous interpretation and so on.SoC will embed enhanced processing devices such as 32-bit, 64-bit RISC chips or digital signal processing chips (DSP). At the same time, it supports the development of embedded RTOS and uses real-time multi-task programming technology and cross-development tool technology to control functional complexity to Inherit and develop computer processor technology. All of this poses greater challenges to computer architecture.   Under the guidance of computer architecture, SoC will usher in a new round of technical development. It takes embedded system application as the core, integrates software and hardware, and pursues the maximum inclusiveness of product system in system integration. SoC chip design not only needs strong background knowledge of computer architecture, but also highlights the status of software development, and puts forward higher requirements for development platform and embedded operating system. It provides a broad world for computer professionals to show their skills.   With the rapid development of processor / IP core design technology at home and abroad, it provides a powerful driving force for the development of computer architecture. Persisting in the development of processor core, core IP core and bus architecture with independent property rights, and ensuring compatibility, will make the development of SoC in China competitive thus driving the domestic IC industry to further develop. In order to meet the needs of industry, the of SoC designers’s in-depth researches on the architecture of configuration stream, instruction stream and data stream will also make a significant contribution to the development of computer science.   SoC opens up a new world for the development of interdisciplinary disciplines SoC is a new field of technology that needs the support of many disciplines. Its development has been inseparable from the technical support from computer science, microelectronics, materials and technology, electronic communications and other fields. New technology and new products will continue to emerge and more in-depth researches on SoC are needed.   At present, the development of SoC technology is mainly realized at the same process level, mainly electronic technology. However, in practical applications, higher requirements for microminiaturization and system integration technology are constantly put forward. The development of micro-systems that integrate micro-mechanisms, micro-sensors, micro-actuators, signal processing and control and communication interface circuits and energy, which can perform specific functions, has put on the agenda. MEMS, which combines microelectronics and micromechanics, will become a new basis for the development of SoC. MEMS is also a multidisciplinary frontier research field, involving electronic engineering, mechanical engineering, material engineering, information engineering, physics, chemistry, optics, biomedicine and other disciplines and technologies.   The obvious advantage of system integration is to inherit and develop the benefits of various process technologies. Although the development of various processes is extremely unbalanced, SiP (System in Package) design technology can be used to integrate various integrated circuits of different processes such as CMOS circuits, GaAs circuits, SiGe circuits or optoelectronic devices, MEMS devices, and various passive components such as capacitors, inductors, etc. into a package when multiple processes are needed to coexist in the process of system integration. The implementation of more complex systems in a single package can improve packaging efficiency, performance and reliability by about 10 times, and the size and cost can be greatly reduced.   The development trend of SoC technology will be the integration of SoC, MEMS and SiP, and the computer architecture will be constantly enriched and developed. SoC's CDI classification model can depict the development of system technology, meet the single chip requirements of more complex systems and promote the interdisciplinary development at the same time.   Related products XC7Z100-2FFG900I XC7Z010-1CLG400I