The Kynix Blog

IBM today introduced the fifth generation of semiconductor technology specialized for high performance communications. The company's latest silicon-germanium (SiGe) chip-making process is designed to enable ever-increasing amounts of data to flow through network backbones in applications such as Wi-Fi, LTE cellular, wireless backhaul and high speed optical communications.Since its introduction in 1995, IBM's SiGe semiconductor technology has helped spur a revolution in radio frequency (RF) performance, enabling engineers to develop breakthrough devices such as satellite global positioning systems, WiFi radios and high speed optical links. IBM's new "9HP" SiGe technology continues to put advanced capability in the hands of engineers who design chips for LTE cellular base stations, millimeter-wave wireless communication links, and next generation short and long-haul optical communications. Outside of communications, 9HP performance will advance the state of the art in other applications such as high-performance test equipment, automotive radar and security imaging."Silicon-germanium is one of the key technologies that have enabled wireless operators to keep up with the explosive growth in data traffic generated from mobile handsets," said David Harame, IBM Fellow. "Before SiGe, the high-performance chips used in base stations and optical links were built using expensive, esoteric processes. SiGe provides the necessary performance as well as integration and cost savings via its CMOS base."Open Collaboration is Key to SuccessOver the years, a number of leading technology companies have come to rely on the benefits and advantages of SiGe, working closely with IBM to develop and refine new versions of the chip-making process. IBM believes that open collaboration among companies will drive future breakthrough innovation in semiconductors."As early adopters of IBM's SiGe technology, Semtech has consistently pushed the envelope on what can be achieved in high-speed wired and wireless communications systems and in high performance analog devices," said Charles Harper, Senior Vice President of Semtech's Systems Innovation Group. "With today's technology, Semtech is a leader in 40Gbps and 100Gbps Communications Systems and with IBM's latest SiGe technology we believe we can emerge as a leader in several new analog segments where performance, integration and power are critical requirements.""Our long collaboration with IBM on SiGe technology has enabled Tektronix to break new barriers on what can be achieved in high-fidelity, high-bandwidth oscilloscopes," said Kevin Ilcisin, chief technology officer, Tektronix. "We utilized IBM's SiGe 9HP for our patent-pending asynchronous interleaving approach, and expect to break new ground by providing customers bandwidth capabilities of 70 GHz and beyond while significantly improving our signal-to-noise ratio."Key Technology Details, Specs9HP will be the first SiGe technology in the industry featuring the density of 90nm CMOS which will enable the highest level of integration in a fully production qualified SiGe BiCMOS technology. IBM's new SiGe BiCMOS technology delivers higher performance, lower power and higher levels of integration than current 180nm or 130nm SiGe offerings.The technology maintains compatibility with IBM's 90nm low power CMOS technology platform, enabling foundry clients to port a wide range of intellectual property circuit blocks and standard cell library elements. The 90nm foundry platform also includes an RF CMOS technology option, giving IBM foundry customers a broad range of technology choices for RF and mixed-signal applications.Additional technical specifics include:90nm Lithography based SiGe BiCMOSAdvanced SiGe HBT NPNs, Ft = 300GHz, Fmax > 350GHz90nm CMOS FETs, 1.5, 2.5v/3.3vThick Dielectric Add-On Modules – Low-K, Cu, AlFull Suite of Passives-Resistors, Varactors, MOS and MIM Capacitors, High Q Inductors, mmWave elementsPIN and THz Schottky Barrier DiodesProcess Design Kits featuring precision RF device models 

One of the greatest challenges in the evolution of electronics has been to reduce power consumption during transistor switching operation. In a study recently reported in Nature, engineers at University of California, Santa Barbara, in collaboration with Rice University, have demonstrated a new transistor that switches at only 0.1 volts and reduces power dissipation by over 90% compared to state-of-the-art silicon transistors (MOSFETs).     MOSFETs have been the building blocks of everyday electronic products since the 1970s. However, to sustain the ever-growing need for increased transistor densities, miniaturization of MOSFETs has given rise to a power dissipation challenge due to the fundamental limitations of their turn-on characteristics. "The steepness of a transistor's turn-on is characterized by a parameter known as the subthreshold swing, which cannot be lowered below a certain level in MOSFETs," explained Kaustav Banerjee, Professor of Electrical and Computer Engineering at UC Santa Barbara. A minimum gate voltage change of 60 millivolts at room temperature is required to change the current by a factor of ten in MOSFETs. In essence, the existing state of transistor technology limits the energy efficiency potential of digital circuits in general. The research group of Professor Kaustav Banerjee at UC Santa Barbara took a new approach to subverting this fundamental limitation. They employed the quantum mechanical phenomenon of band-to-band tunneling to design a tunnel field effect transistor (TFET) with sub-60mV per decade of subthreshold swing. "We restructured the transistor's source to channel junction to filter out high energy electrons that can diffuse over the source/channel barrier even in the off state, thereby making the off state current negligibly small," explained Banerjee. At UCSB, Banerjee's Nanoelectronics Research Lab includes Deblina Sarkar, Xuejun Xie, Wei Liu, Wei Cao, Jiahao Kang, and Stephan Kraemer, as well as Yongji Gong and Pulickel Ajayan of Rice University. Banerjee and his colleagues are motivated by a global electronics industry that loses billions of dollars each year to the impact of power dissipation on chip cost and reliability. "This translates into lower battery lifetime in personal devices like cell phones and laptops, and massive power consumption of servers in large data centers," adds Banerjee, pointing out the global scale of this energy demand. An industry that relies on conventional semiconductors such as silicon or III-V compound semiconductors as the channel material for TFETs, Banerjee explains, "faces limitations because these materials have high density of surface states, which increase leakage current and degrade the subthreshold swing." The TFET designed by the UCSB team overcame this challenge in a few ways, most significant being the use of a layered two-dimensional (2D) material called molybdenum disulphide (MoS¬2). As the current-carrying channel placed over a highly doped germanium (Ge) as the source electrode, MoS2 offers an ideal surface and thickness of only 1.3nm. The resulting vertical heterostructure provides a unique source-channel junction that is strain-free, has a low barrier for current-carrying electrons to tunnel through from Ge to MoS¬2 through an ultra-thin (~0.34nm) van der Waals gap, and a large tunneling area. "The crux of our idea is to combine 3D and 2D materials in a unique heterostructure, to achieve the best of both worlds. The matured doping technology of 3D structures is married to the ultra-thin nature and pristine interfaces of 2D layers to obtain an efficient quantum-mechanical tunneling barrier, which can be easily tuned by the gate," commented Deblina Sarkar, lead author of the paper and PhD student in Banerjee's lab. "We have engineered what is, at present, the thinnest-channel subthermionic transistor ever made," said Banerjee. Their atomically-thin and layered semiconducting channel tunnel FET (or ATLAS-TFET) is the only planar architecture TFET to achieve subthermionic subthreshold swing (~30 millivolts/decade at room temperature) over four decades of drain current, and the only one in any architecture to achieve so at an ultra-low drain-source voltage of 0.1V. Ajayan, co-author and professor of chemical and biomolecular engineering at Rice University, commented, "This is a remarkable example showing the uniqueness of 2D atomic layered materials that enables device performance which conventional materials will not be able to achieve. This is perhaps the first breakthrough in a series of novel devices that people will now aspire to build using 2D materials." "The work is a significant step forward in the search for a low voltage logic transistor. The demonstration of sub-thermal operation over four orders of magnitude is impressive, and the on-current also advances the state-of-the-art. There is still a long ways to go, but this work demonstrates the potential of 2D materials to realize the long-sought, low-voltage device," commented Mark Lundstrom, professor of electrical and computer engineering at Purdue University. "We have demonstrated how to achieve the most important metric of steep subthreshold swing that meets ITRS requirements. Our transistor can be utilized for a number of low-power applications including arenas where the steep subthreshold swing is the main requirement, such as biosensors or gas sensors. With improved performance, the range of applications of this transistor can be further expanded," explained Wei Cao, a PhD student in Banerjee's group and a co-author of the article. "This work represents an important step of bringing 2D materials closer to real applications in electronics. The use of 2D materials in tunneling transistors started only recently, and this paper gives the whole field yet another strong boost in improving the characteristics of such devices even further," commented Dr. Konstantin Novoselov, a professor of physics at University of Manchester. Novoselov was co-recipient of the 2010 Nobel Prize in Physics, awarded for the discovery of graphene. "When I first heard Banerjee's idea of using 2D materials for designing inter-band tunneling transistors in 2012, I recognized its merit and immense potential for ultra-low power electronics. I am pleased to see that his vision has been realized," commented James Hwang, professor of electrical engineering at Lehigh University, who was then the AFOSR program manager responsible for funding this research.    

A new compact transistor model was developed and the framework for realizing a faster design support process and product development for integrated circuits in the ultra-low voltage category was established. The new compact model, HiSIM-SOTB (Hiroshima University STARC IGFET Model Silicon-on-Thin BOX), was developed by Hiroshima University's HiSIM Research Center in collaboration with its partners in the industry and government institutions, including the National Institute of Advanced Industrial Science and Technology (AIST) of Japan. On June 20, 2014, after a two-year-long effort by the industry/government/academia research team, this new model was selected as an international industry standard during a meeting in Washington D.C., which was held by the Compact Modeling Coalition (CMC) of the Silicon Integration Initiative (Si2).HiSIM-SOTB accurately replicates the characteristics of the SOTB-MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), which is expected to become a practical transistor structure for super-low-power-consumption by lowering the operating voltage of integrated circuits. The research team, which was led by Prof. Mitiko Miura-Mattausch, HiSIM Research Center of Hiroshima University (headed by Prof. Hans Jurgen Mattausch) and Dr. Hanpei Koike, Leader, Electroinformatics Group, Nanoelectronics Research Institute (headed by Dr. Tetsuji Yasuda) of AIST, successfully implemented the loop between Hiroshima University's development of the transistor model and AIST's reproduction tests of measured data. The results verify that HiSIM-SOTB enables the accurate simulation of circuit operations in the case of substantially lowered supply voltages for transistor operation, ranging from 1 V to 0.4 V.By solving the Poisson equation, HiSIM-SOTB accurately finds the surface potentials at three required positions: the upper and lower sides of the ultrathin SOI (Silicon-on-insulator as a silicon channel layer) film, and the upper side of the substrate. For this purpose, the device physics was represented using three basic equations. To solve these equations including the three surface potentials, it was necessary to address the challenge of stably solving the third-order Newton equation in order to obtain their numerical solutions. However, by developing an appropriate algorithm, the research group has enabled HiSIM-SOTB to accurately reproduce the changes in the substrate-carrier concentration and in the carrier distribution as a function of the applied substrate bias voltage. In parallel, HiSIM-SOTB includes a variety of ingenious twists to shorten the calculation time. HiSIM-SOTB has subsequently been completed as an ultimate compact model that is applicable to any device structure.During the early stages of the development of HiSIM-SOTB, the cooperation that leveraged the strengths of each of our partners in industry, government, and academia was beneficial. This collaboration was carried out based on each partner's previous attempts to realize a standardized compact transistor model. The realization of this effective and rapid cooperation was one of the major reasons why the research team could solve the problems related to the perfection of a compact model for the standardization within the limited time available. Indeed, this collaboration has enabled the ideal scenario to be realized, in that before finalizing the device's design, the evaluation of the circuit characteristics was completed, and an environment for large-scale circuit design was already established. 

New research, led by the University of Southampton, has demonstrated that a nanoscale device, called a memristor, could be the 'missing link' in the development of implants that use electrical signals from the brain to help treat medical conditions.Monitoring neuronal cell activity is fundamental to neuroscience and the development of neuroprosthetics – biomedically engineered devices that are driven by neural activity. However, a persistent problem is the device being able to process the neural data in real-time, which imposes restrictive requirements on bandwidth, energy and computation capacity.In a new study, published in Nature Communications, the researchers showed that memristors could provide real-time processing of neuronal signals (spiking events) leading to efficient data compression and the potential to develop more precise and affordable neuroprosthetics and bioelectronic medicines.Memristors are electrical components that limit or regulate the flow of electrical current in a circuit and can remember the amount of charge that was flowing through it and retain the data, even when the power is turned off.Lead author Isha Gupta, Postgraduate Research Student at the University of Southampton, said: "Our work can significantly contribute towards further enhancing the understanding of neuroscience, developing neuroprosthetics and bio-electronic medicines by building tools essential for interpreting the big data in a more effective way."The research team developed a nanoscale Memristive Integrating Sensor (MIS) into which they fed a series of voltage-time samples, which replicated neuronal electrical activity.Acting like synapses in the brain, the metal-oxide MIS was able to encode and compress (up to 200 times) neuronal spiking activity recorded by multi-electrode arrays. Besides addressing the bandwidth constraints, this approach was also very power efficient – the power needed per recording channel was up to 100 times less when compared to current best practice.Co-author Dr Themis Prodromakis at the University of Southampton said: "We are thrilled that we succeeded in demonstrating that these emerging nanoscale devices, despite being rather simple in architecture, possess ultra-rich dynamics that can be harnessed beyond the obvious memory applications to address the fundamental constraints in bandwidth and power that currently prohibit scaling neural interfaces beyond 1,000 recording channels."

A new semiconductor device capable of emitting two distinct colours has been created by a group of researchers in the US, potentially opening up the possibility of using light emitting diodes (LEDs) universally for cheap and efficient lighting.The proof-of-concept device takes advantage of the latest nano-scale materials and processes to emit green and red light separated by a wavelength of 97 nanometres—a significantly larger bandwidth than a traditional semiconductor.Furthermore, the device is much more energy efficient than traditional LEDs as the colours are emitted as lasers, meaning they emit a very sharp and specific spectral line—narrower than a fraction of a nanometre—compared to LEDs which emit colours in a broad bandwidth.One of the main properties of semiconductors is that they emit light in a certain wavelength range, which has resulted in their widespread use in LEDs. The wavelength range in which a given semiconductor can emit light—also known as its bandwidth—is typically limited in the range of just tens of nanometres. For many applications such as lighting and illumination, the wavelength range needs to be over the entire visible spectrum and thus have a bandwidth of 300 nm.Single semiconductor devices cannot emit across the entire visible spectrum and therefore need to be 'put' together to form a collection that can cover the entire range. This is very expensive and is, to a large extent, the reason why semiconductor LEDs are not yet used universally for lighting.In this study, the researchers, from Arizona State University, used a process known as chemical vapour deposition to create a 41 micrometer-long nanosheet made from Cadmium Sulphide and Cadmium Selenide powders, using silicon as a substrate.Lead author of the study, Professor Cun-Zheng Ning, said: "Semiconductors are traditionally 'grown' together layer-by- layer, on an atom-scale, using the so-called epitaxial growth of crystals. Since different semiconductor crystals typically have different lattice constants, layer-by-layer growth of different semiconductors will cause defects, stress, and ultimately bad crystals, killing light emission properties."It is because of this that current LEDs cannot have different semiconductors within them to generate red, green and blue colours for lighting.However, recent developments in the field of nanotechnology mean that structures such as nanowires, nanobelts and nanosheets can be grown to tolerate much larger mismatches of lattice structures, and thus allow very different semiconductors to grow together without too many defects."Multi-colour light emission from a single nanowire or nanobelt has been realized in the past but what is important in our paper is that we realized lasers at two distinct colours. To physically 'put' together several lasers of different colors is too costly to be useful and thus our proof-of concept experiment becomes interesting and potentially important technologically."In addition to being used for solid state lighting and full color displays, such technology can also be used as light sources for fluorescence bio and chemical detection," continued Professor Ning. 

It's only a centimeter long, it's placed under your skin, it's powered by a patch on the surface of your skin and it communicates with your mobile phone. The new biosensor chip developed at EPFL is capable of simultaneously monitoring the concentration of a number of molecules, such as glucose and cholesterol, and certain drugs.The future of medicine lies in ever greater precision, not only when it comes to diagnosis but also drug dosage. The blood work that medical staff rely on is generally a snapshot indicative of the moment the blood is drawn before it undergoes hours - or even days - of analysis.Several EPFL laboratories are working on devices allowing constant analysis over as long a period as possible. The latest development is the biosensor chip, created by researchers in the Integrated Systems Laboratory working together with the Radio Frequency Integrated Circuit Group. Sandro Carrara is unveiling it today at the International Symposium on Circuits and Systems (ISCAS) in Lisbon.Autonomous operation"This is the world's first chip capable of measuring not just pH and temperature, but also metabolism-related molecules like glucose, lactate and cholesterol, as well as drugs," said Dr Carrara. A group of electrochemical sensors works with or without enzymes, which means the device can react to a wide range of compounds, and it can do so for several days or even weeks.This one-centimetre square device contains three main components: a circuit with six sensors, a control unit that analyses incoming signals, and a radio transmission module. It also has an induction coil that draws power from an external battery attached to the skin by a patch. "A simple plaster holds together the battery, the coil and a Bluetooth module used to send the results immediately to a mobile phone," said Dr Carrara.Contactless, in vivo monitoringThe chip was successfully tested in vivo on mice at the Institute for Research in Biomedicine (IRB) in Bellinzona, where researchers were able to constantly monitor glucose and paracetamol levels without a wire tracker getting in the way of the animals' daily activities. The results were extremely promising, which means that clinical tests on humans could take place in three to five years - especially since the procedure is only minimally invasive, with the chip being implanted just under the epidermis."Knowing the precise and real-time effect of drugs on the metabolism is one of the keys to the type of personalised, precision medicine that we are striving for," said Dr Carrara.