The Kynix Blog

(Random telegraph noise from single molecule was adsorbed on SWNT.) Noise is low-frequency random fluctuation that occurs in many systems, including electronics, environments, and organisms. Noise can obscure signals, so it is often removed from electronics and radio transmissions. The origin of noise in nanoscale electronics is currently of much interest, and devices that operate using noise have been proposed. Materials with a high surface-to-volume ratio are attractive for studying the noise produced by nanoscale electronics because they are very sensitive to changes of their surfaces. A representative material of this type is carbon nanotubes, which are rolled sheets of the graphene hexagonal network, which is only one carbon atom thick. A Japanese collaboration led by Osaka University has explored the ability of single molecules to affect the noise generated by carbon nanotube-based nanoscale electronic devices. The team fabricated simple devices consisting of a carbon nanotube bridging two electrodes. The devices were exposed to different large molecules, causing some to bind to the carbon nanotube surface. It was found that different molecules gave unique noise signals related to the properties of the molecules. The strength of the interaction between the carbon nanotubes and molecules was able to be predicted from the obtained noise signals. "The signal generated by the carbon nanotube device changed following the adsorption of specific single molecules," says first author Agung Setiadi. "This is because the adsorbed molecule generated a trap state in the carbon nanotube, which changed its conductance." What this means is that the carbon nanotube-based devices were so sensitive that the researchers were able to detect unique signature from single molecules. The ability to characterize single molecules using highly sensitive nanoelectronics is an exciting prospect in the field of sensors, particularly for neuro- and biosensor applications. "Use of noise signals to identify molecular activity ((interaction) or (active orbital)) is attractive for developing advanced sensing devices," explains corresponding author Megumi Akai-Kasaya. "We demonstrated that noise can be exploited to improve the signal detection ability of a device." The results of this successful demonstration will be published in the near future in a follow-up article. Signal detection sensitivity may be increased through controllable noise generation. These carbon nanotube-based devices illustrate that it is possible to detect single molecules through their unique noise signatures in the device current signals. Improved knowledge of the molecular-level origin of noise should lead to the development of electronics that use noise to improve their performance rather than degrade it.. Ref.A1321ELHLT-TAS5030-ATST 

(Steve Cain is a senior research support specialist in the Integrated Electronics Engineering Center (IEEC) at Binghamton University. Credit: Jonathan Cohen/Binghamton University)While investigating mass transit accidents, especially in air travel, National Transportation Safety Board (NTSB) officials often rely on digital clues left behind in flash memories of any and all electronic devices—both personal and professional—at a crash site. With the physical forces and high-temperature fires associated with many crashes, memory units are often damaged and sometimes unreadable.Researchers at Binghamton University, State University of New York have figured out how much damage memory units can sustain before becoming unreadable and new repair techniques to retrieve clues off of damaged units, which might help prevent future tragedies."The biggest surprise was how much punishment these devices can take before ceasing to function," said Steve Cain, who is the project manager and a senior research support specialist in the Integrated Electronics Engineering Center (IEEC) at Binghamton University. "As part of their post-crash investigations, the NTSB collects anything and everything at the scene, including personal electronic devices. If the device was active during or just before the crash, it is possible that the data stored in the memory can provide clues as to the cause of the crash. Most of the time the device is ruined, but sometimes it is intact."The interdisciplinary Binghamton group of Cain, Preeth Sivakumar, Jack Lombardi, and Mark Poliks along with James Cash, Joseph Gregor, and Michael Budinski from the NTSB, presented "Fire Damage and Repair Techniques for Flash Memory Modules: Implication for Post-Crash Investigations" at the Fall 2016 International Symposium of Microelectronics.Scientists found plastic coverings started to break down after three hours of exposure to temperatures of 300 degrees Celsius, or about 572 degrees Fahrenheit or more, but memory chips were still readable.Researchers pointed out that even with the pressures and forces in play during past crashes, temperatures typically only reach those levels for short periods of time."Data integrity was maintained even in a plasma discharge," Cain said. "Basically, if the device doesn't burn up, there is a reasonable chance of the data being retained in the chip. The only problem is that the connections to the memory chips may be broken, so that the data cannot be read."For the second part of the study, researchers addressed the readability issue. The team purposely damaged memory units and then extracted memory chips using acid, lasers, plasma, or mechanical polishing.Lasers were the most effective extraction method and mechanical extractions was the simplest, but each method still damaged the wire bonds within memory chips and made many unreadable. A specialized metallic ink from a precision printer was used to restore functionality."These results expand the investigative scope for aviation accidents, where the data rather than the device is of paramount importance," the team concluded. "It is possible to repair the interconnections of flash memory modules, provided the chip is intact." Ref.AT27C1024-45JCEDD10161BBH-6ETS-F

Electrical engineers at the University of California San Diego have developed a temperature sensor that runs on only 113 picowatts of power -- 628 times lower power than the state of the art and about 10 billion times smaller than a watt. This near-zero-power temperature sensor could extend the battery life of wearable or implantable devices that monitor body temperature, smart home monitoring systems, Internet of Things devices and environmental monitoring systems.   The technology could also enable a new class of devices that can be powered by harvesting energy from low-power sources, such as the body or the surrounding environment, researchers said. The work was published in Scientific Reports on June 30.   "Our vision is to make wearable devices that are so unobtrusive, so invisible that users are virtually unaware that they're wearing their wearables, making them 'unawearables.' Our new near-zero-power technology could one day eliminate the need to ever change or recharge a battery," said Patrick Mercier, an electrical engineering professor at UC San Diego Jacobs School of Engineering and the study's senior author.   "We're building systems that have such low power requirements that they could potentially run for years on just a tiny battery," said Hui Wang, an electrical engineering Ph.D. student in Mercier's lab and the first author of the study.   Building ultra-low power, miniaturized electronic devices is the theme of Mercier's Energy-Efficient Microsystems lab at UC San Diego. Mercier also serves as co-director for the Center for Wearable Sensors at UC San Diego. A big part of his group's work focuses on boosting energy efficiencies of individual parts of an integrated circuit in order to reduce the power requirement of the system as a whole.   One example is the temperature sensor found in healthcare devices or smart thermostats. While the power requirement of state-of-the-art temperature sensors has been reduced to as low as tens of nanowatts, the one developed by Mercier's group runs on just 113 picowatts -- 628 times lower power.   Minimizing power   Their new approach involves minimizing power in two domains: the current source and the conversion of temperature to a digital readout.   Researchers built an ultra-low power current source using what are called "gate leakage" transistors -- transistors in which tiny levels of current leak through the electronic barrier, or the gate. Transistors typically have a gate that can turn on and off the flow of electrons. But as the size of modern transistors continues to shrink, the gate material becomes so thin that it can no longer block electrons from leaking through -- a phenomenon known as the quantum tunneling effect.   Gate leakage is considered problematic in systems such as microprocessors or precision analog circuits. Here, researchers are taking advantage of it -- they're using these minuscule levels of electron flow to power the circuit.   "Many researchers are trying to get rid of leakage current, but we are exploiting it to build an ultra-low power current source," Hui said.   Using these current sources, researchers developed a less power-hungry way to digitize temperature. This process normally requires passing current through a resistor -- its resistance changes with temperature -- then measuring the resulting voltage, and then converting that voltage to its corresponding temperature using a high power analog to digital converter.   Instead of this conventional process, researchers developed an innovative system to digitize temperature directly and save power. Their system consists of two ultra-low power current sources: one that charges a capacitor in a fixed amount of time regardless of temperature, and one that charges at a rate that varies with temperature -- slower at lower temperatures, faster at higher temperatures.   As the temperature changes, the system adapts so that the temperature-dependent current source charges in the same amount of time as the fixed current source. A built-in digital feedback loop equalizes the charging times by reconnecting the temperature-dependent current source to a capacitor of a different size -- the size of this capacitor is directly proportional to the actual temperature. For example, when the temperature falls, the temperature-dependent current source will charge slower, and the feedback loop compensates by switching to a smaller capacitor, which dictates a particular digital readout.   The temperature sensor is integrated into a small chip measuring 0.15 × 0.15 square millimeters in area. It operates at temperatures ranging from minus 20 C to 40 C. Its performance is fairly comparable to that of the state of the art even at near-zero-power, researchers said. One tradeoff is that the sensor has a response time of approximately one temperature update per second, which is slightly slower than existing temperature sensors. However, this response time is sufficient for devices that operate in the human body, homes and other environments where temperature do not fluctuate rapidly, researchers said.   Moving forward, the team is working to improve the accuracy of the temperature sensor. The team is also optimizing the design so that it can be successfully integrated into commercial devices.     Ref. ADT7410TRZ-REEL DS18B20

Toshiba Memory has announced development of the world’s first BiCS FLASH three-dimensional (3D) flash memory utilising Through Silicon Via (TSV) technology with 3-bit-per-cell (triple-level cell, TLC) technology. Shipments of prototypes for development purposes started in June, and product samples are scheduled for release in the second half of 2017. The prototype of this ground-breaking device will be showcased at the 2017 Flash Memory Summit in Santa Clara, California, United States, from August 7-10.Devices fabricated with TSV technology have vertical electrodes and vias that pass through silicon dies to provide connections, an architecture that realises high speed data input and output while reducing power consumption. Real-world performance has been proven previously, with the introduction of Toshiba’s 2D NAND Flash memory. Combining a 48-layer 3D flash process and TSV technology has allowed Toshiba Memory Corporation to successfully increase product programming bandwidth while achieving low power consumption. The power efficiency of a single package is approximately twice that of the same generation BiCS FLASH memory fabricated with wire-bonding technology. TSV BiCS FLASH also enables a 1-terabyte (TB) device with a 16-die stacked architecture in a single package. Toshiba Memory will commercialise BiCS FLASH with TSV technology to provide an ideal solution in respect for storage applications requiring low latency, high bandwidth and high IOPS/W, including high-end enterprise SSDs. Ref.KY32-CG7937AAKY32-CG7797AAT

Researchers at Tokyo Institute of Technology have devised a low-cost approach to developing all-solid-state batteries, improving prospects for scaling up the technology for widespread use in electric vehicles, communications and other industrial applications. Ever since batteries were invented over 200 years ago, there has been a drive to improve quality and performance at reduced costs.Compared to common lithium-ion batteries that contain lithium ion conducting liquids, all-solid-state batteries of the future promise a suite of advantages: improved safety and reliability, higher energy storage and longer life cycles. The discovery of ‘superionic’ conductors — solid crystals that enable fast movement of ions — is spurring the development of such dream batteries, but promising designs have so far relied on the use of rare metals such as germanium, making them too expensive for large-scale applications. Ryoji Kanno and colleagues at Tokyo Institute of Technology (Tokyo Tech) have now discovered a new material with a low-cost, scalable approach that involves substituting germanium for two more readily available elements: tin and silicon. The new material achieved an ionic conductivity that exceeds that of liquid electrolytes. Reporting their findings in Chemistry of Materials, the team states: "This germanium-free lithium conductor could be a promising candidate as an electrolyte in all-solid-state batteries." Due to its high chemical stability and ease of fabrication, Kanno says that the new material widens the possibilities of fine-tuning solid electrolytes to meet diverse industry and consumer needs. In 2011, Kanno and his team, working in collaboration with Toyota Motor Corporation and Japan's High Energy Accelerator Research Organisation (KEK), published a landmark paper in Nature Materials that introduced a solid electrolyte with the structure Li10GeP2S12 (LGPS). This material became an important forerunner in the race to develop viable all-solid-state batteries. It exhibited an ionic conductivity of 1.2x10-2S cm-1 at room temperature, a level comparable with — and even exceeding some — liquid electrolytes used in existing batteries. The team went on to design other solid electrolytes based on the same LGPS crystal structure, with promising results. In their latest study, the researchers kept the same framework structure of LGPS, and finely adjusted the ratio and positioning of the tin, silicon and other constituent atoms. The resulting material LSSPS (composition: Li10.35[Sn0.27Si1.08]P1.65S12 (Li3.45[Sn0.09Si0.36]P0.55S4)) achieved an ionic conductivity of 1.1x10-2S cm-1 at room temperature, almost reaching that of the original LGPS structure. Although further work will be required to optimise performance for different usage purposes, the new material raises hopes for low-cost production without sacrificing performance. Kanno envisions that in addition to meeting current battery needs across all sectors, all-solid-state batteries will expand the possibilities of responding to new user needs arising from the IoT and the shift towards smart systems, as well as powering robots, drones and space and aircraft technologies among others in future.  Ref.KY605-NH12VPKY605-NH15VP

In recent years Artificial intelligence (AI) has become a technology that global companies are desperately trying to take advantage of, as it is one of the most emerging and competitive technologies. However, a lot of AI technologies focus on the software, with operating speeds low which makes them a poor fit for mobile devices. For this reason big companies are focusing on developing AI with low power and high speeds, hoping to make AI fit for mobile use.   Professor Hoi-Jun Yoo of the Department of Electrical Engineering, along with his research team and collaboration with start-up company, UX Factory Co, has developed a semiconductor chip, CNNP (CNN Processor), which runs AI algorithms with ultra-low power, and K-Eye, a face recognition system using CNNP. Consisting of two different formats, the K-Eye series is available as a wearable type and a dongle type. The wearable type device can be used with a smartphone via Bluetooth, and it can operate for more than 24 hours with its internal battery. By conveniently hanging the K-Eye around their necks users can check information about people by using their smartphone or smart watch, which connects K-Eye and allows users to access a database via their smart devices. A smartphone with K-EyeQ, the dongle type device, can recognise and share information about users at any time.  It works by recognising an authorised user looking at the screen, which then automatically turns the smartphone on, without a fingerprint, passcode or iris authentication. The smartphone cannot be tricked by the user’s photograph, as it can distinguish whether an input face is coming from a saved photograph versus a real person. Other distinct features are carried out by the K-Eye series. Detecting a face at first and then recognising it is one, and it is possible to maintain ‘Always-on’ status with low power consumption of less than 1mW. The research team devised two key technologies to complete this: an image sensor with ‘Always-on’ face detection and the CNNP face recognition chip.  The ‘Always-on’ image sensor, the first key technology, is able to determine if there is a face in its camera range. Then, it can capture frames and set the device to operate only when a face exists, reducing the standby power significantly. Additionally the face detection sensor combines analogue and digital processing to reduce power consumption. Using this approach, the analogue processor, combined with the CMOS Image Sensor array, distinguishes the background area from the area likely to include a face, and the digital processor then detects the face only in the selected area. Therefore, it becomes effective in terms of frame capture, face detection processing, and memory usage.    Following this the second key technology, CNNP, is able to achieve incredibly low power consumption, by optimising a convolutional neural network (CNN) in the areas of circuitry, architecture, and algorithms. Specially designed to enable data to be read in a vertical direction as well as in a horizontal direction, the on-chip memory integrated in CNNP also has immense computational power with 1024 multipliers and accumulators operating in parallel and is capable of directly transferring the temporal results to each other without accessing to the external memory or on-chip communication network. Additionally, convolution calculations with a two-dimensional filter in the CNN algorithm are approximated into two sequential calculations of one-dimensional filters to achieve higher speeds and lower power consumption.  CNNP achieved 97% high accuracy but consumed only 1/5000 power of the GPU thanks to these new technologies. Face recognition can be performed with only 0.62mW of power consumption, and the chip can show higher performance than the GPU by using more power.  Developed by Kyeongryeol Bong, a PhD student under Professor Yoo, these chips were presented at the International Solid-State Circuit Conference (ISSCC) held in San Francisco earlier this year. CNNP, which has the lowest reported power consumption in the world, has achieved a huge amount of attention, which has led to the development of the present K-Eye series for face recognition.  Professor Yoo commented: “AI - processors will lead the era of the Fourth Industrial Revolution. With the development of this AI chip, we expect Korea to take the lead in global AI technology.”  Ref.MT9V022 OV05633