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What is an FPGA? A Basic Introduction [FAQ]

  • Contents

FPGA (Field-Programmable Gate Array), it is the product of further development on the basis of PAL, GAL, CPLD and other programmable devices. It appears as a kind of semi-custom circuit in the field of application specific integrated circuit (ASIC). It not only solves the shortage of custom circuit, but also overcomes the shortcoming of limited number of gates in the original programmable devices.

What is an FPGA, and how does it compare to a microcontroller?

Catalog

I. What is FPGA?

II. Principles of FPGAs 

III. FPGA Pros & Cons

IV. FPGA Chip Structure

V. FPGA Features

FAQ


I. What is FPGA?

FPGA (Field Programmable Gate Array) is a product of further development on the basis of programmable devices such as PAL and GAL. It emerged as a semi-custom circuit in the field of application-specific integrated circuits (ASIC), which not only solves the deficiencies of custom circuits, but also overcomes the shortcomings of the limited number of gate circuits of the original programmable devices.


II. Principles of FPGAs 

FPGA adopts the concept of Logic Cell Array (LCA), which consists of Configurable Logic Block (CLB), Input Output Block (IOB) and Internal Interconnect. Three parts. FPGAs are programmable devices with a different structure than traditional logic circuits and gate arrays (such as PAL, GAL and CPLD devices). The logic of the FPGA is implemented by loading programmed data into the internal static memory cell, and the values stored in the memory cell determine the logic function of the logic cell and the connection between the modules or between the modules and the I/O. The value stored in the memory cell determines the logical function of the logic unit and the way the modules are linked to each other or to the I/O, and ultimately determines the functions that the FPGA can achieve.


III. FPGA Pros & Cons

 - The Pros of FPGAs:

(1) FPGAs consist of hardware resources such as logic cells, RAM, multipliers, etc. By organizing these hardware resources rationally, hardware circuits such as multipliers, registers, address generators, etc. can be implemented.

(2) FPGAs can be designed by using block diagrams or Verilog HDL, from simple gate circuits to FIR or FFT circuits.

(3) FPGAs can be infinitely reprogrammed, loading a new design solution in a few hundred milliseconds, reducing hardware overhead with reconfiguration.

(4) The operating frequency of the FPGA is determined by the FPGA chip as well as the design, and can be modified by modifying the design or replacing it with a faster chip to meet certain demanding requirements (of course, the operating frequency is not unlimited and can be increased, but is governed by current IC processes and other factors).

 

 - The Cons of FPGAs:

(1) All functions of FPGAs rely on hardware implementation and cannot implement operations such as branching conditional jumping.

(2) FPGAs can only implement fixed-point operations.

To conclude: FPGAs rely on hardware to implement all functions and can be compared to dedicated chips in terms of speed, but there is a big gap in design flexibility compared to general purpose processors.


IV. FPGA Chip Structure

Mainstream FPGA is still based on look up table technology, has far exceeded the basic performance of previous versions, and integrates common features (such as RAM, clock management and DSP). FPGA chips have seven main parts: programmable input/ output unit, basic programmable logic unit, complete clock management, embedded block RAM, rich wiring resources, embedded bottom functional unit and embedded special hardware module.

The functions of FPGA chip structure are as follows:

1. Programmable Input and Output Block

The programmable input/ output block is referred to as I/ O port. It is the interface part between the chip and the external circuit, which can drive and match the input/ output signals under different electrical characteristics. I/ O in FPGA is classified by group, and each group can support different I/ O standards independently. With the flexible configuration of the software, different electrical standards and I/ O physical characteristics can be met, the drive current can be adjusted, and the frequency of I/ O port of the and pull-up resistor and pull-down resistor can be changed, so that the frequency of the I/ O port can be higher and higher. Some high-end FPGA can support data rate up to 2Gbps through DDR register.

IOB Internal Structure Diagram

Fig 1. IOB Internal Structure Diagram

The external input signal can be read into the FPGA through the memory cell of the IOB module, or directly written into the inside of the FPGA. When the external input signal passes through the memory cell of the IOB module read into the inside of the FPGA, the requirement of hold time  can be reduced, which usually the windows default is 0.

In order to facilitate management and adapt to a variety of electrical standards, FPGA's IOB is divided into several banks, each bank interface standard is determined by its interface voltage VCCO, in addition, a bank can only have one VCCO, but each bank VCCO can be different. Only ports with the same electrical standard can be connected together, and the same VCCO voltage is the basic requirement of the interface standard.

2. Configurable Logic Block (CLB)

CLB is the basic logical unit within the FPGA. The actual number and characteristics of CLBs vary depending on the device, but each CLB contains a configurable switch matrix that consists of 4 or 6 inputs, some lectotype circuits (multiplexers, etc.) and flip-flops. The switch matrix is highly flexible and can be configured to work with combinational logic, shift registers, or RAM. In Xilinx's FPGA device, the CLB consists of multiple (usually 4 or 2) identical Slices and additional logic. Each CLB module be used to realize combinational logic and sequential logic, and it can also be configured as distributed RAM and distributed ROM.

Fig 2. CLB Structure Diagram

Slice is a basic logical unit defined by Xilinx. A Slice consists of two 4-input functions, carry logic, arithmetic logic, storage logic and function multiplexer. Arithmetic logic includes a  XORG and a MULTAND. XORG enables a Slice to implement the full operation of 2bit, and MULTAND improves the efficiency of multipliers. Carry logic consists of a dedicated carry signal and a function multiplexer for fast arithmetic addition and subtraction operations; 4-input functions generator is used to implement the 4-input LUT, distributed RAM or 16-bit shift register. Carry logic includes two fast carry chains to improve the processing speed of the CLB module.

Fig 3. Inputting Slice Structure Diagram

Fig 3. Inputting Slice Structure Diagram

3. Digital Clock Management (DCM)

Most of the industry's FPGA offer digital clock management. FPGA offers digital clock management and phase loop locking. Phase loop locking can provide accurate clock synthesis, reduce jitter and achieve filtering.

4. Block Random Access Memory (BRAM)

Most FPGAs have embedded block RAM, which greatly extends the applications and flexibility of the FPGA. The block RAM may be configured as a single-port RAM, a dual-port RAM, a content address memory (CAM), and a common storage structure such as a FIFO. CAM memory has a comparison logic in each of its internal memory cells, the data written into the CAM will be compared with each of the data in the interior, and the address of all data that is the same as the port data, so that there is a wide range of address switches in the route application. In addition to the block RAM, the LUT in the FPGA can be flexibly configured as a RAM, a ROM, and a FIFO. In practical application, that number of block RAM in the internal block of the chip is also an important factor in the chip selection.

The capacity of the monolithic RAM is 18k bits, that is, the bit width is 18 bits and the depth is 1024. It can change the bit width and depth according to the need, but two principles must be satisfied: firstly, the modified capacity (bit width depth) cannot be greater than 18k bits; Second, the maximum bit width cannot exceed 36 bits. Of course, it is possible to concatenate multiple blocks of RAM to form a larger RAM, which is limited only by the number of RAM blocks in the chip and is no longer constrained by the above two principles.

5. Wiring Source

All the parts are connected with wiring resources in the FPGA, and the length and process of the connection determine the driving ability and the transmission speed of the signal on the wire. There are abundant wiring resources in the FPGA chip, according to the process and length, width and distribution position, which are divided into 4 different categories. First is the global routing resource, which is used for the internal global clock and the global reset/ position routing. Second is the long line resource, which is used to complete the wiring of the high-speed signal and the second global clock signal between chip banks. Third is short-line resources, which are used to perform logical interconnection and cabling between basic logical units. Fourth is a distributed wiring resource, which is used as control signal lines for a proprietary clock or a reset.

In practice, the designer does not need to select the routing resources directly, and the layout scheduler can automatically select the better routing resources according to the topology of the input logical grid table and constraint conditions to connect each module unit. In essence, the use of routing resource types has a close and direct relationship with the results of the design.

6. Underlying Built-in Function 

The underlying built-in function mainly refers to a DLL (Delay Locked Loop), a PLL (Phase Locked Loop), a DSP, and a CPU, which belong to core softcore. The more and more built-in functional units make the single-chip FPGA a system-level design tool, so that it has the capability of joint design of hardware and software, and gradually turn to the SOC platform.

DLL and PLL have similar functions, such as high-precision clock and low jitter frequency doubling and frequency division, duty cycle adjustment and phase shift, etc. Xilinx integrated the DLL, Altera made the PLL, Lattice combined both two, which can be easily managed and configured through IP core-generated tools on Lattice's new chip. 

Typical DLL module schematics

Fig 4. Typical DLL module schematics

7. Special Built-in Hard Core

The embedded special hard core is relative to the soft core embedded in the bottom, which means that the hard core with strong processing ability of FPGA is equivalent to the ASIC. To improve FPGA performance, chip manufacturers integrate some dedicated hard cores on the chip. For example, to improve the multiplication speed of FPGA, special multipliers are integrated in the mainstream FPGA, and in order to match the communication bus and interface standard, a lot of high-end FPGA are integrated SERDES, which can achieve the receiving and dispatching speed of  Gbps.

 


V. FPGA Features

1) The ASIC circuit is designed by adopting the FPGA, and the user does not need to put the chip into production, so that a shared chip can be obtained.

2) FPGA can be used as a trial sample of other fully customized or semi-custom ASIC circuits.

3) There are rich flip-flops and I/ O pins within the FPGA.

4) FPGA is one of the devices with the shortest design cycle, the lowest development cost and the least risk among ASIC circuits.

5) FPGA adopts high-speed CMOS process, low power consumption, and can be compatible with CMOS and TTL.

It can be said that FPGA chip is one of the best choices for small batch system to improve system integration and reliability.

The working state of FPGA is set by the program stored in the on-chip RAM, so it is necessary to program the on-chip RAM when working. Users can use different programming methods according to different configuration modes.

When the power is on, the FPGA chip reads the data from the EPROM into the on-chip programming RAM. After the configuration is completed, the FPGA enters the working state. After power off, FPGA internal logic disappears. Therefore, FPGA can be programmed repeatedly. And the programming of FPGA does not require a special programmer, a general-purpose EPROM or PROM programmer can meet the requirement. When you need to modify the FPGA functionality, just replace a piece of EPROM. In this way, the same piece of FPGA, with different programming data, can produce different circuit functions. Therefore, the use of FPGA is very flexible.


FAQ

 

1. What is FPGA and why it is used?

FPGA Basics: Architecture, Applications and Uses. The field-programmable gate array (FPGA) is an integrated circuit that consists of internal hardware blocks with user-programmable interconnects to customize operation for a specific application.

2. Is FPGA faster than CPU?

They also found that using custom FPGAs to implement the Rowhammer exploit would cause far more of the "bit flips" that they wanted to see. A FPGA can hit the data cell faster and more often than a CPU can do it meaning the FPGA causes more results to occur during an attack. It all goes faster when an FPGA is used.

3. Are FPGAs dead?

Yes, it's a dead end. If you enjoy creating hardware, RTL design targeting FPGAs is still a good choice (although there is a huge amount of effort here to make it more like creating software than hardware).

4. What are FPGAs good for?

FPGAs are particularly useful for prototyping application-specific integrated circuits (ASICs) or processors. An FPGA can be reprogrammed until the ASIC or processor design is final and bug-free and the actual manufacturing of the final ASIC begins. Intel itself uses FPGAs to prototype new chips.

5. Is FPGA a microprocessor?

Microprocessors are more complex than FPGAs. Microprocessors have fixed instructions while FPGAs don't. FPGAs and microprocessors are often mixed into a single package.

6. What are the advantages of FPGA?

FPGA advantages:

Long-term availability.

Updating and adaptation at the customer.

Very short time-to-market.

Fast and efficient systems.

Acceleration of software.

Real-time applications.

Massively parallel data processing.

7. Why is FPGA slow?

FPGAs tend to get faster in max speed, but the limit actually has to do with process variation affecting static timing. The chips have to have a soultion that works on all of them. So you lose performance of the device to make sure any device will work with it. And as your design gets bigger it runs slower.

8. What are the disadvantages of FPGA?

Drawbacks or disadvantages of FPGA:

The programming is not as simple as C programming used in processor based hardware. Moreover engineers need to learn use of simulation tools. ➨The power consumption is more and programmers do not have any control on power optimization in FPGA. No such issues in ASIC.

9. Can FPGA replace CPU?

There will always be a need for a general purpose CPU to run most things, and while you can implement a CPU on an FPGA, that gives you the worst of both worlds - no improvement from specialised hardware design, and you still need to pay the “FPGA tax”. So no, FPGAs will never replace CPUs.

10. Why use an FPGA vs microcontroller?

A FPGA can be used if the design requires complex logic and requires high processing ability and if the cost is comparable to the performance achieved. In case of a design that requires limited hardware, and is set to perform only some specific functions, then Microcontroller is preferred.

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