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ADRV9026BBCZ Quad RF Transceiver: CAD Models, Datasheet, Features [FAQ]

  • Contents

Catalog

Description

CAD Models

Functional Diagram

Features

Applications

Datasheet

Specifications

Manufacturer

Using Warning

FAQ

Description

The ADRV9026 is a highly integrated, radio frequency (RF) agile transceiver offering four independently controlled transmitters, dedicated observation receiver inputs for monitoring each transmitter channel, four independently controlled receivers, integrated synthesizers, and digital signal processing functions providing a complete transceiver solution. The device provides the performance demanded by cellular infrastructure applications,such as small cell base station radios, macro 3G/4G/5G systems, and massive multiple in/multiple out (MIMO) base stations.

 

The receiver subsystem consists of four independent, wide bandwidth, direct conversion receivers with wide dynamic range. The four independent transmitters use a direct conversion modulator resulting in low noise operation with low power consumption. The device also includes two wide bandwidth, time shared, observation path receivers with two inputs each for monitoring transmitter outputs.

 

The complete transceiver subsystem includes automatic and manual attenuation control, dc offset correction, quadrature error correction (QEC), and digital filtering, eliminating the need for these functions in the digital baseband. Other auxiliary functions such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and general-purpose input/outputs (GPIOs) that provide an array of digital control options are also integrated.

 

To achieve a high level of RF performance, the transceiver includes five fully integrated phase-locked loops (PLLs). Two PLLs provide low noise and low power fractional-N RF synthesis for the transmitter and receiver signal paths. A third fully integrated PLL supports an independent local oscillator (LO) mode for the observation receiver. The fourth PLL generates the clocks needed for the converters and digital circuits, and a fifth PLL provides the clock for the serial data interface.

 

A multichip synchronization mechanism synchronizes the phase of all LOs and baseband clocks between multiple ADRV9026 chips. All voltage controlled oscillators (VCOs) and loop filter components are integrated and adjustable through the digital control interface.

 

The serial data interface consists of four serializer lanes and four deserializer lanes. The interface supports both the JESD204B and JESD204C standards, operating at data rates up to 24.33 Gbps. The interface also supports interleaved mode for lower bandwidths, thus reducing the number of high speed data interface lanes to one. Both fixed and floating-point data formats are supported. The floating-point format allows internal automatic gain control (AGC) to be invisible to the demodulator device.

 

The ADRV9026 is powered directly from 1.0 V, 1.3 V, and 1.8 V regulators and is controlled via a standard serial peripheral interface (SPI) serial port. Comprehensive powerdown modes are included to minimize power consumption in normal use. The ADRV9026 is packaged in a 14 mm × 14 mm, 289-ball chip scale ball grid array (CSP_BGA).

 

CAD Models

ADRV9026BBCZ-PCB-Footprint

 

Figure: Footprint

 

ADRV9026BBCZ-3D-Model

 

Figure: 3D Model

 

Functional Diagram

ADRV9026BBCZ6-Functional-Diagram

 

Figure: Functional Diagram

 

Features

  • 4 differential transmitters
  • 4 differential receivers
  • 2 observation receivers with 2 inputs each
  • Center frequency: 75 MHz to 6000 MHz
  • Maximum receiver bandwidth: 200 MHz
  • Maximum transmitter large signal bandwidth: 200 MHz
  • Maximum transmitter synthesis bandwidth: 450 MHz
  • Maximum observation receiver bandwidth: 450 MHz
  • Fully integrated independent fractional-N radio frequency synthesizers
  • Fully integrated clock synthesizer
  • Multichip phase synchronization for all local oscillators and baseband clocks
  • Support for TDD and FDD applications
  • 24.33 Gbps JESD204B/JESD204C digital interface

 

Applications

3G/4G/5G TDD and FDD massive MIMO, macro and small cell base stations

 

Datasheet

You can download the datasheet from the link given below:

ADRV9026BBCZ-Datasheet

 

Specification

Electrical characteristics at ambient temperature range. Power supplies are as follows: VDDA_1P8 = 1.8 V, VIF = 1.8 V, VDDA_1P3 = 1.3 V, VDDA_1P0 = 1.0 V, and VDIG_1P0 = 1.0 V. VDDA_1P8 represents VCONV1_1P8, VCONV2_1P8, VANA1_1P8, VANA2_1P8, VANA3_1P8, VANA4_1P8, and VJVCO_1P8. VDDA_1P3 represents VANA1_1P3, VANA2_1P3, VCONV1_1P3, VCONV2_1P3, VRFVCO1_1P3, VRFVCO2_1P3, VAUXVCO_1P3, VCLKVCO_1P3, VRFSYN1_1P3, VRFSYN2_1P3, VCLKSYN_1P3, VAUXSYN_1P3, VRXLO_1P3, and VTXLO_1P3. VDDA_1P0 represents VJSYN_1P0, VDES_1P0, VTT_DES, and VSER_1P0. All RF specifications are based on measurements that include printed circuit board (PCB) and matching circuit losses, unless otherwise noted.

 

Device configuration profile: Receiver = 200 MHz bandwidth, I/Q rate = 245.76 MHz, transmitter = 200 MHz large signal bandwidth plus 450 MHz synthesis bandwidth, I/Q rate = 491.52 MHz, observation receiver (ORX) = 450 MHz bandwidth, I/Q rate = 491.52 MHz, device clock = 245.76 MHz, unless otherwise noted. Characterization at 75 MHz followed this profile: Receiver = 62.5 MHz bandwidth, I/Q rate = 76.8 MHz, transmitter = 62.5 MHz large signal bandwidth plus 141 MHz synthesis bandwidth, I/Q rate = 153.6 MHz, observation receiver = 141 MHz bandwidth, I/Q rate = 153.6 MHz, device clock = 153.6 MHz.

 

Product Attributes

Source Content uid: ADRV9026BBCZ
Manufacturer Part Number: ADRV9026BBCZ
Brand Name: Analog Devices Inc
Rohs Code:  Yes
Part Life Cycle Code: Active
Package Description: LFBGA, BGA289,17X17,32
Pin Count: 289
Manufacturer Package Code: BC-289-6
Reach Compliance Code: compliant
ECCN Code: 5A991.B
HTS Code: 8542.39.00.01
Manufacturer: Analog Devices Inc
Risk Rank: 2.35
Additional Feature: ALSO OPERATES IN 1.3V AND 1.8V NOMINAL VOLTAGE
JESD-30 Code: S-PBGA-B289
Length: 14 mm
Number of Functions: 4
Number of Terminals: 289
Operating Temperature-Max: 110 °C
Operating Temperature-Min: -40 °C
Package Body Material: PLASTIC/EPOXY
Package Code: LFBGA
Package Equivalence Code: BGA289,17X17,32
Package Shape: SQUARE
Package Style: GRID ARRAY, LOW PROFILE, FINE PITCH
Seated Height-Max: 1.46 mm
Supply Voltage-Nom: 1 V
Surface Mount: YES
Telecom IC Type: TELECOM CIRCUIT
Temperature Grade: INDUSTRIAL
Terminal Form: BALL
Terminal Pitch: 0.8 mm
Terminal Position: BOTTOM
Width: 14 mm

 

Manufacturer

Analog Devices, Inc. (ADI), also known simply as Analog, is an American multinational semiconductor company specializing in data conversion, signal processing and power management technology, headquartered in Wilmington, Massachusetts.

 

Using Warning

Note: Please check their parameters and pin configuration before replacing them in your circuit.

 

FAQ

What is the function of RF transceiver?

RF Transceiver is used to convert IF frequency to RF frequency and vice versa. It is used in satellite communication, for radio transmission and reception,for television signal transmission and reception, and in wimax/wlan/zigbee/lte networks.

 

What is the purpose of a transceiver?

The transceiver is an important part of a fiber optics network and is used to convert electrical signals to optical (light) signals and optical signals to electrical signals. It can be plugged into or embedded into another device within a data network that can send and receive a signal.

 

What is a transceiver device?

A transceiver is a combination transmitter/receiver in a single package. While the term typically applies to wireless communications devices, it can also be used for transmitter/receiver devices in cable or optical fiber systems.

 

ADRV9026BBCZ Documents & Media

Download datasheets and manufacturer documentation for Analog Devices Inc. ADRV9026BBCZ.
Datasheets
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ADRV9026BBCZ PCB Symbol, Footprint & 3D Model

Analog Devices Inc. ADRV9026BBCZ

Analog Devices Inc.

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