The Kynix Blog - Memory

IntroductionWith the rapid development of the current mobile storage technology and the rapid expansion of the mobile storage market, the amount of FLASH memory is growing rapidly. FLASH chips are very suitable for mobile products due to their advantages of portability, reliability and low cost. The market demand has spawned a large number of FLASH chip research and development, production and application companies. In order to ensure the long-term reliable operation of the chip, these companies need to test the FLASH memory at high speed and meticulously before the product to the market. Therefore, it is very necessary to have the high-efficiency FLASH memory test.What Is Flash Memory?CatalogIntroductionⅠ FLASH Memory TestⅡ FLASH Structural FeaturesⅢ FLASH Test Method3.1 System Connection3.2 Test Implementation Method3.3 Comprehensive Use of Test Methods and Flow Test3.4 Experimental ResultⅣ ConclusionⅤ FAQⅠ FLASH Memory TestNo matter what type of electronic memory is tested, it is not easy. It cannot be concluded by testing each storage unit in the memory in turn, because the change of each storage unit may affect other units in the memory. This correlation creates a huge testing work. In addition, FLASH memory has its own characteristics. It can only write the data in the storage unit from "1" to "0", but not from "0" to "1". If you want to achieve "0" -> " 1" , only the data of the entire sector or the entire memory can be erased, and which takes a lot of time. FLASH memory has other characteristics, such as slow read and write speed, write status word before writing data, many FLASH are only suitable for sequential read and write but not suitable for jump operations, etc. Here these characteristics restrict the test of FLASH memory.In order to solve these problems in FLASH testing, people have proposed using built-in self-testing or using embedded software and other testing methods to test related performance, which have achieved good results, but most of these methods are not suitable for product testing. However, most of the algorithms that are very effective for general-purpose memory testing are difficult to directly apply to FLASH testing due to the limitations of the FLASH device itself (for example, it cannot be directly written from "0" to "1").After a brief introduction to the structure and characteristics of the FLASH chip, the principle of the FLASH memory test program is explained. On this basis, several common memory testing methods are analyzed and improved, so that they can be effectively used in FLASH testing. These methods are simple and efficient, have high fault incidence, and can be quickly pre-generated. Compared with some other test algorithms, they are more suitable for engineering testing in testers. This paper analyzes the main characteristics of these methods, and on this basis, introduces the flow applied in the actual FLASH memory test.Ⅱ FLASH Structural FeaturesThere are various types of FLASH memories, and the most commonly used ones are NOR type and NAND type FLASH. Usually, the NOR type is more suitable for storing program codes. Its random read and write speed is fast, but the capacity is generally small (for example, less than 32 MB), and the price is high; while the NAND-type has a capacity of more than 1GB, and the price is relatively cheap, suitable for storage, but generally can only read and write data in a whole block, and the RAM capability is poor. They do not use linear address mapping to access data, but serially take register operations.Generally speaking, no matter what type of FLASH, there is an ID register to read the memory information, and the specific type can be judged according to the chip data provided by the supplier. In addition, the erasing process of the FLASH memory is relatively time-consuming, and the erasing process is relatively complicated. Figure shows the general flow of FLASH chip erasing.FLASH Chip Erase FlowIt can be seen that the operation of erasing data limits the working speed of the FLASH chip. In addition, some other features, such as slow reading and writing speed, writing the status word before writing data, many FLASHs are equipped with redundant units, etc., which restrict the improvement of the test speed. Therefore, it is very necessary to design a reasonable method, or to test several pieces of FLASH together, and to apply the test algorithm to reduce the test time. Ⅲ FLASH Test Method3.1 System ConnectionThe chips selected in this article are AMD's NOR type FLASH - AM29LV400B and Samsung's NAND type FLASH K9F5608UOB, which can be directly connected to the digital channel of the digital circuit tester through a 44 PIN special adapter. The hardware experiment platform we use is the BC3192 digital-analog hybrid test system. This system can provide fast working speed and flexible algorithm graphics generation method, which is very suitable for testing needs.3.2 Test Implementation MethodAssuming that the number of memory cells that can be addressed by the memory is N, since the memory chip can only access one memory cell at a time, and each cell has only two states of "0" or "1", there are 2N possible states in total. Since the selected addresses are random, when the number of test steps is M, there may be as many combinations of address selection sequences, even with all "0" or all "1" pattern testing, which is a huge number.In order to effectively test the memory chip, the structure of the semiconductor memory must be analyzed, and several patterns that can effectively test the memory function must be determined and selected, so as to achieve the detection purpose and limit the test amount within the allowable range. However, in practical applications, because each test pattern has its limitations, and the characteristics of various manufacturers and various types of memories are not completely consistent, there is no optimal unified test method yet.According to the characteristics of FLASH chips, we mainly improve and use the following methods:🔺 Parity Pattern CheckParity pattern check method is a more suitable method for memory testing. In the parity pattern check method, the data pattern written to the memory cell matrix is determined according to the parity of the memory cell address code. If there are an even number of 1s in the row address code and column address code of a memory cell, and its parity is 0, write "0" (or "1") in the memory cell; if there are an odd number of 1s, its parity is 0, or it is 1, then write "1" (or "0") in the memory cell. In short, the signal data stored in the memory cell matrix will be the exclusive OR relationship between the row address code and the column address code.The process of FLASH parity graphics function detection is: first write the background graphics according to the algorithm, then read out bit by bit and check the correctness of the results, then erase the chip data, and repeat the above test process with the inverted graphics. The total number of test steps is M=4N.Since the parity pattern is asymmetric, the failure of any one-bit address decoder will cause repeated addressing of one of the two memory cells that should have written inverse data to each other, and the second addressing changes the first address. The content written during the secondary addressing, while the other memory location is not accessed. Therefore, the address parity pattern can well detect the failure of the address decoder.In addtion, the parity pattern writes the entire memory cell every time and then reads it out as a whole. There is no repeated erasing process (the whole process only needs to be erased twice), which is very suitable for FLASH chip testing.🔺 Step-by-Step MethodThe step-by-step method is a method in which each cell of the memory is checked in turn. First, starting from the first storage unit, each unit is inverted and checked one by one, and one scan is not completed until the end of the last unit detection. Then, in the case of reverse code, starting from the first storage unit, each unit is inverted and checked one by one, until the end of the last unit detection. The whole process is as if all the units are walking forward together, hence the name "step-by-step method". According to the characteristics of the FLASH chip, we change the process of walking under the background of the reverse code, and transform it as follows to form a suitable synchronizing algorithm.Before testing, each memory cell has information "1". First, write the background pattern in the storage matrix (the initial state is all "1"), then start from address A0 to read "1", write "0", read "0", and check the readout result. Then, repeat the operation (read "1", write "0", read "0") to the next address selection unit in turn, until all storage units (A=N-1) are repeated. Then in the read operation mode, perform a forward scan and read out on all the memory cells to check whether there is a problem of multiple writing in the forward and reverse directions. The memory input is then erased so that all cells are all "1"s. Then start the reverse scan: starting from the highest address AN-1, read "1", write "0", read "0", and perform the above operation process bit by bit until the final address is AN-1, and finally all memory cells having a read "0" scan is performed to verify the correctness of the readout.Testing the memory chips with this test algorithm allows each memory cell to be accessed. It can not only ensure that each memory cell can store "1" and "0" data, but also ensure that each memory cell is subject to reading "1", reading "0" and writing "1" and writing "0" from other surrounding cells of the interruption. The total number of test steps for this method is:In formula (3), W represents a write operation, R represents a read operation, Q represents "1", and represents "0". Bij represents the memory cell in the i-th row and j column of the memory. For example, WBij(Q) represents the time taken to write a "1" operation to the memory cell of the i-th row and j column. It can be seen from formula (3) that the total number of test steps is 9N, and the whole process only needs two erasing operations, which shows that it is a fast and effective method.🔺 Mobile Reverse MethodIt is a method of inverting the data of each address storage unit in sequence. It needs to read the data of each storage unit before and after the inversion, and it must also generate address jumps by means of the forward and backward address addressing sequence, and the address changes in increments of 20, 21..., 2n-1 power ( n is the number of address bits). After the address jump is performed according to the above rules, three operations are performed on each address: read-write-read is a cycle.The purpose of the above operation is mainly to generate effective mutual interference between addresses, but obviously, if the above operation is performed with the entire chip as a unit, data needs to be erased multiple times, so the FLASH test chip should be improved in this way: the operation is completed in units of sectors. Assuming that the FLASH chip has N sectors, the function test of the mobile inversion method must first write all memory cells with "1" as the background pattern. First, in the first sector, read and verify that the A0 storage unit is "1", then rewrite the storage unit to "0", and finally read the information of the storage unit to prove the newly written "0" still exists in this storage unit. The test address of the first sector is incremented by the order of 20 valid bits, and the above operation process of reading "1", writing "0" and reading "0" must be repeated for each storage unit, and the test step size is 3n (n is the number of storage units in the sector) can make all storage units become "0". The address sequence of this test is incremented by 1, that is, from the lowest address bit A0 to the highest bit A (n-1), read "1", write "0" and read " 0" to verify.For the second sector, the next address level 21 is used as the change amount of the address increment, and different address bits are used as the lowest bit each time (the 0th bit and the 1st bit respectively), so that the address changes by this increment. through all possible addresses. Therefore, in a test program, all memory cells of addresses are tested once. Then, take 22, 24...2N as the address increment in turn, repeat the above process, and generate a new cyclic carry every time a cycle is completed.Because the size of each sector is different, the step size of the test pattern of the mobile reverse method is 3n (n is the maximum number of storage units in the sector). The sector-based test is actually a random test of the chip function, because it does not repeatedly disturb the access data of each unit to verify the influence of signal changes between its address lines, but this in the method, the adjacent address lines are tested one by one in each sector. Since the structure of each sector is basically the same, this sampling test is very representative, and the test time is reduced by an order of magnitude.The method test pattern is a good compromise test scheme. Because it has almost the best characteristics of various test patterns, it can test the disturbance interaction between as many memory cells as possible with fewer test steps. In the specific procedure, the "1" field is reversed to the "0" field, which is generated by selecting addresses in sequence and writing these addresses, and there is a write operation between the two reads. The mobile inversion test includes functional test and dynamic test. The former test ensures that the memory cell under test is not affected by reading and writing other memory cells, while the latter test predicts the fetch time under the worst and best conditions, and predicts the impact to the address transition on these times.This test method is easy to implement. It is based on the skipping algorithm and reduces the complexity of the algorithm by changing the length of the skipping step. The mobile inverse method test is a test pattern with good functional test and dynamic test characteristics, and it requires a short test time and has good results in many cases. This method is especially effective for testing larger-capacity memories.The method can also be further expanded, that is, the data is processed by mobile inversion. Taking the chip as a 32-bit bus as an example, first write 0xAAAAAAAA to each unit of the memory, verify and erase, then write 0xCCCCCCCC to the memory, verify and erase, and then write 0xF0F0F0F0, 0x0F0F0F0F, 0xFF00FF00, 0x00FF00FF, 0xFFFF0000, 0x0000FFFF, 0xFFFFFFFF, and 0x0 in sequence, finally erase the data after verifying the correctness of the writing. The principle is the same as that of address movement inversion, which is not repeated here.3.3 Comprehensive Use of Test Methods and Flow TestIn the above, the testability of the FLASH chip is improved from the point of view of the algorithm. Although the NOR and NAND FLASH structures are different, the above algorithms can be used to test the above two types of devices because the above algorithms can be calculated to generate test patterns in sequence.The above three methods have their own advantages and can be used together in practical applications. The address parity pattern test is the most convenient and efficient, because only one address line is changed each time in the process of writing the pattern, and the opposite data is written, so if any address line is short-circuited, it will be checked immediately. This method is most suitable for checking the failure of the address decoder. The step-by-step method is suitable for checking the failure of multiple address selections and decoders, and can detect the influence of noise on the characteristics of memory chips during writing. It can ensure correct address decoding and the storage of "1" and "0" in each memory cell. In most production tests, the combination of these two methods can identify the vast majority of FLASH failures.Of course, the chips produced by various manufacturers have certain differences in structure and process, so the probability of various errors is also different, and the method can be adjusted according to the actual situation. Due to design problems, some chips may have other less common errors, which require more detailed testing. In this case, it is more appropriate to use the mobile reverse test method. This method can well test the dynamic error of the chip, and can expand the test in detail or simplify the test according to specific needs, which is very effective for product performance analysis.In the specific program design, in order to simplify the execution of the algorithm, the statement of reading the product model and calling the read and write commands can be stored in the tester as a subroutine, which can be seamlessly called every time it is needed.In the testing process, the most time-consuming operation is the program erasing operation, which often takes several seconds at a time. The solution is to deal with the erasing process separately. In a practical application, two testers can be used, where several chips run in parallel while erasing. In this way, one device is used for reading, writing, and testing, and the other device is used for erasing data, which can effectively form a pipeline operation and greatly save test time. In addition, combining several methods can also help improve fault coverage.3.4 Experimental ResultAccording to the above thought, on the test system platform of BC3192, both AMD's NOR-type FLASH AM29LV400B and Samsung's NAND-type FLASH 9F5608UOB have been tested. Experiments show that, compared with the traditional checkerboard-based test pattern, the parity method, the step-by-step method and the reverse method generate higher fault coverage of the test pattern. These algorithms have only two chip erase operations at most. Therefore, the test time can fully meet the needs of engineering testing. Among them, the mobile reverse method has no erase operation, so the test speed is the fastest. In the experiment, we use any one of the above three methods to test according to the method of running water. Under the same fault coverage, the test efficiency can be improved by more than 40%. Ⅳ ConclusionThis paper is an attempt to test FLASH on the basis of traditional memory test theory. This method retains the advantages of traditional methods and better solves the difficulty of FLASH memory test. The method is convenient and quick, the process is simple, and all test patterns can be generated in advance, so that they can be directly loaded into the tester, which is beneficial to be directly applied to the tester for production testing. Ⅴ FAQ1. Does flash memory have a large capacity?We should also point out that flash drives rarely actually have the full amount of space available. This is because each flash drive requires some storage capacity to run the device's firmware. For a smaller 1 gigabyte flash drive, you can expect the firmware to take up around 72 megabytes of space.2. Is flash memory RAM or ROM?Is Flash memory a RAM or ROM? RAM is Read-Only Memory. Unlike RAM, ROM is persistent storage. ... Flash Memory is one category of ROM i.e Electrically Erasable Read Only Memory (EEPROM).3. What is flash based storage?Flash storage is a data storage technology based on high-speed, electrically programmable memory. The speed of flash storage is how got its name: It writes data and performs random I/O operations in a flash. Flash storage uses a type of nonvolatile memory called flash memory.4. What NAND means?What does NAND stand for? Surprisingly, NAND is not an acronym. Instead, the term is short for "NOT AND," a boolean operator and logic gate. The NAND operator produces a FALSE value only if both values of its two inputs are TRUE.5. What is flash memory examples?Portable devices such as digital cameras, smartphones, and MP3 players normally use flash memory. USB drives (also called thumb drives and flash drives) and memory cards use flash memory to store data.6. How many types of flash are there?There are two main types of flash memory – NAND and NOR. NAND flash memory is usually used for general-purpose data storage and transfer, whereas NOR flash memory is typically used for storing digital configuration data. NAND is the most common type and is found in devices such as USB drives and SD cards.7. Can a flash drive be erased and reused?Erasing the USB drive deletes both partitions and data. After data wiping, there is only unallocated space on your USB drive. To reuse the USB flash drive, format and create a new volume again with EaseUS partition management software easily.8. Why does flash memory wear out?NAND flash memory is susceptible to wear due to repeated program and erase cycles that are commonly done in data storage applications and systems using Flash Translation Layer (FTL). Constantly programming and erasing to the same memory location eventually wears that portion of memory out and makes it invalid.9. Are flash drives good for long term storage?Memory cards and USB drives are NOT designed for long term storage. You should always backup your data on to another device. The data will normally stay valid for a period of up to 10 years if stored under normal conditions. The data cells inside carry a charge which can dissipate over time.10. Why is flash memory used?Flash memory is a long-life and non-volatile storage chip that is widely used in embedded systems. It can keep stored data and information even when the power is off. It can be electrically erased and reprogrammed. Flash memory was developed from EEPROM (electronically erasable programmable read-only memory).11. What is flash storage device?Flash storage definedFlash storage is a solid-state technology that uses flash memory chips for writing and storing data. Solutions range from USB drives to enterprise-level arrays. Flash storage can achieve very fast response times (microsecond latency), compared to hard drives with moving components.12. What are the advantages and problems with using flash memory?Flash memory posses high transferring speeds. Compared to a traditional hard disk drive, flash memory does read/write function at a fast rate. However the factors latency and IOPs are considered, Solid State Drives still tops in terms of performance. Flash memory does not contain any moving parts.13. How long will flash drives last?eHow says flash drives can last up to ten years, but as mentioned on NYTimes.com, flash memory doesn't usually degrade because of its age, but rather because of the number of write cycles, which means the more you delete and write new information, the more quickly the memory in the device will start to degrade.14. Can you erase and reuse a flash drive?Erasing the USB drive deletes both partitions and data. After data wiping, there is only unallocated space on your USB drive. To reuse the USB flash drive, format and create a new volume again with EaseUS partition management software easily.15. How do I check the health of my flash drive?In Command Prompt window, you can type the command chkdsk *: /f, and hit Enter key on the keyboard. Replace “*” with the actual drive letter of the target drive. The CHKDSK tool will start checking the hard drive or USB health, namely, it will scan and fix detected errors in the external hard drive or USB.16. What happens when you delete a file from a USB flash drive?Where do deleted files from USB go? Since the USB flash drive or pen drive is an external device, files deleted on the USB flash drive are deleted permanently instead of going to the recycle bin, so you cannot perform recycle bin recovery to recover files from USB.

In this article, you will learn what is AVR microcontroller, what are its features, how to choose a suitable AVR microcontroller, and how to program AVR microcontroller in software and so on. Catalog I. What is a AVR Microcontroller? II. AVR Microcontroller Features III. Selection of AVR Series Single-chip Microcomputer IV. AVR Microcontroller Application Field V. Introduction to the experimental tools and equipment used in AVR VI. AVR Microcontroller Programming Software FAQ I. What is AVR Microcontroller? AVR microcontroller is an enhanced 8-bit and built-in Flash RISC order set developed by ATMEL. Compared with CISC, RISC is not just to reduce the command simply, but make the structure of the computer more simple and reasonable to improve the speed of the operation. The design absorbs the advantages of the 8051 and PIC microcontroller and has the ability to execute one instruction in a single clock cycle. The speed can reach 1Mips/MHz. AVR microcontrollers are widely used in the outside devices of the computers, industrial real-time control, instrumentation, communication equipment, home appliances, and other fields. This vedio shows you how to build your own AVR development board and how to use it in your projects. The hardware structure of AVR adopts a compromise strategy of 8-bit and 16-bit computer, that is, the local register memory stack (32 register files) and the single high-speed input/output scheme (i.e. input capture register, the output compares matching registers and corresponding control logic) are adopted, improving the execution speed of instruction, overcoming the bottleneck phenomenon, and enhancing the function. At the same time, it reduces the cost of external equipment management, simplifies the hardware structure, and reduces the cost. Therefore, the AVR microcontroller is a high-performance-price single-chip microcomputer, which has achieved an optimized balance in hardware/software development, speed, performance, and cost. The introduction of the AVR microcontroller breaks this old design pattern completely, abolishes the machine cycle, and gives up the complex instruction computer (CISC) to pursue the instruction complete method; Reducing instruction set, taking words as the unit of instruction length, arranging the rich operands and opcodes in one word (the majority of single-cycle instructions in the order set are the same), and the reference period is short and the instruction can be prefetched, realizing flow operation, so you can execute instructions at high speed. Of course, high reliability must be required. II. AVR Microcontroller Features 1. High-quality embedded Flash program memory, can be repeatedly written and erased, supporting ISP and IAP, which is easy to have product debugging, development, production, update. Long service-life EEPROM, can save key data for a long time and avoid power loss. High-capacity RAM in chips supports the development of system programs in high-level languages. 2. High speed, low power consumption, with SLEEP (power saving when sleeping) function. Each instruction can be executed at 50ns/ 20MHz, while power consumption is between l~2.5mA (typical power consumption, when WDT turned off, is 100nA), AVR (with prefetching instruction function) based on Harvard structure concept. That is, there are different memories and buses for program storage and data, when an instruction is executed, the next instruction is pre-removed from the program memory. This allows instructions to be executed within each clock cycle. The AVR microcontroller can operate at a wide voltage (2.7V~5V), has the strong anti-jamming ability, and reduces the general 8-bit computer software anti-interference design and hardware usage. 3. All the I/O lines of the AVR single-chip computer have an adjustable pull-up resistor. The input and output characteristics of parallel I/O port are similar to those of PIC's HI/LOW output and three-state high impedance H1-Z input, also be set similar to the 8051 series of internal high resistance as input function. It can be set as an input/output or can be set as high resistance input initially. So that I/O resources are flexible, powerful, and fully utilized. AVR's I/ O can accurately reflect the input/output of I/O. 4. AVR microcontroller has a variety of independent clock dividers for URAT, IIC, SPI. The Prescaler with up to 10 bits when matching with the 8 / 16-bit timer, can set the frequency division coefficient through software to provide a variety of timing times. The timer/counter (single) in the AVR microcontroller can be counted bidirectionally to form a triangle wave, then matched with the output comparison matching register, the output PWM of pulse width modulation with variable duty cycle, variable frequency, and variable phase square wave is generated. 5. For industrial products, with high current (irrigation current) lO=20mA~40mA (single output), can directly drive SSR or the relay. The built-in watchdog timer (WDT) is used to avoid the faulty program and improve the anti-interference ability of the product. 6. Superfunctional streamlined instruction. There are 32 general working registers (equivalent to 32 accumulators in 8051 single-chip computers), which overcomes the data processing problems caused by the single accumulator. 7. AVR microcontroller has analog comparator, I/O port can be used for A/D conversion, can form cheap A/D converter. 8. Byte-oriented high-speed hardware serial interface TWI and SPI. TWI is compatible with the I2C interface, with ACK signal hardware transmission and recognition, address recognition, bus arbitration, and other functions, It can realize all four kinds of multi-machine communication from one to another. SPI has the same function. It also looks like the 8051, AVR has multiple fixed interrupt vector entry addresses, so it can respond to interrupts quickly, and it will interrupt like PIC at the same vector address. 9. AVR microcontroller has an automatic power-up reset circuit, an independent watchdog circuit, low voltage detection circuit BOD, multiple reset sources (automatic up and down reset, external reset, watchdog reset, BOD reset). It can set up a delay operation program after running the system, enhancing the reliability of the system. And meanwhile, the AVR microcomputer has many power-saving sleep modes, wide voltage operation(2.7V-5V), strong anti-interference ability. So it is used widely in the electrical industry due to its advantages. 10. Enhanced high-speed synchronous/asynchronous serial port has the functions of generating checking code based on hardware, hardware detecting and debugging, two-stage receiving buffering, baud rate automatically adjusting position (when receiving), shielding data frame, and so on. They improve the reliability of communication and help write the program easily. It also makes up the distributed network and to realize the complex application of multi-computer communication system.  The function of the serial port is much more than the serial port of the MCS-51/96 microcontroller. In addition, the AVR single-chip microcomputer has a high-speed operation, and the interrupt service time is short, therefore, high baud rate communication can be realized. Serial asynchronous communication UART does not occupy timer and SPI transmission function, because of its high speed, it can work in a standard integer frequency, while baud rate can reach 576Ko11, with multi-channel 10-bit AID converter and real-time clock RTC. III. Selection of AVR Series Single-chip Microcomputer AVR microcontroller technology embodies a variety of devices (including FLASH program memory, watchdog, EEPROM, synchronous/asynchronous serial port, TWI/ SPI/ AID/ A/D converter, timer, counter, etc.) and various functions (enhanced reliability of reset system, reduced power-consumption and anti-interference sleep mode, various interrupt systems, timer/counter with input capture and match output, replaceable I/O port. It fully reflects the modern single-chip technology develops into the "on-chip" SoC system. AVR series microcontroller is complete, can be applied to different occasions. In order to make good use of it, it is necessary to know its classification based on different standards and functions. And here are introducing three grades and their models as examples. AVR microcontroller has three grades: Low-grade Tiny series: this type of microcontroller has Less memory, small in size, apt only for simpler applications, the applying model like Tiny11/12/13/15/26/28, etc.; Midrange-grade AT90S series: this microcontroller is used commercially for compound applications, it requires large program memory and also high speed, such as AT90S1200/2313/8515/8535, etc.; High-grade ATmega:  this type of microcontroller is the most popular one which has a good amount of memory up to 256KB, higher built-in peripherals, and fit for modest to difficult applications, the applying model like the ATmega8/16/32/64/128 (storage capacity is 8/16/32/64/128KB) and ATmega8515/8535. AVR device pins range from 8 to 64, with a variety of packages available. IV. AVR Microcontroller Application Field Air conditioning control panel Printer control board(PRCB) Intelligent meter Intelligent flashlight LED control screen Medical equipment GPS  V. Experimental tools and equipment used in AVR IC-CAVR6.31AC Language Compiler Integrated Development Environment(ATMEL AVR Studio) PonyProg2000 Download Software AVR Microcontroller Integrated Test Board AVR-JTAG Simulator Parallel Port Loader High Stability Power Supply Multifunctional TOP2004 USB Programmer PC VI. AVR Microcontroller Programming Software ICCAVR6.31AC Language Compiler ICCAVR6.31A is a C programming language compiler developed by ImageCraft for AVR MCU. It is a pure 32-bit with an integrated development environment, also consists of an editor and project manager. ICCAVR has been widely used because of its powerful function, simple operation, good technical support, and reasonable price. The following figure is the working interface of ICCAVR. AVRStudio Integrated Development Environment AVRStudio is an integrated development environment that integrates project management, program assembly, program debugging, program download, JTAG simulation, and so on. However, AVRStudio does not support the C programming language. Therefore, when we develop an AVR microcontroller with the C programming language, we should first compile the C programming language with ICCAVR, then open the compiled code file with AVRStudio to debug the program. The following figure is the workspace of SVRAStudio. PonyProg2000 software  It is mainly used for AVR MCU and PIC MCU program download, can be used in Windows95/98/ME/NT/20001XP operating systems. The following figure is the working interface of PonyProg2000. Attention Write with PORTx, read with PINx During the experiment, try not to connect the pin directly to the GND/VCC. When it is not set properly, the I/O port will output/fill the high current of 80mA (Vcc=5V), resulting in device damage. As Input 1.The suspension (high resistance state) will be susceptible to interference if the internal pull-up resistor is usually allowed(generally, it seems that 51 has a strong anti-interference ability because 51 always has internal resistance to pull up). 2.Try not to let input suspended or analog input level close to VCC/2, because it will consume too much current, especially in low power applications of CMOS circuits. 3.The pin level provided by the reading software usually requires a clock cycle interval between the assignment instruction “out” and the read instruction “in”, such as the nop order. 4.The input of the functional module (interrupt, timer) can be triggered by a low level, also it can be the rising edge trigger or the falling edge trigger. 5.For high-resistance analog signal input, remember not to allow internal pull-up resistor to affect accuracy, such as ADC digital-analog converter input, analog comparator input, and so on. As Output Taking the necessary current limiting measures, for example, drive the LED to serialize the current-limiting resistor. Reset The internal pull-up resistor will be disabled when to reset. If strict level control is required in an application, such as motor control, it is necessary to use an external resistor to fix the level. Dormant As output, it is still in the same state Input is generally invalid, but the input function is valid if the second function is interrupted. For example, the wake-up function of an external interrupt FAQ 1. What is meant by AVR microcontroller? AVR is a family of microcontrollers developed since 1996 by Atmel, acquired by Microchip Technology in 2016. These are modified Harvard architecture 8-bit RISC single-chip microcontrollers. AVR was one of the first microcontroller families to use on-chip flash memory for program storage, as opposed to one-time programmable ROM, EPROM, or EEPROM used by other microcontrollers at the time. 2. How does AVR microcontroller work? AVR is an 8-bit microcontroller belonging to the family of Reduced Instruction Set Computer (RISC). In RISC architecture the instruction set of the computer are not only fewer in number but also simpler and faster in operation. ... The input/output registers available are of 8-bits. 3. What does AVR stand for in electronics? An automatic voltage regulator (AVR) is an electronic device that maintains a constant voltage level to electrical equipment on the same load. 4. What are the types of AVR? In general, there are two types of an Automatic Voltage Regulator. One is the Relay Type and the other is the Servo Motor type. A Relay type AVR makes use of electronic circuitry like relays and semi-conductors to regulate the voltage. 5. Is Arduino AVR or ARM? Arduino uses AVR- or ARM-based microcontrollers, depending on board. PIC is the oldest of the lot. There's no such thing as an “Arduino microcontroller”. 6. What is full form of AVR? The Full form of AVR is Aortic Valve Replacement. An AVR is a type of open heart surgery used to treat problems with the heart's aortic valve. 7. What happens if AVR fails? When AVR fails a protection called Field Failure protection will come into picture and trip the generator. ... If Failure of field is associated with under voltage which might happen due to severe fault near the generator and AVR might trip not able to maintain the voltage, the generator is tripped instantaneously. 8. What is AVR and ARM? ARM is a microprocessor or CPU architecture while AVR is a microcontroller. ARM can be used similar to a microcontroller when combined with ROM, RAM and other peripherals to a single chip like LPC2148. ... Microcontroller has build in RAM, ROM and other peripherals in a single chip. While microprocessor has only the CPU. 9. What are the applications of AVR and ARM? AVR and ARM comes under the family of micro-controller. But ARM can be used as both Microcontroller or as Microprocessor. ARM micro-controller and AVR micro-controller differs from each other in terms of different architecture and different sets of instruction, speed, cast, Memory, Power Consumption, Bus Width etc. 10. What is AVR microcontroller architecture? AVR is a 8-bit RISC architecture (Reduced Instruction Set Computing) microcontroller in market since 1996 which is having on-chip programmable flash memory, SRAM, IO data space & EEPROM. AVR is the first MCU in market which has on-chip flash storage. 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ROM and RAM belong to the semiconductor memory. ROM is the abbreviation of read only memory, and RAM is the abbreviation of random access memory. ROM can keep data when the system powers off, and RAM is in the opposite, a typical RAM is the computer memory. But sometimes we are not clear: what is the difference between Flash Memory and ROM and RAM? How much do you really know about memory, or RAM, ROM, and flash memory specifically? Here we will tell them in different aspects, this article will act as a guide to basic memories.   Catalog     I What are types of RAM?  1.1 Static RAM (SRAM)  1.2 Dynamic RAM (DRAM) II What are types of ROM? III What is Flash Memory?  3.1 Performance Comparison  3.2 Interface Difference  3.3 Capacity and Cost  3.4 Reliability and Durability  3.5 Simple Operation  3.6 Software Support IV Conclusion FAQ     I What are types of RAM? RAM Upgrade Guide - What You Need to Know 1.1 Static RAM (SRAM) SRAM is very fast and the fastest storage device to read and write currently, but it is also very expensive, so it is only used in demanding places, such as the first and second level buffer of CPU. 1.2 Dynamic RAM (DRAM) DRAM keeps data for a short time and its operation is slower than the SRAM, but it's still faster than the ROM. In addition, it's much cheaper than SRAM. The computer memory is DRAM. DRAM is divided into many kinds, the most common ones are FPRAM / FastPage, EDORAM, SDRAM, DDR, RAM, RDRAM, SGRAM, WRAM and so on. DDR RAM, one of which is introduced here. DDR RAM (Double-Date-Rate RAM), also known as DDR SDRAM, the improved RAM and SDRAM, are essentially the same, except that they can read and write data twice in one clock, doubling the speed of data transmission. This is the most used memory in a computer today, and it has a cost advantage, which in fact defeats another Intel memory~ Rambus DRAM. Many high-end graphics cards are also equipped with high-speed DDR RAM to increase bandwidth, which can greatly improve the pixel rendering capability of 3D accelerator cards.     II What are types of ROM? PROM (programmable ROM), is programmed once that can not be modified, this is an early product, now it is gone. EPROM (erasable and programmable ROM), is a kind of universal memory which erases the original program by ultraviolet radiation. EEPROM, is electronically erased, very expensive, long writing time. For example, mobile phone software is generally placed in the EEPROM, when we call, some of the last numbers that are dialed are temporarily in the SRAM, but not immediately written in the call log (the call record is stored in the EEPROM).   Memory is used to storage data and programs that are currently in use (that is in execution), and the memory of the computer we normally used refers to dynamic memory (that is DRAM). The so-called "dynamic" in dynamic memory refers to when we write data to the DRAM, after a period of time, the data will be lost, so we need an extra circuit to refresh the memory. It works like this: whether a DRAM's memory cell stores 0 or 1 depends on whether the capacitor has a charge. 1 represents a charge, 0 represents no charge. But over time, the capacitance of 1 will discharge, and the capacitance of 0 will absorb the charge, which is why the data is lost. Taking refresh operation regularly checks the capacitor, if the charge is greater than 1/2 of the full charge, it is considered to represent 1, charging the capacitor fully; If the quantity of electricity is less than 1/2, it is considered to represent 0, and the capacitor is discharged to maintain the continuity of the data. ROM III What is Flash Memory? Flash memory combines the advantages of ROM and RAM. It not only has the electrically erasable and programmable capability (EEPROM), but also can read data quickly without power loss (the advantage of NVRAM). This memory is used in USB  and MP3. For the past 20 years, embedded systems have been using ROM (EPROM) as their storage device. However, in recent years, FLASH has completely replaced the position of ROM (EPROM) in embedded systems to store Bootloader and operating systems, or Program code or directly as the hard disk (U disk). At present, there are two kinds of NOR Flash and NAND Flash. NOR Flash reading is the same as the common SDRAM reading. Users can run the code loaded in NOR FLASH directly, which reduces the capacity of the SRAM and saves cost. NAND Flash doesn’t have memory random read technique, which reads in the form of a block at a time, usually 512 bytes at a time, thus it is cheaper. Users cannot run program code on NAND directly, so many developers using NAND have to use a small NOR Flash to startup and run code. NOR Flash, is generally used in small capacity because of its fast reading speed, and it is used to store important information such as operating system. The most common NAND FLASH used for large capacity, combines with embedded system DOC (Disk On Chip) and common "flash disk", which can be erased online. At present, the FLASH on the market mainly comes from Intel, AMD, Fujitsu and Toshiba, and the main manufacturers of NAND Flash are Samsung and Toshiba. NOR and NAND are the two main non-volatile flash memory technologies in the market. Memory IC Intel first developed NOR flash technology in 1988, which completely changed the situation in which EPROM and EEPROM dominated the world. Then, in 1989, Toshiba published its NAND flash architecture, emphasizing lower cost per bit, higher performance, and easy upgrades via interfaces like disks. But after more than a decade, a considerable number of hardware engineers still can not distinguish between NOR and NAND flash memory. Flash memory is often used interchangeably with phase NOR memory. Many in the industry are also confused about the advantages of NAND flash over NOR, because in most cases flash memory is only used to store a small amount of code, and NOR flash memory may be more appropriate, while NAND is an ideal solution for data needed high storage density. NOR is the main non-volatile flash memory technology in the market. NOR is generally used to store a small amount of code, especially in code storage media. NOR is characterized by simple application, no special interface circuit, high transmission efficiency, it belongs to the in-chip execution(XIP, eXecute In Place), so that applications can run directly in (NOR) flash memory. No longer need to read the code into the system RAM. Low write and erase speed can be very cost-effective but affect its performance for small capacity when it is 1~4MB. NOR flash comes with an SRAM interface and has enough address pins to access, it is convenient to storage and use each byte. NOR flash accounts for the majority of the 1~16MB flash market. NAND structure can provide extremely high cell density and high storage density, and fast write and erase speed. The difficulty of applying NAND lies in the management of flash and the need of special system interface. 3.1 Performance Comparison Flash memory is non-volatile memory and can be erased and reprogrammed on memory cell block. The write operation of any flash device can only be done in an empty or erased cell, so in most cases, the erasure must be performed before the writing. In general, the NAND devices perform the erasure operation easily. But NOR requires that all bits in the target block be written as 1 before erasing. Since the NOR device is erased as a block of 64~128KB, the time to perform a write / erase operation is 5s. In contrast, the erasure NAND device is performed as a block of 8~32KB, and the same operation only needs 4 ms at most. The performance gap between NOR and NADN is further widened by the difference of block size in the execution of erasure. It is shown that for a given set of write operations (especially when updating small files), more erasure operations must be performed in NOR based cells. Therefore, when choosing a storage solution, the designer must weigh the following factors: The read speed of NOR is a little faster than NAND, but the writing speed is on the opposite. The 4ms erasure speed of NAND is much faster than that of NOR. Most writing operation need running erasure. The NAND erasure unit is smaller and the corresponding erasure circuit is less. Flash memory 3.2 Interface Difference NOR flash has a SRAM interface, and enough address pins to address, and easy storage and program to every byte inside. NAND devices use complex I/O ports to serially access data, which may vary from product to product or from manufacturer to manufacturer. Eight pins are used to transmit and control address and data information. NAND read and write operations use 512-byte blocks, which is similar to the hard disk management. Naturally, NAND based memory can replace hard drives or other block devices. 3.3 Capacity and Cost The cell size of NAND flash is almost half that of NOR devices. Because of the simpler manufacturing process, the NAND structure can provide higher capacity within a given die size, thus lowering the price accordingly. NOR flash accounts for most of the 1~16MB flash market, while NAND flash is only used in 8~128MB products, which means that NOR is mainly used in code storage, and NAND is suitable for data storage, mainly used in CompactFlash, Secure Digital, PC Cards and MMC memory cards. 3.4 Reliability and Durability One of the key issues needed to consider is reliability when using flahs media. For systems that need to extend MTBF, Flash is a very suitable storage solution. So the reliability of NOR and NAND can be compared between bit switching, lifetime (durability) and bad block processing. - Service Life The maximum number of erasures per block in NAND flash memory is one million times, while that of NOR is 100,000 times. In addition, NAND memory has the advantage of 10: 1 erasure speed, 8 times smaller than that of the NOR device, and each NAND memory block has fewer deletions at a given time. - Bit Switching All flash devices are plagued by bit switching. In some cases (rarely, NAND occurs more often than NOR), a bit reverses or its reversion is reported. One changing bit may not be obvious, but if it happens on a critical file, this minor failure could cause the system to shut down. If existing wrong report, it may be solved by reading it a few more times. Of course, if the bit really changes, the error detection / error correction (EDC/ECC) algorithm must be used. The problem of bit inversion is more common in NAND flash memory, therefore, it is  recommended that using NAND flash memory and EDC/ECC algorithm at the same time. But this problem is not fatal when storing multimedia information in NAND. Of course, if you use a local storage device to store an operating system, configuration file, or other sensitive information, you must use the EDC/ECC system to ensure reliability. - Bad Block Processing The bad blocks in NAND devices are randomly distributed. There have been previous efforts to eliminate bad blocks, but they found that the yield is too low and the cost is too high. The NAND device needs to initialize the medium to detect the bad block and mark it. In the fabricated devices, the failure rate will be high if this treatment cannot be carried out by a reliable method. 3.5 Simple Operation NOR-based flash memory can be used very directly, can be connected as other memory, and can run code directly on it. NAND is much more complex because of the need for an I / O interface. Access methods for various NAND devices vary from manufacturer to manufacturer. When using NAND devices, you must write to the driver before doing anything else. Writing information to NAND devices requires that designers don’t write to bad blocks, which means virtual mapping is necessary all the time on NAND devices. 3.6 Software Support When discussing software support, a distinction should be made between basic read / write / erasing operations and higher-level software for disk emulation and algorithms of flash management, also including the performance optimization. Running code on a NOR device doesn't require any software support. But using a NAND device, you usually need a driver, that is MTD(Memory Technology Driver). Both NAND and NOR devices need MTD when writing and erasing operations. NOR devices requires less MTD, because many vendors offer more advanced software for NOR devices, including M-System 's TrueFFS driver, which is used by manufacturers such as Wind River System, Microsoft, QNX Software System, Symbian and Intel. It also used to simulate DiskOnChip products and manage the NAND flash memory, including error correction, bad block handling, and loss balancing. The main manufacturers of NOR FLASH is INTEL and MICRO, used to be the mainstream of FLASH products, but its market share now squeezed by NAND FLASH. Its advantage is that it can run programs directly from FLASH, but the process is complex, thus it is expensive. NAND FLASH's main suppliers are SAMSUNG and Toshiba, and it widely used in USB drives, memory cards, and MP3 players. With different processes, it has larger storage capacity and is cheaper than the NOR FLASH. But also has the drawback, is unable to address runs the program directly, only used to store the data. In addition, NAND FLASH is very prone to bad blocks, so it is necessary to detect it by the related algorithm.  NAND FLASH is used to store data and programs in laptops, but it must be started with NOR FLASH. In addition to SAMSUNG processors, other mainstream processors for laptops do not support NAND FLASH startup directly. Therefore, you must start the machine with a small piece of NOR FLASH, and run OS and other software through the NAND FLASH load into SDRAM. IV Conclusion The DRAM uses the charge on the gate capacitor of the MOS transistor to store the information. Once the power is down, all the information will be lost. Because the grid will leak, it needs refresh operation to replenish the charge on these gate capacitors regularly. And every time the data is read out, it requires running the same work. This is called dynamic refresh, so it is called dynamic RAM. Because it uses only one MOS to store information, it can be highly integrated and can do a lot of work. SRAM uses registers to store information, so once the power is down, the data will be lost. But when the power supply, its data will always exist without the need for dynamic refresh, thus it is called static RAM. The above is mainly used in the system with large capacity, do not need to recover data through refresh operation. Flash ROM uses the capacitor on the floating gate to store the charge to store the information, because the floating gate does not leak, so the information can still be saved after the power is off. Also because of its simple mechanism, it can be integrated highly, and the capacity can be very large. Flash rom needs to be erased by electricity before writing, but in different approach of erasure, EEPROM can be erased in bytes, and flash rom can only be done in sector. However, it can be written in byte units, mainly used for bios, U disk and Mp3 devices that require large capacity and data storage when power is down.   FAQ   1.What is ROM and its function? Read-only memory (ROM) is a type of storage medium that permanently stores data on personal computers (PCs) and other electronic devices. It contains the programming needed to start a PC, which is essential for boot-up; it performs major input/output tasks and holds programs or software instructions.   2. What are the four types of ROM? MROM (Masked ROM) ... PROM (Programmable Read Only Memory) ... EPROM (Erasable and Programmable Read Only Memory) ... EEPROM (Electrically Erasable and Programmable Read Only Memory) ...   3. What is a RAM in a computer? RAM stands for random-access memory, but what does that mean? Your computer RAM is essentially short term memory where data is stored as the processor needs it. This isn't to be confused with long-term data that's stored on your hard drive, which stays there even when your computer is turned off.   4. What is flash memory used for? Flash memory is a long-life and non-volatile storage chip that is widely used in embedded systems. It can keep stored data and information even when the power is off. It can be electrically erased and reprogrammed. Flash memory was developed from EEPROM (electronically erasable programmable read-only memory).   5. Is Flash memory a RAM or ROM? RAM is Read Only Memory. Unlike RAM, ROM is the persistent storage. ... Flash Memory is one category of ROM i.e Electrically Erasable Read Only Memory (EEPROM).   6. What is flash memory and its types? Flash memory is a type of erasable read-only memory (EEPROM) that clears and rewrites data in chunks for fast, energy-efficient access and rewriting. Flash memory, or flash storage, is non-volatile, which means it remains viable even without an active power source.   7. What is RAM and ROM? RAM, which stands for random access memory, and ROM, which stands for read-only memory, are both present in your computer. RAM is volatile memory that temporarily stores the files you are working on. ROM is non-volatile memory that permanently stores instructions for your computer.   8. Which is better RAM or ROM? RAM is random access memory and cannot hold the data without the power, whereas ROM is a read-only memory and can hold the data even without the power. ... With RAM, writing data is a much faster and lightening process, whereas ROM, writing data speed is much slower as compared to RAM.   9. What are the disadvantages of ROM? The disadvantages of Erasable Programmable ROM (EPROM) are: The static power consumption is high as the transistors used have higher resistance. It is not possible for a particular byte to be erased, instead the entire content is erased. UV based EPROM takes time to erase the content.   10.What are the disadvantages of RAM? If CPU wants to read data only from the RAM, then the data access from the cache and the registers is slow in comparison to ROM. RAM is volatile, which means it is difficult to store data for a lengthy period of time. Unplanned circumstances like a power outage can result in data loss.   11. What is the work of ROM? Read only memory (ROM) provides permanent storage for instructions needed during bootstrapping, or the process of turning on the computer. It does so by storing the BIOS and other firmware for the computer hardware. This firmware is very hardware-specific and rarely needs updating.   12. Why is more RAM better? Generally, the faster the RAM, the faster the processing speed. With faster RAM, you increase the speed at which memory transfers information to other components. Meaning, your fast processor now has an equally fast way of talking to the other components, making your computer much more efficient.   13. Is RAM is a volatile memory? Volatile memory is computer memory that requires power to maintain the stored information. Most modern semiconductor volatile memory is either Static RAM (see SRAM) or dynamic RAM (see DRAM).   14. Why is ROM so important? ROM provides the necessary instructions for communication between various hardware components. As mentioned before, it is essential for the storage and operation of the BIOS, but it can also be used for basic data management, to hold software for basic processes of utilities and to read and write to peripheral devices.   15. What is stored in ROM? ROM is memory that cannot be changed by a program or user. ROM retains its memory even after the computer is turned off. For example, ROM stores the instructions for the computer to start up when it is turned on again.  

  Solid-state drive or Solid-state disk, abbreviated as SSD, is a computer storage device made of integrated circuits. You can use non-volatile memory (mainly NAND Flash in flash memory) as a permanent storage device, or use volatile memory (such as DRAM) as a temporary storage device. Solid-state hard drives often use SATA, PCI Express, mSATA, M.2, ZIF, IDE, U.2, CF, CFast... and other interfaces. At present, due to the difference between the price per unit and the maximum storage capacity of the mechanical hard disk, the solid state hard disk cannot completely replace the mechanical hard disk for the time being.   How do SSDs Work? | How does your Smartphone store data?  Catalog I What is Solid State Drive? II SSD Classification 2.1 Solid State Drive based on FLASH   Memory 2.2 Solid State Drive based on DRAM III Development History IV SSD Basic Structure 4.1 Main Control Chip 4.2 Cache Chip 4.3 Flash Memory Chip V Compare with Traditional Hard Disk VI SSD Advantages and Disadvantages 6.1 SSD Advantages 6.2 SSD Disadvantages FAQ I What is Solid State Drive?  Solid State Drive, also called solid state disk or SSD, is a hard disk made from an array of solid-state electronic memory chips, consisting of a control unit and a memory unit (FLASH chips / DRAM chips). The interface specification and definition, function and usage method of solid state disk are identical to those of ordinary hard disk drive, and the product shape and size are also the same as that of ordinary hard disk drive.  The working temperature range of SSD chip is very wide: Commercial product: 0~70℃; Industrial product: -40~85℃. Although the cost of manufacturing an SSD is high, it is still gradually being popularized into the DIY market. Due to the difference between solid state drive technology and traditional hard disk drive technology, there are many new memory manufacturers. Manufacturers only need to buy NAND memory, and then they can manufacture solid state disk with proper control chip. The new generation solid state drive generally uses SATA-2 interface, SATA-3 interface, SAS interface, MSATA interface, PCI-E interface, NGFF interface, CFast interface and SFF-8639 interface. II SSD Classification There are two kinds of storage media in solid state drive, one is FLASH chip and the other is DRAM. 2.1 Solid State Drive based on FLASH Memory Solid state drive based on FLASH memory(IDE FLASH DISK, Serial ATA Flash Disk) is using FLASH chips as its storage media. Its appearance can be made into a variety of forms, such as: Laptop hard drive, Micro hard disk, memory card, USB flash disk and etc. The biggest advantage of this SSD is that it is movable, and the data protection is not controlled by power supply. Also, it can be applied to various environments, but its service life is not too long, so it is suitable for individual users. In a flash-based solid state drive, memory cells are divided into two categories: SLC (Single Layer Cell) and MLC (Multi-level Cell).  Solid state drive based on FLASH memory The characteristics of SLC is its high cost, small volume and high speed. And for MLC, it is with characteristics of large volume, low cost but low speed. Each unit of MLC is 2bit, which is exactly twice as many as SLC. However, due to the large amount of data stored in each MLC storage cell and the relative complexity of the structure, the probability of error will increase, so the error correction must be carried out. This action will cause its performance to lag significantly behind the SLC flash memory with simple structure. In addition, the advantage of flash memory is that the number of duplicates is up to 100000 times, which is 10 times higher than that of MLC flash memory. In order to ensure the lifetime of MLC, the control chip is calibrated and the intelligent wear balance algorithm is used, so that the write times of each memory cell can be divided equally, and the mean time between failures (MTBF) can reach 1 million hours.   2.2 Solid State Drive based on DRAM Solid state drive based on DRAM is using DRAM as the storage medium. However, its application range is currently narrow. It follows the design of traditional hard disk, which can be volume setup and managed by most file system tools of operating system, and provides industrial standard PCI and FC interfaces for connecting hosts or servers. The application can be divided into two kinds: SSD hard disk and SSD hard disk array. It is a kind of high performance memory and has a long service life. The downside of it is its need for independent power supply to protect the data security. Solid state drive based on DRAM III Development History > 1956: IBM invented the world's first hard disk. > 1968: IBM restates the feasibility of Winchester technology, which established the development direction of hard disk. > 1970: StorageTek developed the first solid state hard drive. > 1989: The world's first solid state hard disk occurred. > 2006.03: Samsung took the lead in launching a solid state hard disk laptop with 32GB capacity > 2007.01: SanDisk released an 1.8-inch solid state hard disk with 32GB and 2.5-inch model with 32GB in March. > 2007.06: Toshiba has launched its first solid-state hard disk laptop with 120GB capacity. Intel SSD 520 Series > 2008. 09: The official launch of MemoRight SSD marks the accelerated entry of Chinese enterprises into solid state hard disk industry.  > 2009: With the development of SSD , all the manufacturers crushed into this industry , and the storage virtualization then entered a new stage . > 2010.2: Magnesia released the world's first solid-state disk with SATA 6Gbps interface, which breaking through the speed of SATAII interface reading and writing(300MB/s). > The end of 2010: Renice launched and patented the world's first high-performance mSATA solid state disk. > 2012: Apple uses 512GB solid state hard drives on its laptops. > 2015.08.01: TEKISM introduced the first mobile solid-state hard disk with Type-C interface. The SSD provides the latest Type-C interface and supports double-sided insertion of the USB interface. > 2016.01.01: Chinese storage company TEKISM has released the world's first Type-C fingerprint encrypted SSD. SSD M300   IV SSD Basic Structure The FLASH based SSD is the main category of solid state drives. Its internal structure is very simple. The main body of the solid state hard disk is actually a PCB board, and the most basic accessory on this PCB board is the control chip, cache chip(some low-end disks have no caching chip) and NAND flash that used for data storage. The more common solid state hard drives on the market are: LSISandForce, Indilinx, JMicron, Marvell, Phison, Goldendisk and Samsung. The main control chip is the brain of solid state hard drive. One of its functions is to reasonably allocate the load of data on each flash memory chip, and the other is to transfer the whole data and connect the flash memory chip with the external SATA interface. The ability of different master control is very different in data processing ability, algorithm, flash chip reading and writing control , which will directly lead to a ten times gap of solid state hard disk performance. Different SSD 4.1 Main Control Chip Table 1. Brand, model and product of the main control chip for solid state drive 4.2 Cache Chip   The cache chip is next to the main control chip. Solid state drive and traditional hard disk both require high speed cache chip to assist the main control chip for data processing. It is important to be noted here that there are some cheap solid state drive solutions to save the cost of the cache chip, which will have a certain impact on the performance in use.   4.3 Flash Memory Chip Apart from main control chip and caching chip, chips on the other place on PCB board are mainly NAND Flash chips. NAND Flash memory chips are divided into SLC, MLC and TLC NAND Flash memory.    V Compare with Traditional Hard Disk The interface specification and definition, function and usage method of solid state drives are almost the same as those of ordinary hard disk, and the shape and size of solid state drives are basically the same as that of ordinary 2.5 inch hard disk. Solid state drive has the advantages of fast reading and writing, light mass, low power consumption and small volume, which is not possessed by traditional mechanical hard disk. At the same time, its disadvantage is obvious. Although IDC believes that SSD is in the mainstream of the storage market, its price is still relatively high and its capacity is relatively low, once the hardware is damaged, the data is difficult to recover, and others think that the durability of solid state drives is relatively short. The main factors that influence the performance of solid state drive are main control chip, NAND flash media and firmware. Under the same conditions, what kind of interface is adopted may also affect the performance of SSD. The mainstream interface is SATA (including two kinds of interfaces for 3Gb/s and 6Gb/s) and the SSD of the PCIe 3.0 interface. Duo to the difference of the design and the principle of data reading and writing between SSD and the common disk, the internal structure of SSD is also very different. In general, the structure of solid state disk (SSD) is relatively simple and can be disassembled; therefore, most of the articles we see about SSD performance evaluation include an internal disassembly diagram of SSD. On the other hand, the data reading and writing of the ordinary mechanical disk is to lift the magnetic head by the air produced by the high speed rotation of the disc, which makes the magnetic head infinitely close to the disk without contact, and the stepper motor is used to push the head to read the data of changing the track. Therefore, its internal structure is relatively complex, more sophisticated, which is generally not allowed to disassemble. Once human disassembly, there is a strong risk of damage on the disk and disk can not work properly.This is why disassembly diagrams are largely invisible when evaluating ordinary disks.   VI SSD Advantages and Disadvantages 6.1 SSD Advantages   6.1.1 Fast reading and writing Using flash memory as storage medium, the read speed of SSD is faster than mechanical hard disk. SSD does not use (magnetic) head, and its seek time is almost 0. The speed of continuous writing is amazing, and most SSD manufacturers will claim that their solid state drives continue to read and write faster than 500MB / s! The speed of solid state hard disk is not only reflected in continuous reading and writing, but also in random reading and writing speed, which is directly reflected in most of the daily operation. Associated with this are extremely low access times, with the most common 7200 rotary mechanical drives running at 12-14 milliseconds, while solid state drives can easily reach 0.1 milliseconds or less.    6.1.2 Shock resistance Traditional hard drives are disk-type, data is stored in the disk sector. The solid state drive is made from flash memory particles (mp3, U disk, etc.), so there are no mechanical components inside the SSD. This will not affect its normal use even when moving at high speed or even with tilting, and minimize the possibility of data loss in the event of collisions and oscillations. Compared with the traditional hard disk, solid state drive has an absolute advantage.   6.1.3 Low power consumption  The power consumption of solid state drive is lower than that of traditional hard disk.   6.1.4 Noiseless Solid state drive has no mechanical motors and fans inside, thus it works with a noise value of 0 dB.Flash based solid state drives have lower energy consumption and lower calorific emissions (but the consumption of high-end or large-capacity products will be larger). There are no mechanical parts inside, so there will be no mechanical failure, no collision, no shock or vibration. Because the solid state hard disk uses the flash memory chip without mechanical parts, it has the characteristics of low heat emission and fast heat dissipation.   6.1.5 Wide range of working temperature A typical hard disk drive can only work in the range of 5 to 55℃ and most solid state drives can work at -10~70℃. The solid state hard disk is smaller in size and lighter in weight than the mechanical disk of the same capacity. The interface specification and definition, function and usage method of solid state drives are the same as those of ordinary hard disk, and the product shape and size are the same as that of ordinary hard disk. The working temperature range of the chip is very wide(-40~85 ℃).   6.1.6 Lightweight Solid state drives are lighter in weight, 20-30 grams lighter than regular 1.8-inch hard disks.   6.2 SSD Disadvantages  6.2.1 Capacity The maximum capacity of solid state drive is only 4TB. It is SanDisk Optimus MAX   6.2.2 Limited Service Life Solid state drive flash memory has the problem of limitation of erasing times.  A flash memory is completely erased once called a P / E, so the life of flash memory takes P/E units. The lifetime of the 34nm flash chip is about 5000 P / E, while the lifetime of the 25nm is about 3000 P / E. With the improvement of SSD firmware algorithm, the new SSD can provide less unnecessary writing. An 120GB solid state drive that writes 120GB of files to one P / E. In practical use, individual users often write in random rather than continuously. So there will be higher probability of bad sectors. In addition, while each sector of the solid state drive can be repeatedly erased 100000 times(SLC), in some applications such as LOG records in operating system , A sector may be read and written over and over again, in which case the actual lifetime of a solid state disk is not yet tested. However, with the equalization algorithm, the life expectancy of the memory unit is increased by 100000 writes, and the low cost MLCs have only 10, 000 write lives, while the cheap TLC flash memory is only 500 to 1, 000 times.   6.2.3 Expensive The price of the 128GB solid state drive on the market is around RMB550, while the price of the 256GB is around RMB950 .   FAQ   1. Is SSD better than HDD? SSDs in general are more reliable than HDDs, which again is a function of having no moving parts. ... SSDs commonly use less power and result in longer battery life because data access is much faster and the device is idle more often. With their spinning disks, HDDs require more power when they start up than SSDs.   2. What is a solid state drive used for? A solid-state drive (SSD) is a solid-state storage device that uses integrated circuit assemblies to store data persistently, typically using flash memory, and functioning as secondary storage in the hierarchy of computer storage.   3. Is a 256GB SSD better than a 1TB hard drive? A 1TB hard drive stores eight times as much as a 128GB SSD, and four times as much as a 256GB SSD. The bigger question is how much you really need. In fact, other developments have helped to compensate for the lower capacities of SSDs.   4. Do I need HDD if I have SSD? You don't need both but having a SSD for your operating system and a HDD for your storage drive might be the best bang for your buck. Otherwise, you only need one; a HDD is cheaper, larger, slower, and more prone to data loss. A SSD are normally smaller in storage for the same price but faster and shock resistant.   5. Should I upgrade to SSD? It's time to upgrade to an SSD if you're still using a mechanical hard drive in your computer. ... Solid-state drives are so much faster because they don't have a spinning magnetic platter and moving head. After upgrading, you'll be amazed at the performance improvements and wondering why you waited so long.   6. What are the pros and cons of a solid state drive? a. SSD is faster. b. SSD can take a licking c. HDD is cheaper; SSD is still expensive. d. HDD has greater storage capacity than SSD   7. Do solid state drives crash? SSDs can fail, but in a different way than traditional HDDs. While the latter often fail because of mechanical issues, SSDs may fail due to the methods used to write information. ... Each P/E cycle gradually degrades the memory of an SSD's cells until they eventually become worn down.   8. Can I put SSD and HDD together? The answer is absolutely yes. You can install both, but, SSD will have faster SSD speeds and HDD will still have slower HDD speeds. It is an excellent idea to use SSD and HDD at the same time. An SSD boasts many distinctive merits such as fast loading speed, low power consumption, and etc.     9. How much faster is a SSD than a HDD? As noted above,solid-state drives can read/write speeds of around 550 MB/s faster than a hard disk drive. SSDs can go even faster, provided your computer can handle it. A PCIe SSD can achieve anywhere from 1.2 GB/s to 2.2 GB/s - assuming you have a motherboard that can handle these speeds.   10. How can I tell if my SSD is failing? So here are four signs of SSD failure: Sign #1: Your computer takes a long time to save files. Sign #2: You have to restart often. Sign #3: Your computer crashes during boot. Sign #4: You receive a read-only error.

Summary As the emergence of a range of electronic technologies appear,major changes in the design of real-time embedded systems like the internet of things,augmented reality,or artificial intelligence occurred. The unifying thread between all of them is a greater focus on the use of distributed systems coupled with a need for high performance to deal with the data they generate and consume. Different design direction There are tensions that pull the engineering of real-time devices employing such technologies in different directions. Edge devices such as IoT sensor nodes and gateways call for the lowest-power operation.However,It's not the only area that needs energy efficiency. Despite their reliance on high-performance graphics and responsiveness to movement, AR-enabled systems (such as head-up displays for machine operators) also have to preserve as much energy as possible, protecting battery life and preventing head-mounted displays from becoming uncomfortably warm. Similarly, versatile robots enabled by AI need to be able to operate away from mains power. Distributed processing allows intensive computational work to be moved to the cloud and so offload the embedded systems. However, the real-time nature of these applications calls for low latency. Applications such as motion control and AR suffer if the delay from input to response is too long. This issue is leading to the deployment of edge computing server or ‘cloudlets’ - efficient server blades located relatively close to the edge devices themselves. To support real-time applications such cloudlets are in a position to take advantage of changes in memory technology to better fit the real-time nature of the clients they serve than traditional server designs. Historically, engineers have been forced to choose between performance and persistence when designing bulk memories into real-time computer systems. DRAM is cost-effective for storing large amounts of data close to the processor but is volatile. To ensure data is not lost through power issues - which are more likely to occur in edge nodes - data often has to be copied to persistent storage, which have often much slower access times.The move from rotating disk drives to flash memory for larger applications has already helped significantly when it comes to read access times. But flash still has its drawbacks when it comes to write performance. The erasing and rewriting of data from/to flash memory takes multiple cycles during which high-voltage pulses are delivered to the target memory cells. That takes both time and energy that system designers do not want to waste.   Next generation memory technologies Next generation memory technologies are now appearing that overcome the write delays and power demands of flash. These technologies include ferroelectric memory, phase-change memory (PCM), magnetic random-access memory (MRAM) and resistive random-access memory (ReRAM). As devices based on these concepts become available, engineers can consider using them in novel memory hierarchies that optimise cost, increase resilience and improve real-time responsiveness. Here we may mention that PCM,which was first put forward as a possible memory material as long ago as the 1970s,It is based on the same group of chalcogenide materials as those used in rewritable optical disks. A useful feature of the chalcogenides is the way they react to heat. High-current pulses will melt the material. If left to cool quickly it turns to a resistive amorphous state. But the amorphous state can be converted to a crystalline form with a much higher conductivity by applying a small amount of heat. Thanks to this change in properties, readout circuitry can interpret the difference in resistivity between cells as representing ones and zeros. Though similar in behaviour to PCM, with the same core approach of switching between high-resistance and low-resistance states, ReRAM uses different materials to chalcogenide. Typically, the movement of ions within the cell under the influence of pulses of current forms conductive filaments. Reset pulses disrupt these filaments, greatly increasing resistance. One potential advantage of ReRAM is that a large number of candidate materials could be chosen to implement them. This provides the scope for manufacturers to introduce memories with different levels of resilience and storage time. Although these memories use current pulses, the total charge required to program a cell is much lower than that required for flash. In the memories being developed today, ReRAM requires less write energy than PCM but the write times are similar. However, endurance is better in PCM than ReRAM and PCM currently lies further ahead on the development path. Experts believe both PCM and ReRAM will scale better than flash in the long term and so could ultimately supplant flash entirely.   about Ferroelectric Memory Ferroelectric memory and MRAM use the spin properties of electrons for storage. The spin can be controlled with very little energy through a spin-valve structure similar to that used in high-density read heads for magnetic disks. In an MRAM, this spin valve is made from a sandwich of materials formed in a via that lies between two metal interconnect lines on the surface of an integrated circuit (IC). The valve alters the resistance of the via based on the spin states of different materials in the sandwich.Ferroelectric memory has been available for several decades but in comparatively low densities to those envisaged for the resistance-based memories. Ferroelectric memory requires both a capacitor and transistor to be formed on the base layer of the wafer. The other memories are all formed in the metal interconnect layers and, potentially, can be stacked for higher integration.What's more,a key advantage  for ferroelectric memory is its use of materials that polarise in two different directions based on an applied electric field. This polarisation requires even less power than is needed for MRAM, which makes it suitable for systems that need to be highly energy efficient.   The potential problem A potential problem for all the novel memories today is that they lack the cost-effectiveness and density of flash, which is now beginning to take advantage of 3D manufacturing techniques. In reality, for cloudlets and also edge devices themselves, the density is not a major issue as these memories can serve as the underpinning for persistent caches. The low-power and relatively fast write times of the novel memories provides applications with the ability to copy important data to the persistent cache. Data objects that need to be stored permanently can, from there, be copied to flash or disk storage. However, there is no longer any need to transfer data to flash or disk storage continually just to ensure that important but transient data is not lost. When the system restarts, it can recover its state from combining data in both the permanent and persistent arrays.As costs come down and performance improves, there is the potential for MRAM, PCM or ReRAM to begin to displace DRAM and so move the architecture to one in which only the caches on the processors themselves employ a volatile memory architecture (such as SRAM).Persistent memory technologies need not be isolated to cloudlets and high-performance systems. The use of ferroelectric memory by Texas Instruments in its MSP430 line of microcontrollers provides an example of the impact it can have in IoT edge nodes such as sensors. Many IoT applications will rely on energy harvesting to at least supplement a built-in battery. Some may dispense with the battery altogether. The problem with energy harvesting is one of reliability. There are situations, such as vibrational energy capture on heavily used industrial machinery, where the power source is predictable. But in many cases, even with the use of a supercapacitor for an energy reservoir, the system may run temporarily short of power and need to shut down. When enough external energy is supplied, it can resume normal duties.The use of ferroelectric technology provides the microcontroller with the ability to ensure data persists through unexpected power outages without incurring an energy penalty even when data is written to it frequently.  

SummaryRecently engineers discover the two-dimensional atomic sheets for memory storage when they were developing alternative ways to provide greater memory storage capacity on thiner computer chips. Most of us are curious about how engineers discover them?DiscoverA team of electrical engineers at The University of Texas at Austin, in collaboration with Peking University scientists, has developed the thinnest memory storage device with dense memory capacity, paving the way for faster, smaller and smarter computer chips for everything from consumer electronics to big data to brain-inspired computing. Discussion"For a long time, the consensus was that it wasn't possible to make memory devices from materials that were only one atomic layer thick," said Deji Akinwande, associate professor in the Cockrell School of Engineering's Department of Electrical and Computer Engineering. "With our new 'atomristors,' we have shown it is indeed possible." Made from 2-D nanomaterials, the "atomristors"—a term Akinwande coined—improve upon memristors, an emerging memory storage technology with lower memory scalability. He and his team published their findings in the January issue of Nano Letters. "Atomristors will allow for the advancement of Moore's Law at the system level by enabling the 3-D integration of nanoscale memory with nanoscale transistors on the same chip for advanced computing systems," Akinwande said.Memory storage and transistors have, to date, always been separate components on a microchip, but atomristors combine both functions on a single, more efficient computer system. By using metallic atomic sheets (graphene) as electrodes and semiconducting atomic sheets (molybdenum sulfide) as the active layer, the entire memory cell is a sandwich about 1.5 nanometers thick, which makes it possible to densely pack atomristors layer by layer in a plane. This is a substantial advantage over conventional flash memory, which occupies far larger space. In addition, the thinness allows for faster and more efficient electric current flow.Given their size, capacity and integration flexibility, atomristors can be packed together to make advanced 3-D chips that are crucial to the successful development of brain-inspired computing. One of the greatest challenges in this burgeoning field of engineering is how to make a memory architecture with 3-D connections akin to those found in the human brain. "The sheer density of memory storage that can be made possible by layering these synthetic atomic sheets onto each other, coupled with integrated transistor design, means we can potentially make computers that learn and remember the same way our brains do," Akinwande said. The research team also discovered another unique application for the technology. In existing ubiquitous devices such as smartphones and tablets, radio frequency switches are used to connect incoming signals from the antenna to one of the many wireless communication bands in order for different parts of a device to communicate and cooperate with one another. This activity can significantly affect a smartphone's battery life. The atomristors are the smallest radio frequency memory switches to be demonstrated with no DC battery consumption, which can ultimately lead to longer battery life. All in all,this discovery has real commercialization value as it won't disrupt existing technologies. Rather, it has been designed to complement and integrate with the silicon chips already in use in modern tech devices.