The Kynix Components

CatalogDESCRIPTIONFEATURESMECHANICAL DATAORDERING CODEBLOCK DIAGRAMAPPLICATION CIRCUITPARTS TABLEABSOLUTE MAXIMUM RATINGSELECTRICAL AND OPTICAL CHARACTERISTICSTYPICAL CHARACTERISTICSPACKAGE DIMENSIONSTSOP4838 Datasheet DownloadTSOP4838 FAQ DESCRIPTIONThe TSOP22.., TSOP48.., TSOP24.. and TSOP44.. series are miniaturized IR receiver modules for infrared remote control systems. A PIN diode and a preamplifier are assembled on lead frame, the epoxy package contains an IR filter. The demodulated output signal can be directly connected to a microprocessor for decoding. The TSOP24.., TSOP44.. series devices are optimized to suppress almost all spurious pulses from Wi-Fi and CFL sources. They may suppress some data signals if continuously transmitted. The TSOP22.., TSOP48.. series devices are provided primarily for compatibility with old AGC2 designs. New designs should prefer the TSOP24.., TSOP44.. series containing the newer AGC4. These components have not been qualified according to automotive specifications. FEATURES Improved immunity against HF and RF noiseLow supply currentPhoto detector and preamplifier in one packageInternal filter for PCM frequencySupply voltage: 2.5 V to 5.5 VImproved immunity against optical noiseInsensitive to supply voltage ripple and rnoise MECHANICAL DATAPinning for TSOP44.., TSOP48..: 1 = OUT, 2 = GND, 3 = VSPinning for TSOP22.., TSOP24..: 1 = OUT, 2 = VS, 3 = GND ORDERING CODETSOP2..., TSOP4... - 2160 pieces in tubes BLOCK DIAGRAM APPLICATION CIRCUIT PARTS TABLEAGCLEGACY, FORLONG BURST REMOTE CONTROLS (AGC2)RECOMMENDED FOR LONG BURST CODES (AGC4)  Carrier frequency30 kHzTSOP4830TSOP2230TSOP4430TSOP2430 33 kHzTSOP4833TSOP2233TSOP4433TSOP2433 36 kHzTSOP4836TSOP2236TSOP4436 (1)(2)(3)TSOP2436 (1)(2)(3) 38 kHzTSOP4838TSOP2238TSOP4438 (4)(5)(6)TSOP2438 (4)(5)(6) 40 kHzTSOP4840TSOP2240TSOP4440TSOP2440 56 kHzTSOP4856TSOP2256TSOP4456 (6)(7)TSOP2456 (6)(7)PackageMoldPinning1 = OUT, 2 = GND, 3 = VS1 = OUT, 2 = VS, 3 = GND1 = OUT, 2 = GND, 3 = VS1 = OUT, 2 = VS, 3 = GNDDimensions (mm)6.0 W x 6.95 H x 5.6 DMountingLeadedApplicationRemote controlBest choice for(1) RC-5 (2) RC-6 (3) Panasonic (4) NEC (5) Sharp (6) r-step (7) Thomson RCA ABSOLUTE MAXIMUM RATINGSPARAMETERTEST CONDITIONSYMBOLVALUEUNITSupply voltage VS-0.3 to +6VSupply current IS5mAOutput voltage VO-0.3 to 5.5VVoltage at output to supply VS - VO-0.3 to (VS + 0.3)VOutput current IO5mAJunction temperature Tj100°CStorage temperature range Tstg-25 to +85°COperating temperature range Tamb-25 to +85°CPower consumptionTamb £ 85 °CPtot10mWSoldering temperaturet £ 10 s, 1 mm from caseTsd260°CNote Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating onlyand functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specificationis not implied. Exposure to absolute maximum rating conditions for extended periods may affect the device reliability ELECTRICAL AND OPTICAL CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)PARAMETERTEST CONDITIONSYMBOLMIN.TYP.MAX.UNITSupply currentEv = 0, VS = 5 VISD0.550.70.9mA Ev = 40 klx, sunlightISH-0.8-mASupply voltage VS2.5-5.5V Transmission distanceEv = 0, test signal see Fig. 1, IR diode TSAL6200,IF = 50 mA d - 24 - mOutput voltage lowIOSL = 0.5 mA, Ee = 0.7 mW/m2,test signal see Fig. 1VOSL--100mV Minimum irradiancePulse width tolerance: tpi - 5/fo < tpo < tpi + 6/fo, test signal see Fig. 1 Ee min. - 0.12 0.25 mW/m2Maximum irradiancetpi - 5/fo < tpo < tpi + 6/fo, test signal see Fig. 1Ee max.50--W/m2DirectivityAngle of half transmission distancej1/2-± 45-deg TYPICAL CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)  SUITABLE DATA FORMATThis series is designed to suppress spurious output pulsesdue to noise or disturbance signals. The devices candistinguish data signals from noise due to differences infrequency, burst length, and envelope duty cycle. The datasignal should be close to the device’s band-pass centerfrequency (e.g. 38 kHz) and fulfill the conditions in the tablebelow.When a data signal is applied to the product in thepresence of a disturbance, the sensitivity of the receiveris automatically reduced by the AGC to insure that nospurious pulses are present at the receiver’s output. Someexamples which are suppressed are:DC light (e.g. from tungsten bulbs sunlight)Continuous signals at any frequencyStrongly or weakly modulated patterns from fluorescentlamps with electronic ballasts (see Fig. 13 or Fig. 14).2.4 GHz and 5 GHz Wi-Fi   TSOP22.., TSOP48..TSOP24.., TSOP44..Minimum burst length10 cycles/burst10 cycles/burstAfter each burst of lengtha minimum gap time is required of10 to 70 cycles³ 12 cycles10 to 35 cycles³ 12 cyclesFor bursts greater thana minimum gap time in the data stream is needed of70 cycles> 4 x burst length35 cycles> 10 x burst lengthMaximum number of continuous short bursts/second8001300NEC codeYesPreferredRC5/RC6 codeYesPreferredThomson 56 kHz codeYesPreferredSharp codeYesPreferred Suppression of interference from fluorescent lampsMild disturbance patterns are suppressed (example:signal pattern of Fig. 13)Complex and critical disturbance patterns are suppressed (example: signal patternof Fig. 14 or highly dimmed LCDs) PACKAGE DIMENSIONS TSOP4838 Datasheet DownloadYou can download the datasheet of TSOP4838 given the link below.TSOP4838-Datasheet TSOP4838 FAQWhat is TSOP4838?The TSOP4838 is an IR Receiver Module for long burst remote control systems. A PIN diode and a preamplifier are assembled on lead frame, the epoxy package contains an IR filter. ... The TSOP4838 is optimized to suppress almost all spurious pulses from energy saving lamps like CFLs. How does an IR receiver work?These devices pick up infrared signals from your remote control just like a TV or Cable box. After receiving an IR signal they encode and amplify it to be suitable for transmission via low-voltage wiring. What is the use of IR module?IR sensors are now widely used in motion detectors, which are used in building services to switch on lamps or in alarm systems to detect unwelcome guests. In a defined angle range, the sensor elements detect the heat radiation (infrared radiation) that changes over time and space due to the movement of people. 

CatalogDescriptionFeaturesInternal Block DiagramSchematic DiagramAbsolute Maximum RatingsThermal DataElectrical CharacteristicsTypical Performance CharacteristicsOrdering InformationLM324N DatasheetLM324N FAQ DescriptionThe LM324/LM324A, LM2902/LM2902A consist of four independent, high gain, internally frequency compensated operational amplifiers which were designed specifically to operate from a single power supply over a wide voltage range. operation from split power supplies is also possible so long as the difference between the two supplies is 3 volts to 32 volts. Application areas include transducer amplifier, DC gain blocks and all the conventional OP Amp circuits which now can be easily implemented in single power supply systems. FeaturesInternally Frequency Compensated for Unity GainLarge DC Voltage Gain: 100dBWide Power Supply Range: LM324/LM324A : 3V~32V (or±1.5 ~ 16V)                                              LM2902/LM2902A: 3V~26V (or ±1.5V ~ 13V)Input Common Mode Voltage Range Includes GroundLarge Output Voltage Swing: 0V to VCC-1.5VPower Drain Suitable for Battery Operation Internal Block Diagram Schematic Diagram Absolute Maximum RatingsParameterSymbolLM324/LM324ALM2902/LM2902AUnitPower Supply VoltageVCC±16 or 32±13 or 26VDifferential Input VoltageVI(DIFF)3226VInput VoltageVI-0.3 to +32-0.3 to +26VOutput Short Circuit to GND Vcc≤15V, TA=25°C(one Amp)-ContinuousContinuous-Power Dissipation, TA=25°C    14-DIPPD13101310mW14-SOP 640640 Operating Temperature RangeTOPR0 ~ +70-40 ~ +85°CStorage Temperature RangeTSTG-65 ~ +150-65 ~ +150°C Thermal DataParameterSymbolValueUnitThermal Resistance Junction-Ambient Max. 14-DIP14-SOP RΘja 95195 ° C/W Electrical Characteristics1.VCC = 5.0V, VEE = GND, TA = 25℃, unless otherwise specifiedParameter  Symbol  Conditions LM324LM2902 Unit Min.Typ.Max.Min.Typ.Max. Input Offset Voltage VIOVCM = 0V to VCC -1.5V VO(P) = 1.4V, RS = 0Ω(Note1) - 1.5 7.0 - 1.5 7.0 mVInput Offset CurrentIIOVCM = 0V-3.050-3.050nAInput Bias CurrentIBIASVCM = 0V-40250-40250nAInput Common-Mode Voltage RangeVI(R)Note10-VCC-1.50-VCC-1.5V Supply Current  ICC RL = ∞,VCC = 30V (LM2902,VCC=26V)-1.03-1.03mARL = ∞,VCC = 5V-0.71.2-0.71.2mALarge Signal Voltage GainGVVCC = 15V,RL=2kΩ VO(P) = 1V to 11V25100-25100-V/mV Output Voltage Swing  VO(H) Note1 RL = 2kΩ26--22--VRL=10kΩ2728-2324-VVO(L)VCC = 5V, RL=10kΩ-520-5100mVCommon-Mode Rejection RatioCMRR-6575-5075-dBPower Supply Rejection RatioPSRR-65100-50100-dBChannel SeparationCSf = 1kHz to 20kHz (Note2)-120--120-dBShort Circuit to GNDISCVCC = 15V-4060-4060mA   Output Current  ISOURCEVI(+) = 1V, VI(-) = 0V VCC = 15V, VO(P) = 2V2040-2040-mA  ISINK VI(+) = 0V, VI(-) = 1V VCC = 15V,VO(P) = 2V 10 13 - 10 13 - mAVI(+) = 0V, VI(-) = 1V VCC = 15V,VO(R) = 200mV 12 45 - - - - mADifferential Input VoltageVI(DIFF)---VCC--VCCVNote :1.VCC=30V for LM324 , VCC = 26V for LM29022.This parameter, although guaranteed, is not 100% tested in production. 2.VCC = 5.0V, VEE = GND, unless otherwise specifiedThe following specification apply over the range of 0℃ ≤ TA ≤ +70℃ for the LM324 ; and the -40℃ ≤ TA ≤ +85℃ for the LM2902Parameter Symbol Conditions LM324LM2902Unit Min.Typ.Max.Min.Typ.Max. Input Offset Voltage VIOVICM = 0V to VCC -1.5V VO(P) = 1.4V, RS = 0Ω(Note1) - - 9.0 - - 10.0 mVInput Offset Voltage DriftΔVIO/ΔTRS = 0Ω (Note2)-7.0--7.0-mV/°CInput Offset CurrentIIOVCM = 0V--150--200nAInput Offset Current DriftΔIIO/ΔTRS = 0Ω (Note2)-10--10-pA/°CInput Bias CurrentIBIASVCM = 0V--500--500nAInput Common-Mode Voltage RangeVI(R)Note10-VCC-2.00-VCC-2.0VLarge Signal Voltage GainGVVCC = 15V, RL = 2.0kΩ VO(P) = 1V to 11V15--15--V/mV Output Voltage Swing  VO(H) Note1 RL=2kΩ26--22--VRL=10kΩ2728-2324-VVO(L)VCC = 5V, RL=10kΩ-520-5100mV Output Current ISOURCEVI(+) = 1V, VI(-) = 0V VCC = 15V, VO(P) = 2V1020-1020-mAISINKVI(+) = 0V, VI(-) = 1V VCC = 15V, VO(P) = 2V58-58-mADifferential Input VoltageVI(DIFF)---VCC--VCCVNote:1.VCC=30V for LM324 , VCC = 26V for LM29022.These parameters, although guaranteed, are not 100% tested in production. 3. VCC = 5.0V, VEE = GND, TA = 25℃, unless otherwise specifiedParameter Symbol Conditions LM324ALM2902AUnit Min.Typ.Max.Min.Typ.Max. Input Offset Voltage VIOVCM = 0V to VCC =1.5V VO(P) = 1.4V, RS = 0Ω(Note1) - 1.5 3.0 - 1.5 2.0 mVInput Offset CurrentIIOVCM = 0V-3.030-3.050nAInput Bias CurrentIBIASVCM = 0V-40100-40250nAInput Common-Mode Voltage Range VI(R) VCC = 30V 0 -VCC-1.5 0 -VCC-1.5 V Supply Current  ICC VCC = 30V, RL = ∞(LM2902,VCC=26V)-1.53-1.03mAVCC = 5V, RL = ∞-0.71.2-0.71.2mALarge Signal Voltage GainGVVCC = 15V, RL= 2kΩ VO(P) = 1V to 11V25100-25100-V/mV Output Voltage Swing  VO(H) Note1 RL = 2kΩ26--22--VRL = 10kΩ2728-2324-VVO(L)VCC = 5V, RL=10kΩ-520-5100mVCommon-Mode Rejection RatioCMRR-6585-5075-dBPower Supply Rejection RatioPSRR-65100-50100-dBChannel SeparationCSf = 1kHz to 20kHz (Note2)-120--120-dBShort Circuit to GNDISCVCC = 15V-4060-4060mA   Output Current  ISOURCEVI(+) = 1V, VI(-) = 0V VCC =15V, VO(P) = 2V2040-2040-mA  ISINK VI(+) = 0V, VI(-) = 1V VCC = 15V, VO(P) = 2V1020-1013-mAVI(+) = 0V, VI(-) = 1V VCC = 15V, VO(P) = 200mV 12 50 - - - - mADifferential Input VoltageVI(DIFF)---VCC--VCCVNote:1.VCC=30V for LM324A ; VCC=26V for LM2902A2.This parameter, although guaranteed, is not 100% tested in production. 4. VCC = 5.0V, VEE = GND, unless otherwise specifiedThe following specification apply over the range of 0℃ ≤TA ≤ +70℃ for the LM324A ; and the -40℃ ≤ TA ≤ +85℃ for the LM2902AParameter Symbol Conditions LM324ALM2902AUnit Min.Typ.Max.Min.Typ.Max. Input Offset Voltage VIOVCM = 0V to VCC -1.5V VO(P) = 1.4V, RS = 0Ω(Note1) - - 5.0 - - 6.0 mVInput Offset Voltage DriftΔVIO/ΔTRS = 0Ω (Note2)-7.030-7.0-mV/°CInput Offset CurrentIIOVCM = 0V--75--200nAInput Offset Current DriftΔIIO/ΔTRS = 0Ω (Note2)-10300-10-pA/°CInput Bias CurrentIBIAS--40200--500nA Input Common-Mode Voltage Range VI(R) Note1 0 - VCC-2.0 0 - VCC-2.0 VLarge Signal Voltage GainGVVCC = 15V, RL= 2.0kΩ15--15--V/mV Output Voltage Swing  VO(H) Note1 RL = 2kΩ26--22--VRL = 10kΩ2728-2324-VVO(L)VCC = 5V, RL= 10kΩ-520-5100mV Output Current ISOURCEVI(+) = 1V, VI(-) = 0V VCC = 15V, VO(P) = 2V1020-1020-mAISINKVI(+) = 0V, VI(-) = 1V VCC = 15V, VO(P) = 2V58-58-mADifferential Input VoltageVI(DIFF)---VCC--VCCVNote:1.VCC=30V for LM324A ; VCC=26V for LM2902A.2.These parameters, although guaranteed, are not 100% tested in production. Typical Performance Characteristics           Ordering InformationProduct NumberPackageOperating TemperatureLM324N14-DIP  0 ~ +70°C   LM324ANLM324M14-SOP LM324AMLM2902N14-DIP -40 ~ +85°C LM2902M14-SOP LM2902AM LM324N DatasheetYou can download the datasheet of LM324N from the link given below:LM324N Datasheet LM324N FAQWhat is Lm324n used for?Lm324n is widely used in transducer amplifiers. DC gain blocks and conventional amplifiers circuits are mainly consists of Lm324n. It can be used as a rectifier, oscillator and comparator. What is a quad operational amplifier?They have several distinct advantages over standard operational amplifier types in single supply applications. The quad amplifier can operate at supply voltages as low as 3.0 V or as high as 32 V with quiescent currents about one−fifth of those associated with the MC1741 (on a per amplifier basis). How does a op-amp work?An operational amplifier is an integrated circuit that can amplify weak electric signals. An operational amplifier has two input pins and one output pin. Its basic role is to amplify and output the voltage difference between the two input pins. Why negative power supply is used in operational amplifiers?Opamps don't produce voltage or current. They let more or less current pass from the powersupply to the output. To get a negative voltage out of an opamp, you have give it a powersupply with a negative voltage. The output of an opamp is limited to what is available from the supply rails. What is operational amplifier and its types?Op amps can be classified into 3 main types based on the input/output voltage range: Dual Supply, Single Supply, and Rail-to-Rail. The input/output voltage range of each type of op amp is shown below. 

Product OverviewThe LMP7721 is the industry's lowest specified input bias current precision amplifier. The ultra-low input bias current is 3 fA, with a specified limit of +20 fA at 25°C and +900 fA at 85°C. This is achieved with the latest patent-pending technology of input bias current cancellation amplifier circuitry. This technology also maintains the ultra-low input bias current over the entire input common-mode voltage range of the amplifier. This blog will introduce LMP7721 systematically from its features, pinout to its specifications, applications, also including LMP7721 datasheet and so much more. CatalogProduct OverviewLMP7721 FeaturesLMP7721 PinoutLMP7721 ApplicationsLMP7721 Functional Block DiagramLMP7721 Circuit DiagramLMP7721 PackageLMP7721 SpecificationLMP7721 ManufacturerLMP7721 DatasheetUsing WarningsLMP7721 FAQ LMP7721 FeaturesUnless Otherwise Noted, Typical Values at TA =25°C,Vs=5V.Input Bias Current (Vcm= 1 V)- Maximum at 25°C +20 fA- Maximum at 85°C +900 fAOffset Voltage +26 μVOffset Voltage Drift -1.5 μV/°CDC Open-L oop Gain 120 dBDC CMRR 100 dBInput Voltage Noise(atf= 1 kHz) 6.5 nV/VHzTHD 0.0007%Supply Current 1.3 mAGBW 17 MHzSlew Rate (Falling Edge) 12.76 V/μsSupply Voltage 1.8V to5.5 VOperating Temperature Range -40°C to 125°C8-Pin SOIC  LMP7721 PinoutThe following figure is the diagram of LMP7721 pinout. LMP7721 Pinout LMP7721 ApplicationsPhotodiode AmplifierHigh Impedance Sensor Amplifierlon Chamber AmplifierElectrometer AmplifierpH Electrode AmplifierTransimpedance Amplifier LMP7721 Functional Block DiagramThe following figure shows the functional block diagram of LMP7721. LMP7721 Functional Block Diagram LMP7721 Circuit DiagramThe following are the circuit diagrams of LMP7721. Guarding the Noninverting Configuration A CMOS input stage with ultra-low input bias current, negligible input current noise, and low input voltage noise allows the LMP7721 to provide high fidelity amplification. In addition, the LMP7721 has a 17 MHz gain bandwidth product, which enables high gain at wide bandwidth. A rail-to-rail output swing at 5.5-V power supply allows detection and amplification of a wide range of input currents. These properties make the LMP7721 ideal for transimpedance amplification.  LMP7721 as pH Electrode Amplifier  LMP7721 PackageThe following diagram shows the LMP7721 package. LMP7721 Package LMP7721 SpecificationNumber of Channels (#)1Total Supply Voltage (Min) (+5V=5, +/-5V=10)1.8Total Supply Voltage (Max) (+5V=5, +/-5V=10)5.5GBW (Typ) (MHz)17Slew Rate (Typ) (V/us)10.5Rail-to-RailIn to V- OutVos (Offset Voltage @ 25C) (Max) (mV)0.15Offset Drift (Typ) (uV/C)1.5Iq per channel (Typ) (mA)1.3Vn at 1kHz (Typ) (nV/rtHz)6.5CMRR (Typ) (dB)100RatingCatalogOperating Temperature Range (C)-40 to 125Package GroupSOICApprox. Price (US$)1.65 | 1kuPackage Size: mm2:W x L (PKG)8SOIC: 29 mm2: 6 x 4.9(SOIC)Input Bias Current (Max) (pA)0.02Output Current (Typ) (mA)22Additional FeaturesN/AArchitectureCMOS LMP7721 ManufacturerTexas Instruments Incorporated (TI) is a global semiconductor design and manufacturing company that develops analog ICs and embedded processors. By employing the world's brightest minds, TI creates innovations that shape the future of technology. TI is helping more than 100,000 customers transform the future, today. LMP7721 DatasheetYou can download LMP7721 datasheet from the link given below:LMP7721 Datasheet Using WarningsNote: Please check their parameters and pin configuration before replacing them in your circuit. LMP7721 FAQWhat is the ultra-low input bias current?3 fA. What type of technology does the LMP7721 have?Patent-pending. What type of input bias current does LMP7721 maintain over the entire input common-mode voltage range of the amplifier?Ultra-low. What is amplifier bias current?In FET input amplifiers, the bias current is the gate leakage current of an FET, which is the leakage current of a reverse-biased junction diode. Such leakage currents double for every 10 °C rise in junction temperature. What is the purpose of input bias current?In order for the input transistor to operate, the base current (IB) must flow. This base current is the input bias current. In actual use, when a resistor with a high resistance (RIN) is inserted at the input, the input bias current is used to express the input signal error.

CatalogDescriptionApplicationFeaturesInternal Schematic DiagramDevice summaryElectrical RatingsElectrical CharacteristicsElectrical Characteristics (Curves)Test circuitsPackage Mechanical Data2N7002 Datasheet2N7002 FAQ Description2N7002 Power MOSFET is the second generation of STMicroelectronics unique “single feature size” strip-based process. The resulting transistor shows extremely high packing density for low onresistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. Application■ Switching applications FeaturesTypeVDSSRDS(on) maxID2N700060 V< 5 W(@10V)0.35 A2N700260 V< 5 W(@10V)0.20 A ■ Low Qg■ Low threshold drive Internal Schematic DiagramFigure 1. Internal Schematic Diagram Device summaryOrder codesMarkingPackagePackaging2N70002N7000GTO-92Bulk2N7002ST2NSOT23-3LTape and reel Electrical RatingsAbsolute Maximum RatingsSymbol  Parameter Value Unit TO-92SOT23-3LVDSDrain-source voltage (VGS = 0)60VVDGRDrain-gate voltage (RGS = 20 kW)60VVGSGate- source voltage± 18VIDDrain current (continuous) at TC = 25 °C0.350.20AIDM (1)Drain current (pulsed)1.41APTOTTotal dissipation at TC = 25 °C10.35W1.Pulse width limited by safe operating area Thermal Data Symbol ParameterValue UnitTO-92SOT23-3LRthj-ambThermal resistance junction-ambient max125357.1 (1)°C/WTJOperating junction temperature - 55 to 150 °CTstgStorage temperature1.When mounted on 1inch² FR-4, 2 Oz copper board. Electrical Characteristics(TCASE = 25 °C unless otherwise specified)On/off statesSymbolParameterTest conditionsMin.Typ.Max.UnitV(BR)DSSDrain-source breakdown voltageID = 250 µA, VGS =060  V IDSSZero gate voltage drain current (VGS = 0)VDS = max rating VDS = max rating,TC = 125 °C  110µA µAIGSSGate-body leakage current (VDS = 0)VGS = ± 18 V  ±100nAVGS(th)Gate threshold voltageVDS = VGS, ID = 250 µA12.13VRDS(on)Static drain-source on resistanceVGS = 10 V, ID = 0.5 A   VGS = 4.5 V, ID = 0.5 A 1.8255.3WW DynamicSymbolParameterTest conditionsMin.Typ.Max.Unitgfs (1)Forward transconductanceVDS = 10 V , ID = 0.5 A 0.6 SCiss Coss CrssInput capacitance Output capacitanceReverse transfer capacitance VDS = 25 V, f = 1 MHz, VGS = 0 43206 pF pF pFtd(on)Turn-on delay timeVDD = 30 V, ID = 0.5 A RG = 4.7 W VGS = 4.5 V(see Figure 16) 5 nstrRise time  15 nstd(off)Turn-off delay time  7 nstfFall time  8 nsQgTotal gate chargeVDD = 30 V, ID = 1 A, 1.42nCQgsGate-source chargeVGS = 5 V 0.8 nCQgdGate-drain charge(see Figure 17) 0.5 nC1.Pulsed: Pulse duration = 300 µs, duty cycle 1.5%. Source Drain DiodeSymbolParameterTest conditionsMin.Typ.Max.UnitISD    ISDM (1)Source-drain current Source-drain current (pulsed)   0.351.40A        AVSD (2)Forward on voltageISD = 1 A, VGS = 0  1.2Vtrr Qrr IRRMReverse recovery time Reverse recovery charge Reverse recovery currentISD = 1 A, di/dt = 100 A/µs, VDD = 20 V, Tj = 150 °C(see Figure 18) 32251.6 ns    nC      A1.Pulse width limited by safe operating area2.Pulsed: Pulse duration = 300 µs, duty cycle 1.5% Electrical Characteristics (Curves)             Test circuits     Package Mechanical DataIn order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. TO-92 Mechanical DataDim. mmMin.Typ.Max.A4.32 4.95b0.36 0.51D4.45 4.95E3.30 3.94e2.41 2.67e11.14 1.40L12.70 15.49R2.16 2.41S10.92 1.52W0.41 0.56V 5°  TO-92 drawing  SOT23-3L mechanical dataDim. mmMin.Typ.Max.A  1.25A10 0.15A21.00 1.20A30.60 0.70D2.826 3.026E2.60 3.00E11.526 1.726e 0.95 e1 1.90 L0.35 0.60L1 0.59 L2 0.25 R0.05  R10.05 0.20K3° 7°K16° 10° SOT23-3L drawing 2N7002 DatasheetYou can download the datasheet of 2N7002 from the link given below:2N7002 Datasheet 2N7002 FAQWhat is N-channel transistor?Channel MOSFET is a type of metal oxide semiconductor field-effect transistorthat is categorized under the field-effect transistors (FET). This type of transistor is also known as an insulated-gate field-effect transistor (IGFET). Sometimes it is also known as a metal-insulator field-effect transistor (MIFET). What is a maximum operation voltage for the 2N7002 transistor?Packaged in a TO-92 enclosure, both the 2N7000 and BS170 are 60 V devices. The 2N7000 can switch 200 mA. The BS170 can switch 500 mA, with a maximum on-resistance of 5 Ω at 10 V Vgs. The 2N7002 is a similar part with the same electrical characteristics as the 2N7000 but different package. What is N-channel enhancement MOSFET?A N-Channel MOSFET is a type of MOSFET in which the channel of the MOSFET is composed of a majority of electrons as current carriers. An enhancement-type MOSFET is the opposite. It is normally off when the gate-source voltage is 0 (VGS=0). 

Product OverviewThe 74HC86 is identical in pinout to the LS86. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This blog will introduce 74HC86 systematically from its features, pinout to its specifications, applications, also including 74HC86 datasheet and so much more. CatalogProduct Overview74HC86 Features74HC86 PinoutOrdering InformationMaximum RatingsRecommended Operating ConditionsDC Electrical Characteristics74HC86 Circuit Diagram74HC86 Package74HC86 Manufacturer74HC86 DatasheetUsing Warnings74HC86 FAQ 74HC86 FeaturesOutput Drive Capability: 10 LSTTL  LoadsOutputs Directly Interface to CMOS, NMOS, and TTLOperating Voltage Range: 2.0 to 6.0 VLow Input Current: 1.0 AHigh Noise Immunity Characteristic of CMOS DevicesIn Compliance with JEDEC Standard No. 7A RequirementsESD Performance: HBM  2000 V; Machine Model  200 VChip Complexity: 56 FETs or 14 Equivalent GatesThese are Pb−Free Devices 74HC86 PinoutThe following figure is the diagram of 74HC86 pinout. 74HC86 Pinout Logic Diagram Function Table Ordering InformationDevicePackageShipping†74HC86DR2GSOIC−14(Pb−Free) 2500 / Tape & Reel74HC86DTR2GTSSOP−14* Maximum RatingsSymbolParameterValueUnitVCCDC Supply Voltage (Referenced to GND)– 0.5 to + 7.0VVinDC Input Voltage (Referenced to GND)– 0.5 to VCC + 0.5VVoutDC Output Voltage (Referenced to GND)– 0.5 to VCC + 0.5VIinDC Input Current, per Pin±20mAIoutDC Output Current, per Pin±25mAICCDC Supply Current, VCC and GND Pins±50mAPDPower Dissipation in Still Air, SOIC Package†TSSOP Package†500450mWTstgStorage Temperature– 65 to + 150°CTLLead Temperature, 1 mm from Case for 10 Seconds(SOIC or TSSOP Package) 260°C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings  only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.†Derating — SOIC Package: – 7 mW/°C from 65° to 125°C TSSOP Package: − 6.1 mW/°C from 65° to 125°CFor high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D). This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high−impedance cir- cuit. For proper operation, Vin and Vout should be constrained to the range GND ≤ (Vin or Vout) ≤ VCC. Unused inputs must  always  be tied to an appropriate logic voltage level   (e.g.,  either  GND  or  VCC).Unused outputs must be left open. Recommended Operating ConditionsSymbolParameterMinMaxUnitVCCDC Supply Voltage (Referenced to GND)2.06.0VVin, VoutDC Input Voltage, Output Voltage (Referenced to GND)0VCCVTAOperating Temperature, All Package Types– 55+ 125°Ctr, tfInput Rise and Fall Time (Figure 1)VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V001000500ns0400  DC Electrical Characteristics  Symbol  Parameter  Test Conditions  VCC (V)Guaranteed Limit  Unit    – 55 to 25°C ≤ 85°C ≤ 125°C VIHMinimum High−Level Input VoltageVout = 0.1 V or VCC – 0.1 V|Iout| ≤ 20 µA2.03.04.51.52.13.151.52.13.151.52.13.15V   6.04.24.24.2 VILMaximum Low−Level Input VoltageVout = 0.1 V or VCC – 0.1 V|Iout| ≤ 20 µA2.03.04.50.50.91.350.50.91.350.50.91.35V   6.01.81.81.8 VOHMinimum High−Level Output VoltageVin = VIH or VIL|Iout| ≤ 20 µA2.04.56.01.94.45.91.94.45.91.94.45.9V  Vin = VIH or VIL |Iout| ≤ 2.4 mA3.02.482.342.20   |Iout| ≤ 4.0 mA4.53.983.843.70   |Iout| ≤ 5.2 mA6.05.485.345.20 VOLMaximum Low−Level Output VoltageVin = VIH or VIL|Iout| ≤ 20 µA2.04.56.00.10.10.10.10.10.10.10.10.1V  Vin = VIH or VIL |Iout| ≤ 2.4 mA3.00.260.330.40   |Iout| ≤ 4.0 mA4.50.260.330.40   |Iout| ≤ 5.2 mA6.00.260.330.40 IinMaximum Input Leakage CurrentVin = VCC or GND6.0±0.1±1.0±1.0µAICCMaximum Quiescent Supply Current (per Package)Vin = VCC or GNDIout = 0 µA6.02.02040µANOTE: Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High−Speed CMOS  Data Book (DL129/D). AC Electrical Characteristics (CL = 50 pF, Input t, = tf = 6 ns) Symbol  Parameter VCC (V)Guaranteed Limit  Unit   – 55 to 25°C ≤ 85°C ≤ 125°C tPLH, tPHLMaximum Propagation Delay, Input A or B to Output Y (Figures 1 and 2)2.0100125150ns  3.04.58020902511031   6.0172126 tTLH, tTHLMaximum Output Transition Time, Any Output (Figures 1 and 2)2.07595110ns  3.04.5301540195522   6.0131619 CinMaximum Input Capacitance—101010pF NOTES:1.For propagation delays with loads other than 50 pF, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D).2.Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D). CPD Power Dissipation Capacitance (Per Gate)*Typical @ 25°C, VCC = 5.0 V pF33* Used to determine the no−load dynamic power consumption: PD = CPD VCC2f +  ICC VCC . For load considerations, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D). 74HC86 Circuit DiagramThe following is the circuit diagram of Switching Waveforms. Switching Waveforms Test Circuit Expanded Logic Diagram 74HC86 PackageThe following diagram shows the 74HC86 package. 74HC86 Package DIMMILLIMETERSINCHES MINMAXMINMAXA8.558.750.3370.344B3.804.000.1500.157C1.351.750.0540.068D0.350.490.0140.019F0.401.250.0160.049G1.27 BSC0.050 BSCJ0.190.250.0080.009K0.100.250.0040.009M0 °7 °0 °7 °P5.806.200.2280.244R0.250.500.0100.019 NOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: MILLIMETER.3.DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION.4.MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.5.DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. Soldering Footprint *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 74HC86 ManufacturerON Semiconductor is a Fortune 500 company driving energy efficient innovations, empowering customers to reduce global energy use. The company is a leading supplier of semiconductor-based solutions, offering a comprehensive portfolio of energy efficient power and signal management, logic, standard and custom devices. The company’s products help engineers solve their unique design challenges in automotive, communications, computing, consumer, industrial, medical and military/aerospace applications. 74HC86 DatasheetYou can download 74HC86 datasheet from the link given below:74HC86 Datasheet Using WarningsNote: Please check their parameters and pin configuration before replacing them in your circuit. 74HC86 FAQWhat is NOR gate IC?A NOR gate (“not OR gate”) is a logic gate that produces a high output (1) only if all its inputs are false, and low output (0) otherwise. Hence the NOR gate is the inverse of an OR gate, and its circuit is produced by connecting an OR gate to a NOT gate. Why XOR gate is called exclusive?An XOR gate is normally two inputs logic gate where the output is only logical 1 when only one input is logical 1. When both inputs are equal, either are 1 or both are 0, the output will be logical 0. This gate is called XOR or exclusive OR gate because its output is only 1 when its input is exclusively 1. What is Quad input?A quad gate is an IC (integrated circuit or chip) containing four logic gates. Most logic gates have two inputs and one output. At any given moment, every terminal is in one of the two binary conditions low (0) or high (1), represented by different voltages.

CatalogFeaturesMaximum RatingsThermal CharacteristicsMarking DiagramElectrical CharacteristicshFE ClassificationTypical Performance CharacteristicsOrdering InformationKSA992 DatasheetKSA992 FAQ FeaturesAudio Frequency Low−Noise AmplifierComplement to KSC1845These are Pb−Free Devices KSA992 PNP Epitaxial Silicon TransistorMaximum Ratings (Values are at TA = 25°C unless otherwise noted.)SymbolParameterValueUnitVCBOCollector−Base Voltage−120VVCEOCollector−Emitter Voltage−120VVEBOEmitter−Base Voltage−5VICCollector Current−50mAIBBase Current−10mATJJunction Temperature150°CTSTGStorage Temperature−55 to 150°C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. Thermal Characteristics (Values are at TA= 25°C unless otherwise noted.) (Note 1)SymbolParameterValueUnitPD Power Dissipation500mWDerate Above 25°C4mW/°CRθJAThermal Resistance, Junction−to−Ambient250° C/W 1.PCB size: FR−4, 76 mm x 114 mm x 1.57 mm (3.0 inch x 4.5 inch x 0.062 inch)with minimum land pattern size. Marking DiagramKSA992 Marking Diagram A = Assembly CodeA992 = Device CodeX = F / FA / FBYWW = Date Code Electrical Characteristics (Values are at TA = 25°C unless otherwise noted.)SymbolParameterConditionsMinTypMaxUnitICBOCollector Cut−Off CurrentVCB = −120 V, IE = 0−−−50nAICEOCollector Cut−Off CurrentVCE = −100 V, IB = 0−−−1µAIEBOEmitter Cut−Off CurrentVEB = −5 V, IC = 0−−−50nAhFE1DC Current Gain VCE = −6 V, IC = −0.1 mA150500− hFE2VCE = −6 V, IC = −1 mA200500800 VBE(on)Base−Emitter On VoltageVCE = −6 V, IC = −1 mA−0.55−0.61−0.65VVCE(sat)Collector−Emitter Saturation VoltageIC = −10 mA, IB = −1 mA−−0.09−0.30VfTCurrent Gain Bandwidth ProductVCE = −6 V, IC = −1 mA50100−MHzCobOutput CapacitanceVCB = −30 V, IE = 0, f = 1 MHz−23pFNFNoise FigureVCE = −5 V, IC = −1.0 mA, RS = 100 kΩ, f = 1 kHz−7−dB Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. hFE ClassificationClassificationPFFAFBEhFE2200~400300~600300~470430~600400~800 Typical Performance CharacteristicsKSA992 Static Characteristic  KSA992 DC Current Gain  KSA992 Base−Emitter Saturation Voltage and Collector−Emitter Saturation Voltage  KSA992 Collector Output Capacitance  KSA992 Current Gain Bandwidth Product  KSA992 Power Derating Ordering InformationPart NumberTop MarkPackageShipping†KSA992FBUA992TO−92 3L(Pb−Free)10000 Units / BulkKSA992FTAA992TO−92 3L(Pb−Free)2000 / Tape & AmmoKSA992FATAA992TO−92 3L(Pb−Free)2000 / Tape & AmmoKSA992FBTAA992TO−92 3L(Pb−Free)2000 / Tape & Ammo †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. KSA992 DatasheetYou can download the datasheet of KSA992 from the link given below:KSA992 Datasheet KSA992 FAQWhat is PNP Transistor and its types?The PNP transistor is a type of transistor in which one n-type material is doped with two p-type materials. It is a device that is controlled by the current. Both the emitter and collector currents were controlled by the small amount of base current. Two crystal diodes are connected back-to-back in the PNP transistor. What is the working principle of PNP transistor?PNP Transistor works when Base Emitter junction is forward biased and the Base Collector junction is reverse biased. A junction is said to be forward biased when a P-type semiconductor is connected with the positive terminal and N-type semiconductor is connected to the negative terminal. What is epitaxial growth of silicon?Silicon Epitaxial Growth Process. In wafer fabrication, silicon epitaxial deposition, or epitaxy, refers to the process of growing a thin layer of single-crystal silicon over a single-crystal silicon substrate. What is epitaxial layer in CMOS?Epitaxy growth consist of the formation of a layer of a single-crystal silicon on the surface of the silicon on the surface of the silicon material so that the crystal structure of the silicon is continuous across the interfaces. What is epitaxial structure?Epitaxial interfaces in solids are a special class of crystalline interfaces where the molecular arrangement of one crystal on top of another is defined by the crystallographic and chemical features of the underlying crystal.