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CD4051 Analog Multiplexer: Pinout, Feature, Datasheet

  • Contents

Description

The CD405xB analog multiplexers and demultiplexers are digitally-controlled analog switches having low ON impedance and very low OFF leakage current. These multiplexer circuits dissipate extremely low quiescent power over the full VDD – VSS and VDD – VEE supply voltage ranges, independent of the logic state of the control signals.

The CD4051B is a single 8-Channel multiplexer having three binary control inputs, A, B, and C, and an inhibit input. The three binary signals select 1 of 8 channels to be turned on, and connect one of the 8 inputs to the output.

Catalog

Description

Pinout Configuration and Function

CD4051 Block Diagram

Documents and Media

Features

Application

CD4051 Typical Application Circuits

Ordering & Quantity

Pinout Configuration and Function

CD4051 pinout

CD4051 Block Diagram

CD4051 block diagram

The logic diagram of CD4051 is composed of three parts: logic level conversion circuit, 8 select 1 decoding circuit and 8 CMOS switch units. A, B and C are 3-bit binary address input terminals, and 8 combinations of 3-bit binary can be used for selection 8 channels; INH is the address input prohibition terminal, when it is high, the address input terminal is invalid, that is, no channel is strobed. The input levels of A, B, C and INH are compatible with TTL. CD4051 has 8 input\output terminals, 1 output/input terminal, digital circuit power supply +E and -E1, analog circuit power supply +E and -E2. The main function of the logic level conversion circuit is to input the address A, B , C and address input inhibit terminal INH input TTL logic level is converted into CMOS level, so that the switch unit can be controlled by TTL level. The main function of the 8-to-1 address decoding circuit is to convert the address input signal from the logic level conversion circuit into the corresponding switch unit strobe signal and turn on the corresponding switch unit.

Documents and Media

Datasheet

CD405xB CMOS Single 8-Channel Analog Multiplexer/Demultiplexer with Logic-Level Conversion datasheet (Rev. I)

Features

  • Wide Range of Digital and Analog Signal Levels
    • Digital: 3 V to 20 V
    • Analog: ≤ 20 VP-P
  • Low ON Resistance, 125 Ω (Typical) Over 15 VP-P Signal Input Range for VDD – VEE = 18 V
  • High OFF Resistance, Channel Leakage of
    ±100 pA (Typical) at VDD – VEE = 18 V
  • Logic-Level Conversion for Digital Addressing Signals of 3 V to 20 V (VDD – VSS = 3 V to 20 V) to Switch Analog Signals to 20 VP-P (VDD – VEE = 20 V) Matched Switch Characteristics, rON = 5 Ω (Typical) for VDD – VEE = 15 V Very Low Quiescent Power Dissipation Under All Digital-Control Input and Supply Conditions, 0.2 µW (Typical) at
    VDD – VSS = VDD – VEE = 10 V
  • Binary Address Decoding on Chip
  • 5 V, 10 V, and 15 V Parametric Ratings
  • 100% Tested for Quiescent Current at 20 V
  • Maximum Input Current of 1 µA at 18 V Over Full Package Temperature Range, 100 nA at 18 V and 25°C
  • Break-Before-Make Switching Eliminates Channel Overlap

Application

  • Analog and Digital Multiplexing and Demultiplexing
  • A/D and D/A Conversion
  • Signal Gating
  • Factory Automation
  • Televisions
  • Appliances
  • Consumer Audio
  • Programmable Logic Circuits
  • Sensors

CD4051 Typical Application Circuits

1.CD4051, CH3130 multi-channel demodulator circuit diagram

This circuit is mainly composed of 8-channel analog switch CD4051 and voltage follower CH3130, etc. The input signal of the prohibition terminal "INH" of analog switch CD4051 is used to control the gating of voltage follower CH3130, thereby perform demodulation to multiple analog signals.

2. CD4051 constructs 32-channel circuit

Because the CD4051 has only eight input ports, four CD4051s are needed to build a 32-way multiplexer, labeled INH1, INH2, INH3, and INH4.

The 32-way multiplexer should have 5 control ports, of which the first three are the input ports of CD4051 and the last two are control ports. (Because CD4051 has three input ports), label them as D1, D2, D3, D4, D5 (00000—11111, 00000 channel 0, 11111 channel 31).

The basic idea is to realize the choice of 32 channel ports (0-7, 8-15, 16-23, 24-31) by selecting 4 CD4051s. If you choose the third CD4051, you can choose 16-23 (10000-10111) channel port.

However, the selection of CD4051 is achieved by controlling the INH level of each CD4051. For example, if you want to turn on the third CD4051, make its INH high (at this time D5=1, D4=0, then INH3=D5&! D4). Therefore, the choice of INH is achieved by controlling the logical relationship between D5 and D4. Where INH1=! D5&! D4;INH2=! D5&D4;INH3=D5&! D4;INH4=D5&D4.

 

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