In this article today, you will learn what transistor is, how does it work, how long is its history, and how many kinds of transistor are there, how to replace one when your transistor is broke and so many more. Say no more and off we go.     Catalog I. What is a Transistor? 1.1 General View 1.2 Transistor Structure and Operation II. Transistor History III. Transistor Development IV. Transistor Advantage V. Transistor Classification VI. Transistor Power Control VII. Transistor Test Replacement VIII. How to Judge the Electrode of a Transistor IX. Transistor Replacement Principle FAQ   I. What is a Transistor?   1.1 General View Transistors make our electronics world go round. They're critical as a control source in just about every modern circuit. Sometimes you see them, but more-often-than-not they're hidden deep within the die of an integrated circuit.    The transistor is a kind of solid semiconductor device. It has many functions, such as detection, rectifier, amplifier, switch, voltage stabilizer, signal modulation, and so on. As a variable current switch, transistors can control output currents based on input voltages. Unlike conventional mechanical switches (such as relay, switch), transistors use telecommunication signals to control their opening and closing, and the switching speed can be very fast, for example, the switching speed in the labs can be higher than 100GHz. Strictly speaking, transistors refer to all single components based on semiconductor materials, including diodes, transistors, field-effect transistors, silicon control, and so on. In addition, transistors usually mean crystal triodes.   The transistors are divided into two main categories: bipolar junction transistors (BJT) and field-effect transistors (FET).   The transistor has three poles. The three poles of bipolar junction transistor, composed of the emitter(made up of N-type and P-type), base, and collector respectively. For the field-effect transistors, they are the source, gate, and drain respectively.   Because the transistor has three polarities, there are also three ways to use them, namely, emitter grounding (called common emitter amplification, CE configuration), base grounding (called common base amplification, CB configuration), and collector grounding (called common set amplification, CC configuration, emitter-coupled logic). Transistors are semiconductor devices, which are commonly used as amplifiers or electrically controlled switches. Transistors are important components that regulate the operation of computers, mobile phones, and all electronic devices. Due to their high response speed and accuracy, transistors can be used for a wide variety of digital and analog functions design, including amplifiers, switches, and voltage stabilizers, signal modulation, and oscillator circuits. Transistors can be packaged independently or in a very small area, which can accommodate 100 million or more transistors integrated into a part of the circuit.   1.2 Transistor Structure and Operation   Transistors are made by stacking three different layers of semiconductor material together. Some of those layers have extra electrons added to them, which called “doping”, and others have electrons removed (doped with “holes” – the absence of electrons). A semiconductor material with extra electrons is called an N-type (negative) and a material with electrons removed is called a P-type (positive).    With some hand waving, we can say electrons can easily flow from N-regions to P-regions if they have a little force (voltage) to push them. But flowing from a P-region to an N-region is really hard (requiring more force—voltage).    The NPN transistor is designed to pass electrons from the emitter to the collector (the conventional current flows from collector to emitter). The emitter emits electrons into the base, which controls the number of electrons. In fact, most of the electrons emitted are “collected” by the collector, which sends them along to the next part of the circuit.   A PNP has a little special area. The base still controls current flow, but that current flows in the opposite direction, that is, from emitter to collector, instead of electrons, the emitter emits “holes” which are collected by the collector.   The transistor is kind of like an electron valve. The pin of the base is likely to a handle you can adjust to allow more or fewer electrons to flow from emitter to collector.     II. Transistor History   The invention of transistors can date back to the middle& later 1920s, an engineer Physicist Julius Edgar Lilienfeld filed a patent for a field-effect transistor (FET) in Canada in 1925, which was intended to be a solid-state replacement for the triode. Lilienfeld also filed identical patents in the United States in 1926 and 1928. However, it was limited to the technical level at the time, the material used to make it couldn’t meet the high-quality requirement, making it impossible to actually construct a working device at that time.   In December 1947, the first practically implemented device was a point-contact transistor invented by American physicists John Bardeen, Walter Brattain, and William Shockley from Bell Labs. Due to the complex manufacturing process of point-contact transistors, many products fail, and it also has disadvantages, such as high noise, difficulty to control when power is high and narrow application range. To overcome these shortcomings, Shockley put forward the idea of replacing metal-semiconductor contacts with a "rectifier junction", and they also proposed the working principle of it. The transistor revolutionized the field of electronics and paved the way for smaller and cheaper radios, calculators, and computers, among other things. The transistor is on the list of IEEE milestones in electronics, and Bardeen, Brattain, and Shockley shared the 1956 Nobel Prize in Physics for their achievement.   In 1950, the first P-N junction transistor came out, and its performance was exactly the same as the assumption of William Shockley. Most of today's transistors are still P-N junction transistors. (the so-called P-N junction is a combination of P-type and N-type, and P-type multiplex with holes, N-type multiplex with electrons.)   In the first test, it can amplify the audio signal 100 times, its shape is shorter than the firewood stick but thicker. In naming the device, Walter Brattain thought of its resistive conversion properties, that is, it works on a transfer current from "low-resistance input" to "high-resistance output," so it's called trans-resistor, later this abbreviated as a transistor.   The innovation of transistors was a major invention in the 20th century and the forerunner of the microelectronics revolution. Because the transistor is the key active component in practically all modern electronics. With it, a small, low-power-consuming electronic device can be used to replace a large, high-power-consuming electronic tube. What's more, the development of integrated circuits based on the invention of transistors.   In 2016, a team at Lawrence Berkeley National Laboratory broke the physical limit and cut the most sophisticated transistor process available from 14nm to 1nm, making a breakthrough in computing technology.   III. Transistor Development   1) vacuum triode In February 1939, there was a great discovery in the Bell Labs, the birth of a silicon PN junction. In 1942, a student, Seymour Benzer, was on a team led by Lark_Horovitz at Purdue University,  found that monocrystalline germanium has excellent rectifying performance which other semiconductors do not. These findings laid the groundwork for the later invention of transistors.    A triode is a vacuum tube with three electrodes which are cathode, anode, and a control grid. The function of an additional third electrode is to serve as an electrostatic screen that shields the cathode from the electrostatic field of anode triode is used for amplification of weak AC signals of frequency ranging from 0 to 100 MHz.   2) point-contact transistor The point-contact transistor is the first type of transistor to be successfully demonstrated. It was developed by research scientists John Bardeen and Walter Brattain at Bell Laboratories in December 1947. Bardeen and Brattain applied two closely-spaced gold contacts held in place by a plastic wedge to the surface of a small slab of high-purity germanium. The voltage on one contact modulated the current flowing through the other, amplifying the input signal up to 100 times. The group had been working together on experiments and theories of electric field effects in solid-state materials, with the aim of replacing vacuum tubes with a smaller device that consumed less power.   3) bipolar and unipolar transistors On the basis of bipolar transistors, Shockley put forward the concept of unipolar junction transistors in 1952, which is called junction transistors today. Its structure is similar to that of PNP or NPN bipolar junction transistors, but there is a depletion layer at the interface of P_N to form a rectifier contact between the gate and the conductive channels of source and drain. At the same time, both ends of the semiconductor as the gate to adjust the current between the source and drain.    4) silicon transistors The first working silicon transistor was developed at Bell Labs on January 26, 1954, by Morris Tanenbaum. The first commercial silicon transistor was produced by Texas Instruments in 1954. Silicon transistors and germanium transistors have the function of current amplification. The difference is that the threshold voltage(Even if the positive voltage is applied, it must reach a certain value before it can start to turn on. This is called threshold voltage, for silicon transistor, it is about 0.7V and for germanium transistor is about 0.3V) of silicon transistor is larger than that of germanium transistor; the reverse current of the silicon transistor is much smaller than that of the germanium transistor; the maximum operating temperature of the silicon transistor is higher than that of the germanium transistor; the stability of the silicon transistor is better than that of the germanium transistor.   5) integrated circuit (IC) After the invention of the silicon transistor in 1954, the great application prospect of the transistor has become more and more obvious. The next goal of scientists is how to connect transistors, conductors, and other devices efficiently. The invention of transistors gives birth to the integrated circuit as time requires. As we all know, an IC is a collection of electronic components—resistors, transistors, capacitors, etc.—all stuffed into a tiny chip and connected together to achieve a common goal today.   6) field-effect transistors(FET) and metal-oxide-semiconductor field-effect transistor(MOSFET) The field-effect transistor was first patented by Julius Edgar Lilienfeld in 1926 and by Oskar Heil in 1934, but practical semiconducting devices (the junction field-effect transistors) were developed later after the transistor effect was observed and explained by the team of William Shockley at Bell Labs in 1947. The basic principle of the field-effect transistor was first patented by Julius Edgar Lilienfeld in 1925. In 1959, Dawon Kahng and Martin M. (John) Atalla at Bell Labs invented the metal-oxide-semiconductor field-effect transistor (MOSFET) as an offshoot to the patented FET design. In 1962, Stanley, Heiman, and Hofstein in an RCA device integrated study group found that a MOS tube can be constructed by a conductive strip, a high-resistance channel region, an oxide layer, and an insulating layer on a Si substrate through diffusion and thermal oxidation.   7) CPU A central processing unit (CPU), also called a central processor or main processor, is the electronic circuitry within a computer that carries out the instructions of a computer program by performing the basic arithmetic, logic, controlling, and input/output (I/O) operations specified by the instructions. But fewer people know that modern CPUs contain millions of individual transistors that are microscopic in size. Because transistors are the building blocks of the integrated circuits, and more transistors in CPUs means higher processing efficiency.     IV. Transistor Advantage   Compared with the electron tube, the transistor has many advantages:   （1）Fewer consumption No matter how good an electron tube is, it will gradually deteriorate due to changes in cathode atoms and chronic gas leakage. For technical reasons, the same problem existed at the beginning of transistor fabrication. With advances in materials and improvements in many ways, transistors live typically 100 to 1000 times longer than electron tubes.   Consumption of electric energy is only 1/10 or dozens of times of the electron tube. It does not require heating the filament to produce free electrons like an electron tube. For example, a transistor radio can be listened to for half a year or more long with a few dry batteries, which is difficult for an electronic tube radio.   （2）No need to preheat Work as soon as you turn on the machine. For example, a transistor radio, you can hear the sound as soon as it turns on, and pictures come up quickly when turn on a transistor TV. But electron tube equipment cannot do this. Obviously, transistors have great advantages in electric equipment, medical treatment, industrial measurement, etc.   （3）Solid and reliable More reliable than the tube because of its shock resistance and vibration resistance. In addition, transistors release less heat due to their smaller size, so they can be used in small, complex, reliable circuits. Although the fabrication process of transistors is precise, the process is simple, it is helpful to increase the installation of it on the devices.   （4）Importance Transistors are the key active components in all modern electrical appliances. The importance of transistors in today's society is mainly due to their ability to use highly automated processes for mass production, which greatly reducing unit production costs.   While millions of monolithic transistors are still in use, but most transistors are assembled on microchips (chips) with diodes, resistors, and capacitors to make complete circuits. Analog or digital design or both are integrated on the same chip. The cost of designing and developing a complex chip is quite high, but the price per chip is minimal when the cost apportioned to millions of units.     V. Transistor Classification   According to material The semiconductor material used as a transistor can be divided into silicon material transistors and germanium material transistors. Furthermore, the polarity of the transistor can be divided into four types: germanium NPN transistors and PNP transistors, silicon NPN transistors, and PNP transistors.   According to craft Transistors can be divided into diffusion transistors, alloy type transistors, and planar transistors according to their structure and fabrication process.   According to the current capacity Transistors can be divided into low-power transistors, medium-power transistors, and high-power transistors by current capacity.   According to service frequency Transistors can be divided into low-frequency transistors, high-frequency transistors, and ultra-high-frequency transistors.   According to packaging Types The transistors can be divided into metal, plastic, glass, and ceramic packaging transistors.   According to applications Transistors can be divided into low noise amplification transistors, middle and high-frequency amplification transistors, low-frequency amplification transistors, switching transistors, Darlington transistors, high reversion voltage transistors, damping transistors, phototransistors, and magnetic sensitive transistors, and so on.   The low cost, flexibility, and reliability of transistors make them the general choice for non-mechanical tasks, such as digital computing. In the control of electric appliances and machinery, transistor circuits are also replacing motor equipment because of its lower cost and high efficiency.   Specific Types Expressions   1) transistors It is a semiconductor device with two PN junctions inside and usually three eliciting electrodes outside. The transistor is divided into two main categories: bipolar junction transistor (BJT) and field-effect transistor (FET), which have slight differences in their application in a circuit. A bipolar junction transistor has terminals labeled base, collector, and emitter. A small current at the base terminal (that is, flowing between the base and the emitter) can control or switch a much larger current between the collector and emitter. For a field-effect transistor, the terminals are labeled gate, source, and drain, and voltage at the gate can control the current between source and drain.   2) giant transistor The power transistor is a high voltage, high current bipolar transistor (Bipolar Junction Transistor-BJT), so it is sometimes called Power BJT; its characteristics are: high voltage, high current, good switching characteristics, but the driving circuit is complex, driving power is large; the principle of GTR and ordinary bipolar junction transistor is the same.   3) phototransistor The phototransistor is a device that is able to sense light and alter the current flowing between emitter and collector according to the level of light it receives.   Phototransistors and photodiodes can both be used for sensing light, but the phototransistor is more sensitive in view of the gain provided by the transistor. This makes phototransistors more suitable in a number of applications.   Phototransistors adopt the basic transistor concept as the basis of their operation. In general, a phototransistor can be made by exposing the semiconductor of an ordinary transistor to light. Phototransistors were made by not covering the plastic encapsulation of the transistor with black paint in the early stage.   4) bipolar transistor This is a transistor widely used in audio circuits. The bipolar means the flow of current in two kinds of semiconductor materials. Bipolar transistors can be divided into NPN type or PNP type according to the polarity of operating voltage.    5) bipolar junction transistor—BJT The bipolar junction transistor (BJT) is a type of transistor that uses both electron and hole charge carriers. On the contrary, unipolar transistors, such as field-effect transistors, only use one kind of charge carrier. For their operation, BJTs use two junctions between two semiconductor types, N-type and P-type.   BJTs have two types, NPN and PNP, and are available as individual components, or fabricated in integrated circuits, often in large numbers.   BJTs have an amplification function, concretely, they can amplify current, mainly depending on its emitter current transmission through the base area to the collector. To ensure this transmission process, on the one hand, it requires to meet the internal conditions, that is, the impurity concentration in the emission region needs much larger than the impurity concentration in the base region, and meanwhile, the thickness of the base region should be very small.   On the other hand, the external conditions should be satisfied, that is, the emission junction should be positive bias (adding positive voltage), and the collector junction should be inversely biased. This allows BJTs to be used as amplifiers or switches, giving them wide applicability in electronic equipment, including computers, TVs, mobile phones, audio amplifiers, industrial control, radio transmitters, and so on.   There are many kinds of BJT, according to frequency, high frequency, low frequency, according to power, small, medium, high power, according to the semiconductor material, silicon, and germanium tube. The amplifier circuit consists of the common emitter, common base, and common collector.   6) field-effect transistor(FET) The meaning of "field effect" is that the principle of the transistor is based on the electric field effect of the semiconductor. The field-effect refers to the modulation of the electrical conductivity of a material by the application of an external electric field.   There are two main types of FET: junction FET (JFET) and metal-oxide-semiconductor FET (MOS-FET). Unlike BJT, FET is conducted by only one carrier, therefore, it is also known as a unipolar transistor. It belongs to voltage-controlled semiconductor devices that have the advantages of high input resistance, low noise, low-power consumption, wide dynamic range, easy integration, no secondary breakdown, wide safe working area, and so on.   In a metal, the electron density that responds to applied fields is so large that an external electric field can penetrate only a very short distance into the material. However, in a semiconductor, the lower density of electrons (and possibly holes) that can respond to an applied field is sufficiently small that the field can penetrate quite far into the material. This field penetration alters the conductivity of the semiconductor near its surface and is called the field effect. The field-effect underlies the operation of the Schottky diode and of field-effect transistors, notably the MOSFET, the JFET, and the MESFET.   The field effect is to change the direction or magnitude of the applied electric field perpendicular to the surface of the semiconductor to control the density or type of most carriers in the conducting layer (channel) of the semiconductor. The current in the channel is modulated by voltage, and the working current is transported by most carriers in the semiconductor. This type of transistor, which has only one polar carrier to conduct electricity, is also called a unipolar transistor.    Compared with bipolar transistors, FET is widely used in various amplifiers, digital circuits, and microwave circuits because of its high input impedance, low noise, high limit frequency, low power consumption, simple manufacturing process, and good temperature characteristics.    7) static induction transistor The static induction transistor(SIT), which was born in 1970, is actually a junction field-effect transistor. A high-power SIT device can be made by changing the transverse conductive structure of a small-power SIT device used for information processing into a vertical conductive structure. The operating frequency of SIT is comparable to that of the power MOSFET, or even higher than that of the electric MOSFET. The power capacity is also larger than the power MOSFET, so it is suitable for high-frequency and high-power devices. At present, it has been used in radar communication equipment, ultrasonic power amplification, pulse power amplification, and high-frequency induction heating, and so on.   However, the SIT is conducted when no signal is added to the gate, and the gate is turned off when the negative bias is applied, which is called the normal on-type device, thus it is inconvenient to use. In addition, due to the large on-state resistance and consumption of SIT, it has not been widely used in most power electronic devices.   8) single-electron transistor A kind of transistor that can record signals with one or a small number of electrons. With the development of semiconductor etching technology, more and more large-scale integrated circuits can be made. It is considered an important component of nanotechnology, single-electron transistors provide high operating speed and low power consumption.   Single-electron transistors are usually made by keeping two tunnel junctions in series. The transistor consists of a source electrode and a source-drain, which is joined with the help of a tunneling island that is also connected to a gate capacitively. The electrons can flow to another electrode only through the insulator. There are two categories of single-electron transistors: metallic and semiconducting. The former makes use of a metallic island, and its electrodes using a shadow mask are mostly evaporated onto an insulator. The latter, on the contrary, depends on severing the two-dimensional electron gas that forms at the interface of the semiconductors for the junction.   Insulated-gate bipolar transistor(IGBT) is also a three-terminal device: gate, collector, and emitter. It combines the advantages of the giant transistor and power MOSFET. Therefore, it is widely used in many fields due to its sound characteristics.   a. main parameters The main parameters of the transistor include current magnification factor, dissipation power, frequency characteristic, maximum collector current, maximum reverse voltage, reverse current, and so on.   b. amplification coefficient DC current magnification factor also called static current magnification factor or DC magnification factor. It refers to the ratio of transistor collector current to base current, which is usually expressed by hFE or β when the static signal input is not changed.   c. ac magnification AC magnification also called AC current magnification factor or dynamic current magnification factor. It refers to the ratio of transistor collector current variation to base current variation in AC state. In addition, the two parameters are close at a low-frequency state.   d. dissipation power Dissipation power is also called the maximum allowable dissipation power of the collector, which refers to the maximum dissipation power of the collector when the transistor parameter does not exceed the prescribed allowable value.   The dissipation power is closely related to the maximum allowable junction and collector current of the transistor. The actual power consumption of transistors is not allowed to exceed the maximum allowable dissipation power value, otherwise, the transistor will be damaged by overload.   The transistor whose dissipation power is less than 1W is usually called the low-power transistor, that value is equal to or greater than 1W, and less than 5W, such transistor is called the medium-power transistor; whose value is equal to or greater than 5W is called the high-power transistor.   When the operating frequency of the transistor exceeds the cutoff frequency fβ or fα, the current amplification factor β will decrease with the increase of characteristic frequency fT(fT refers to the operating frequency of the transistor when the β value is reduced to 1).   Usually, the transistors whose fT is less than or equal to 3MHZ are called low-frequency transistors; transistors whose fT is greater than or equal to 30MHZ are called high-frequency transistors; those whose fT is greater than 3MHZ and less than 30MHZ are called intermediate frequency transistors.   e. maximum frequency fM The maximum oscillation frequency is the corresponding frequency when the power gain of the transistor is reduced to 1. In general, the maximum oscillation frequency of high-frequency transistors is lower than the common base cutoff frequency fα, while fT is higher than the cutoff frequency fα of the common base and lower than the cutoff frequency fβ of the common collector.   f. maximum current Collector maximum current is the maximum current allowed by transistor collector. When the collector current of the transistor exceeds it, the β value of the transistor will change obviously, which will affect the normal operation of the transistor and even damage it.   g. maximum reverse voltage Maximum reverse voltage is the maximum operating voltage that the transistor is allowed to apply. It includes collector-emitter reverse breakdown voltage, collector-base reverse breakdown voltage, and emitter-base reverse breakdown voltage.   (1) Collector-collector reverse breakdown voltage This voltage refers to the maximum allowable reverse voltage between the collector and emitter when the base of the transistor is open circuit, usually expressed in VCEO or BVCEO.   (2) Base-base reverse breakdown voltage This voltage refers to the maximum allowable reverse voltage between the collector and the base when the transistor emitter is open circuit, expressed in VCBO or BVCBO.   (3) Emitter-emitter reverse breakdown voltage This voltage refers to the maximum allowable reverse voltage between the emitter and the base when the collector of the transistor is open circuit, expressed in VEBO or BVEBO.   (4) ICBO: reverse current between collector and base electrodes ICBO, also called collector junction reverse leakage current. It refers to the reverse current between collector and base when the emitter of the transistor is open circuit. ICBO is sensitive to temperature, thus the smaller the value is, the better the temperature characteristic of the transistor is.   (5) ICEO: the reverse breakdown current between collector and emitter refers to the reverse leakage current between the collector and emitter when the base of the transistor is open. The smaller the current, the better the performance of the transistor.   h. switches It is a most fundamental application of a transistor is using it to control the flow of power to another part of the circuit, that is, using it as an electric switch. Applying it in either cutoff or saturation mode, the transistor can create the binary on/off the effect of switches.   A transistor switch is a critical circuit-building block; it is used to make logic gates, which go on to create microcontrollers, microprocessors, and other integrated circuits.   VI. Transistor Power Control   Today's power transistors can control hundreds of kilowatts of power, and using power transistors as switches has many advantages, mainly as follows:   (1) Easy to turn off and few auxiliary components needed. (2) The switching speed is quick and works at a very high frequency. (3) The voltage resistance range is wide.     Performance improvement of power transistors. Such as:   (1) An increase in the effective working area of switching transistors. (2) Technical processing simplification. (3) Recombination of transistors. (4) The progress of base driving technology for the high power switch. Today's base driving circuits not only drive power transistors but also protect power transistors, which are called "non-centralized protection" (as opposed to centralized protection). The functions of the integrated drive circuit include:   (1) Turning-on and turning-off power switches. (2) Monitoring auxiliary power supply voltage. (3) Limiting maximum and minimum pulse width. (4) Thermal protection. (5) Monitoring saturation voltage drop of switches.     VII. Transistor Test Replacement   The transistors in the circuit mainly include crystal diode, transistor, thyristor, field-effect transistor, and so on. The most commonly used transistor and diodes are the transistor and diode. How to correctly judge the good or bad of the transistors is one of the keys to maintenance.   The key function of an ideal diode is to control the direction of current flow. Current passing through a diode can only go in one direction, called the forward direction. Currently trying to flow the reverse direction is blocked. They’re like the one-way valve of electronics.   If the voltage across a diode is negative, no current can flow, and the ideal diode looks like an open circuit. In such a situation, the diode is said to be off or reverse biased.   As long as the voltage across the diode isn’t negative, it’ll “turn on” and conduct current. Ideally, a diode would act like a short circuit (0V across it) if it was conducting current. When a diode is conducting current it’s forward biased (electronics jargon for “on”).   First of all, we should know whether the diode belongs to a silicon tube or a germanium tube. The forward voltage drop of the germanium tube is generally between 0.1~0.3V, while that of the silicon tube is generally between 0.6~0.7V. The method of measurement is as follows: two multimeters are used. one multimeter is used to measure the forward resistance and another multimeter is measuring the voltage drop of its tube. Therefore, whether germanium tube or silicon tube can be judged according to the voltage drop values. In addition, the greater the difference between the positive and negative resistance of the measured diode, the better.    For example, the forward resistance is several hundred or thousands of ohms, and the reverse resistance is more than tens of kilos, it can be concluded that the diode is good. And meanwhile, the positive and negative electrodes of the diodes can be determined: when the measured resistance values are hundreds of ohm or thousands of ohm, it indicates that is the positive resistance. In addition, if the forward and backward resistance is infinite, it indicates the internal breakage; if the forward and backward resistance is the same, there is also a problem with such a diode; and the forward and backward resistance is zero to indicate the short circuit.   Crystal Triode: It mainly plays an amplification role, so how to determine the amplification capacity? The method is as follows: the multimeter is adjusted to the level R×100 or R×1K. When the NPN tube is measured, the positive meter pen is connected with the emitter and the negative meter pen is connected with the collector, the finally measured value should be thousands of ohm. Then a 100kΩ resistor is connected in series between the base and collector, and the resistance measured by the multimeter should be significantly reduced. The greater the change, the stronger the amplification ability of the transistor. If the change is small or no change at all, that means the transistor does not have amplification ability or this ability is very weak.     VIII. How to Judge the Electrode of a Transistor   Using R×100 level of multimeter germanium transistors to measure and for silicon transistors is R×1K. The red meter pen is in contact with an electrode, and the other two electrodes are measured by a black meter pen. If you can’t find two small resistors, you can move the red meter pen to the other electrodes to measure continuously. Neither works, you can move the black meter pen.   When two small resistors are found, the measuring electrode of the fixed meter pen is the base. If the fixed meter pen is a black pen, the transistor is the NPN type, and if the fixed one is a red pen, the transistor is a PNP type.     A. method for judging resistances of collector and emitter A multimeter is used to measure the resistance at the extreme poles of the base removal, and the exchange meter pen is measured twice. In the case of a germanium tube, the smaller resistance is measured for the first time. In the case of the PNP type, the black meter pen is connected to the emitter, and the red meter pen is connected with a collector electrode as if it is an NPN type. The black meter pen is connected to the collector, the red meter pen is connected to the emitter; If it is a silicon tube, the first time the measured resistance is larger if it is PNP type, the black meter pen is connected with the emitter, the red meter pen is connected with the collector, if the type is NPN, the black meter pen is connected with the collector, and the red meter pen is connected with the emitter.   B. PN junction forward resistance method Measuring the forward resistance of two PN junctions, the value of the emitter is larger and the value of the collector is smaller.   C. amplification coefficient method Using the two-meter pens of the multimeter to contact the two electrodes except for the base, if it is PNP, using the finger to touch the base and the electrode that red meter pen connected to see the swing of the pointer. Change the meter pens to test again, selecting the large swing. At this time, the electrode of the red meter pen connected is the collector. If it is NPN, using the finger to touch the base and the electrode that the red meter pen connected to see the swing of the pointer. Change the meter pens to test again, selecting the large swing, at this time, the electrode of the black meter pen connected is the collector.   Note: The between analog multimeter and the digital multimeter is different. For the analog multimeter, the red meter pen is connected to the negative pole of the power supply, whereas the digital meter is the opposite.     IX. Transistor Replacement Principle   The replacement principle of transistors can be summarized as three: same type, similar characteristics, and similar appearance.   One—same type 1.The material is the same, that is, the germanium tube replaces the germanium tube, silicon tube replaces the silicon tube.   2.The polarity is the same, that is, NPN-type tube replaces NPN-type tube and PNP-type tube replaces PNP-type tube.    Two—similar characteristics The characteristics of the transistors used for replacement should be similar to those of the original transistors, and their main parameter values and characteristic curves should not differ much.    1. Maximum DC dissipation power (PCM) of collector board   PCM of the replaced transistor is generally required to be equal to or larger than the original transistor. However, in a practical test, if the actual DC dissipation power of the original transistor in the whole circuit is much smaller than its PCM, it can be replaced by a transistor with a smaller PCM.   2. Maximum allowable DC current (icm) of collector   Icm of replacing transistor is generally required to be equal to or larger than the original transistor.   3. Breakdown voltage   Transistors for replacement must be able to withstand the maximum operating voltage throughout the machine.   4. Frequency characteristics   The frequency characteristic parameters of transistors are as follows:   (1) characteristic frequency ft: it refers to the frequency when the test frequency is high enough of the common emitter current magnification factor. (2) cutoff frequency fb: When replacing transistors, the main consideration is ft and fb. Transistors usually required for replacement should not be less than the corresponding ft and fb of the original one.   5. Other parameters   In addition to the above main parameters, for some special transistors, the following parameters should be taken into consideration when replacing:   (1) For low noise transistors, transistors with small or equal noise coefficients should be used in replacement. (2) For transistors with automatic gain control performance, transistors with the same automatic gain control characteristics should be used during replacement. (3) For the switch tube, the related switching parameters should be considered when replacing the switch tube.    Three—similar appearance The small power transistors are similar in shape, so long as the lead line of each electrode is marked clearly, and the order of the lead line is the same as that of the tube to be changed, it can be replaced. The appearance of high-power transistors is quite different. In order to install well and maintain normal heat dissipation conditions, the transistors with similar appearance and same size should be selected for replacement.   FAQ   1. What is a transistor and how does it work? A transistor is a miniature electronic component that can do two different jobs. It can work either as an amplifier or a switch: When it works as an amplifier, it takes in a tiny electric current at one end (an input current) and produces a much bigger electric current (an output current) at the other.   2. What are transistors used for? Transistor, semiconductor device for amplifying, controlling, and generating electrical signals. Transistors are the active components of integrated circuits, or “microchips,” which often contain billions of these minuscule devices etched into their shiny surfaces.   3. What is transistor and its types? Transistors are a three terminal semiconductor device used to regulate current, or to amplify an input signal into a greater output signal. ... There are a varieties and different types of transistors available in today's market including Bipolar, Darlington, IGBT, and MOSFET Transistors.   4. What is the principle of transistor? A transistor consists of two PN diodes connected back to back. It has three terminals namely emitter, base and collector. The basic idea behind a transistor is that it lets you control the flow of current through one channel by varying the intensity of a much smaller current that's flowing through a second channel.   5. What are the two main applications of transistor? Transistors are commonly used in digital circuits as electronic switches which can be either in an "on" or "off" state, both for high-power applications such as switched-mode power supplies and for low-power applications such as logic gates.   6. What is PNP and NPN transistor? In an NPN transistor, a positive voltage is given to the collector terminal to produce a current flow from the collector to the emitter. In a PNP transistor, a positive voltage is given to the emitter terminal to produce current flow from the emitter to collector.   7. Why is more transistors better? By squeezing more transistors into a smaller space, a microprocessor can be produced which does more work in less time (more powerful). It also allows one chip to perform more functions - what used to require several chips can all fit into one chip.   8. How do you read a transistor? The typical format for the transistor is a digit, letter and serial number. The first digit is the number of leads minus one. An ordinary bipolar transistor has three leads, so the first digit for it will be 2. The letter N is for semiconductors, so this will be the letter written on a transistor using this system.   9. How do you connect two transistors together? Two NPN transistors can be connected in series with the collector of the lower transistor connected to the emitter of the upper transistor, figure 4, which provides a way to switch off the load from two different signals. Either input can turn off the load but both need to be on for the load to be on.   10. Are smaller transistors faster? The smaller the transistor, the smaller the gate, and the less charge you have to move around. Fourth, you can make the chip faster. The FET effect is not instantaneous, there is a propogation delay involved. Smaller transistors have a shorter delay, so you can operate at higher clock frequencies.     You May Also Like Basic IGBT Tutorial: Short-circuit Protection and Driving Circuit

When a global leader in providing equipment, services and software used for manufacturing semiconductors makes an announcement, industry players sit up and listen, as the technologies are going to impact market activity in devices such as smartphones, flat screen TVs and solar panels. Tuesday's announcement from Applied Materials was big. The Santa Clara, California based equipment supplier announced the launch of its Endura Volta CVD Cobalt chip making machine. This is the only tool capable of encapsulating copper interconnects in logic chips beyond the 28nm node by depositing precise, thin cobalt films, said the company. The news is in the word "cobalt." The company sees cobalt as a superior metal encapsulation film. "Applied Materials announced that the Endura Volta CVD Cobalt system represents the first material change in more than 15 years of copper barrier/seed (CuBS) development, "a new materials era" for extending copper interconnect technology. It is not only the first material change but an important change in materials for microchip wiring. Actually, the news is in the word "cobalt" and in the word "wiring." The reliability and performance of the wiring that connects the billions of transistors in a chip is critical to achieve high yields for device manufacturers. "As wire dimensions shrink to keep pace with Moore's Law, interconnects are more prone to killer voids and electromigration failures," said Dr. Randhir Thakur, executive vice president and general manager of the Silicon Systems Group at Applied Materials.Writing in the Applied Materials blog, Kavita Shah, global product manager, commented on the announcement: With today's dimensions, she said, "it becomes exceptionally difficult to achieve perfect copper fill in 100% of the trenches and vias that make up the circuitry of a device. Other performance-degrading effects, such as electro-migration, which can cause movement of copper that leaves voids in the wiring, also become significantly more problematic. The smallest defect can kill a device; interconnect performance and reliability begin to suffer under these conditions."The announcement said that complete envelopment of copper lines with cobalt creates an engineered interface that demonstrates over 80x improvement in device reliability.Writing in The Wall Street Journal, Don Clark said the company has announced a way "to head off defects that are becoming a stumbling block as manufacturers keep shrinking the size of transistors that act as tiny switches on chips." Customers who want to make the shift will buy the production machine to apply the cobalt, using a process called chemical vapor deposition (CVD).According to the article, Sundar Ramamurthy, Applied's vice president and general manager of metal deposition products. said 75 of the CVD chambers for processing individual wafers are already in customer hands for testing purposes. Clark said, "The machines aren't likely to be introduced in large volumes "until manufacturers are ready for their next process change to create smaller transistors."    

Vendors and consumers can agree: connectivity matters, and not just poetically speaking, or in the context of social networking. As for many, staying digitally connected is quite real a requirement and has become a lifeline of its own, in terms of ability to do work and in terms of access to vital information. San Diego-based Ethertronics is a business that provides connectivity via antenna and RF systems solutions. On Tuesday the company announced news of an active steering IC, with embedded processor for Multiple Input Multiple Output (MIMO) applications. This is the EC482, with potential impact on cable and satellite markets. The company said its team can integrate EC482 products, including access points, set-top boxes, WiFi clients, WiFi extenders, wearables and other Internet of Things (IoT) devices.Translating what this means, Gigaom's senior writer Kevin Fitchard, who covers mobile broadband, carriers and wireless technologies, said that the new chip from Ethertronics "will bring its active steering algorithms to Wi-Fi antennas, increasing their range and boosting their throughput in less than optimal conditions." Ethertronics Chief Scientist Jeff Shamblin told Firchard that with the new version of the EtherChip, "active steering helps signals navigate multiple walls and ceilings which often separate a router from a Wi-Fi device."Quoted in RCR Wireless News, Shamblin, referring to the Active Steering technology, said, "Now that we can dynamically control the radiation pattern, not only can we improve the communication link you're trying to establish, we can start to null out interfering sources, so it brings interference mitigation."The EE Times explained that the company was leveraging its experience developing embedded antennas to create a line of dedicated beamforming chips. "Algorithms on EC482's processor monitor RF link performance on a wireless device to generate up to four radiation patterns and select the optimal antenna for the best performance," wrote Jessica Lipsky, associate editor. "The company's EtherChip EC482 aims to improve RF signal for Wi-Fi and 5 GHz backend applications."The company said the EtherChip EC482 had "superior single- and multi-antenna performance at frequencies even beyond the WiFi high-band." The operating frequency range is 100 MHz to 7000 MHz. The small footprint is just 3.0 x 3.0 x 0.75 mm3 in a QFN 24-pin package. Very low power consumption is required for operation, said the news release, which makes the EC482 suitable for even battery-operated systems.Ethertronics will show its new EtherChip EC482 and "Active Steering" solutions during Mobile World Congress next month in Barcelona.Laurent Disclos, Ethertronics CEO, shared his predictions in January for the new year in RCR Wireless News. "Regardless of the application – streaming a favorite show via a 5 GHz set-top box, keeping tabs on one's health via a wearable, or simply placing a voice call via a smartphone – the antenna is the only RF sensor in a wireless device, and those of us working to make that heartbeat stronger will have an exciting year in 2015, and beyond." 

Sony's advance in image sensors appears quite natural: the company has developed a set of curved CMOS image sensors based on the curvature of the eye. A report on the sensors in IEEE Spectrum said that, "in a bit of biomimicry," Sony engineers were able to achieve a set of curved CMOS image sensors using a "bending machine" of their own construction.Sony's Kazuichiro Itonaga, a device manager, reported on the new development in Hawaii, at the 2014 Symposia on VLSI Technology and Circuits. This is a conference on semiconductor technology and circuits, which took place from June 9 to June 13.It was unclear how much the chips were curved, said IEEE Spectrum, although Itonaga said they did achieve the same level of curvature found in the human eye. The curved systems were 1.4 times more sensitive at the center of the sensor and twice as sensitive at the edge, according to the Sony engineers.According to IEEE Spectrum, "Photodiodes at the periphery of a sensor array will be bent toward the center, which means light rays will hit them straight on instead of obliquely. What's more, the strain induced on a CMOS sensor by bending it alters the band gap of the silicon devices in the sensor region, lowering the noise created by 'dark current'—the current that flows through a pixel even when it is receiving no external light." A curved CMOS sensor has an edge over a planar sensor, Itonaga noted. Considering its geometry, it can be paired with a flatter lens and larger aperture, which lets in more light.Two chips were reported. First, there was a full-size chip that measured some 43 millimeters along the diagonal, suitable for a camera. A smaller chip with smaller pixels suitable for mobile phones was also reported. Gizmodo said the 43mm was possibly to suit a follow-up to the RX1 compact camera. There is no date yet on when the sensors will make their way into consumer products, but IEEE Spectrum said the team made about 100 full size sensors with their bending machine. No official word yet on when the sensors will show up in products for sale has not deterred speculations on how and where they might appear. SonyAlphaRumors said the full frame curved sensor is likely to come on the new RX2. No matter when, PetaPixel a photography blog, said on Friday that the curved full-frame sensor promises to be "an impressive leap forward in digital imaging technology:" 

Samsung Electronics announced today that it has begun mass producing the industry's first 10-nanometer (nm) class, 8-gigabit (Gb) DDR4 (double-data-rate-4) DRAM chips and the modules derived from them. DDR4 is quickly becoming the most widely produced memory for personal computers and IT networks in the world, and Samsung's latest advancement will help to accelerate the industry-wide shift to advanced DDR4 products.Samsung opened the door to 10nm-class DRAM for the first time in the industry after overcoming technical challenges in DRAM scaling. These challenges were mastered using currently available ArF (argon fluoride) immersion lithography, free from the use of EUV (extreme ultra violet) equipment.Samsung's roll-out of the 10nm-class (1x) DRAM marks yet another milestone for the company after it first mass produced 20-nanometer (nm) 4Gb DDR3 DRAM in 2014."Samsung's 10nm-class DRAM will enable the highest level of investment efficiency in IT systems, thereby becoming a new growth engine for the global memory industry," said Young-Hyun Jun, President of Memory Business, Samsung Electronics. "In the near future, we will also launch next-generation, 10nm-class mobile DRAM products with high densities to help mobile manufacturers develop even more innovative products that add to the convenience of mobile device users."Samsung's leading-edge 10nm-class 8Gb DDR4 DRAM significantly improves the wafer productivity of 20nm 8Gb DDR4 DRAM by more than 30 percent.The new DRAM supports a data transfer rate of 3,200 megabits per second (Mbps), which is more than 30 percent faster than the 2,400Mbps rate of 20nm DDR4 DRAM. Also, new modules produced from the 10nm-class DRAM chips consume 10 to 20 percent less power, compared to their 20nm-process-based equivalents, which will improve the design efficiency of next-generation, high-performance computing (HPC) systems and other large enterprise networks, as well as being used for the PC and mainstream server markets.The industry-first 10nm-class DRAM is the result of Samsung's advanced memory design and manufacturing technology integration. To achieve an extremely high level of DRAM scalability, Samsung has taken its technological innovation one step further than what was used for 20nm DRAM. Key technology developments include improvements in proprietary cell design technology, QPT (quadruple patterning technology) lithography, and ultra-thin dielectric layer deposition.Unlike NAND flash memory, in which a single cell consists of only a transistor, each DRAM cell requires a capacitor and a transistor that are linked together, usually with the capacitor being placed on top of the area where the transistor rests. In the case of the new 10nm-class DRAM, another level of difficulty is added because they have to stack very narrow cylinder-shaped capacitors that store large electric charges, on top of a few dozen nanometer-wide transistors, creating more than eight billion cells.Samsung successfully created the new 10nm-class cell structure by utilizing a proprietary circuit design technology and quadruple patterning lithography. Through quadruple patterning, which enables use of existing photolithography equipment, Samsung also built the core technological foundation for the development of the next-generation 10nm-class DRAM (1y).In addition, the use of a refined dielectric layer deposition technology enabled further performance improvements in the new 10nm-class DRAM. Samsung engineers applied ultra-thin dielectric layers with unprecedented uniformity to a thickness of a mere single-digit angstrom (one 10 billionth of a meter) on cell capacitors, resulting in sufficient capacitance for higher cell performance.Based on its advancements with the new 10nm-class DDR4 DRAM, Samsung expects to also introduce a 10nm-class mobile DRAM solution with high density and speed later this year, which will further solidify its leadership in the ultra-HD smartphone market.While introducing a wide array of 10nm-class DDR4 modules with capacities ranging from 4GB for notebook PCs to 128GB for enterprise servers, Samsung will be extending its 20nm DRAM line-up with its new 10nm-class DRAM portfolio throughout the year. Explore futher: Samsung’s Galaxy S7 -- A Tale of Two Image Sensors  

IntroductionWhat is the IC package? To put it simply, chip packaging is the process of placing a bare integrated circuit chip produced in a foundry on a load-bearing substrate, leading the pins out, and then fixing the package as a whole. It is analogous to the chip's shell, which can wrap, fix, and seal the chip to protect it from external forces such as water, air, moisture, chemicals, and so on.With the continuous improvement of IC packaging, there are more and more types of IC packaging. Various IC packaging packages types, names, logos, etc. can sometimes be confusing. This blog will give you a brief introduction to IC packaging related content, which mainly includes the following three parts: common IC brand identification, IC package terminology, classification of IC packaging, and hope to help you further effectively distinguish and understand IC packaging. Catalog IntroductionEvolution of IC Packaging TypeIC Packaging Types10 Common IC Brand Identification71 kinds of IC package terminology   explainedFAQ Evolution of IC Packaging TypeIn the early stage of the development of chip packaging, there are mainly two types: 1. Through-hole package2. Surface mount packageThrough hole package mainly includes Dual In-line Package (DIP), Transistor Outline (TO), Pin Grid Array (PGA) and so on. Through-hole packageSurface mount package includes TO-252 (D-PAK), Small-Outline Transistor (SOT), Small Outline Package (SOP), Plastic Quad Flat Package (QFP), Plastic Leaded Chip Carrier (PLCC) and so on.Surface mount packageDue to the increasing demand of the surface mount market, the earlier through-hole TO packaging has also begun to develop to the surface mount mode. For example, DPAK packaging, which is easy for many people to confuse, actually refers to TO-252, D2PAK refers to TO-263 and D3PAK refers to TO-268.In the middle and later stage, chip packaging began to enter the era of area array packaging. During this period, packaging types such as Ball Grid Array Package (BGA), Chip Scale Package (CSP), Quad Flat No-lead Package (QFN) and Multi-Chip Module (MCM) began to become popular.With the further development of packaging technology, some chips have begun to adopt the latest three-dimensional stacking packaging technology. IIC Packaging TypesAccording to the different port direction, the common IC packages can be divided into four categories: unilateral, bilateral, four-sided and matrix and several types can be subdivided from the above four categories according to different packaging forms and port shapes. Please refer to the following table for details. IC packaging types In addition, according to the material medium, IC packaging can also be divided into metal, ceramic, plastic and other types, generally distinguished by prefix. For example, "C" refers to ceramic package, "H" refers to package with heat sink and "P" refers to plastic package. 10 Common IC Brand IdentificationMany integrated circuit models’ prefix is often the abbreviation of the manufacturer's name. If you see the following prefix model, you might as well check the corresponding brand first. Of course, this method is not entirely feasible. So you still have to refer to the PDF file of the specific product according to the actual situation.1. AMDThose prefixed with AM are all AMD products, and there are also some confusion between the prefix PAL, CYPRESS and TI. The specific situation should be determined by checking the information.2. ATMELThose prefixed with AT are ATMEL products.3. CYPRESSThose prefixed with CY are all CYPRESS products, and some of them are confused with prefix PALC, PALCE and TI.4. NSCThose prefixed with DM, LF, LM, DS, etc., are basically NSC products. NSC has many product series with other prefix, but the specific situation should be determined by checking the information.5. AD：Those prefixed with AD, OP are AD brand. AD has many other series, such as prefix: DAC, ADG, ADSP and many other series.6. INTERSIL：Those prefixed with HI1, HI2, HI3, HI4, HA1, HA2, HA3, HA4, CA, ICL, ICM, ID, IS, etc., are INTERSIL products. There is also some confusion between prefix MD and INTEL.7. IDT：The prefix for IDT products is almost the prefix IDT.8. MAXThe prefix for MAX products is almost the prefix MAX.9. AGILENTCommon prefixes are HCPL, HDSP, HSSR, and so on.10. ALTERAThe prefix for ALTERA products is almost the prefix for EPM. IC package Figure (105 kinds in total)71 kinds of IC package terminology explainedStill not sure what some IC packaging terms mean exactly? Here is a list of 71 common IC packaging terms for you.1. BGA (Ball Grid Array)BGA is one of the surface mount packages. Spherical bumps are made on the back of the printed substrate to replace pins. LSI chips are assembled on the front of the printed substrate, and then sealed by molding resin or filling method. It is also known as Pad Array Carrier (PAC) and the number of pins can exceed 200. It is a kind of package for multi-pin LSI.The package was developed by Motorola and was first used in portable phones and other devices. 2. BQFP (Quad Flat Package with Bumper)BQFP is one of the QFP packages that is provided with protrusions (cushions) at the four corners of the package body to prevent bending deformation of the pins during transportation. American semiconductor manufacturers mainly use this package in microprocessors and Asic circuits. The center distance of the pin is 0.635 mm, and the number of pins ranges from 84 to 196. (see QFP). 3. Butt Joint PGA (Butt Joint Pin Grid Array)Butt Joint PGA is an alias for surface mount PGA (see Surface Mount PGA) 4. C- (Ceramic)C- is a mark that represents a ceramic package and is often used in practice. For example, CDIP represents Ceramic DIP. 5. CerdipThe Ceramic Dual In-line Package sealed with glass is for circuits such as ECL RAM, DSP (Digital Signal Processor). Cerdip with glass window is used for ultraviolet erasing EPROM and microcomputer circuit with EPROM. The center distance of the pin is 2.54 mm, and the number of pins ranges from 8 to 42. In Japan, this package is represented as DIP-G (G means glass seal). 6. CerquadOne of the surface mount packages, that is, the lower sealed Ceramic QFP, is used to package logic LSI circuits such as DSP. Cerquad with windows is used to package EPROM circuits. The heat dissipation is better than that of Plastic QFP, and power ranges from 1.5 to 2W can be allowed under natural air cooling conditions. But the cost of packaging is 3 to 5 times higher than that of Plastic QFP. Pin center distance has 1.27 mm, 0.8 mm, 0.65 mm, 0.5 mm, 0.4 mm and other specifications. The number of pins ranges from 32 to 368. 7. CLCC (Ceramic Leaded Chip Carrier)Ceramic Leaded Chip Carrier is one of the surface mount packages, and the pins are drawn from the four sides of the package in T-shaped. Those with windows are used for packaging ultraviolet erasing EPROM and microcomputer circuit with EPROM, etc. This packaging is also known as QFJ and QFJ-G (see QFJ). 8. COB (Chip on Board)Chip on Board package is one of the bare chip mounting technologies. The semiconductor chip is connected and mounted on the printed circuit board, the electrical connection between the chip and the substrate is realized by the lead stitching method. Next, cover it with resin to ensure its reliability. Although COB is the simplest bare chip mounting technology, its packaging density is far lower than that of TAB and reverse chip welding technology. 9. DFP (Dual Flat Package)Dual Flat Package is another name for SOP (see SOP). This was once called in the past, but now it is basically out of use.10. DIC (Dual In-line Ceramic Package)This is another name for Ceramic DIP (including glass seal) (see DIP). 11. DIL (Dual In-Line)DIL is an alias for DIP (see DIP). European semiconductor manufacturers often use this name. 12. DIP (Dual In-line Package)Dual In-line Package is one of the through hole packages. The pins are drawn from both sides of the package, and the packaging materials are plastic and ceramic. DIP is the most popular through-hole package, including standard logic IC, memory LSI, microcomputer circuit and so on. The center distance of the pin is 2.54 mm, and the number of pins ranges from 6 to 64. The packaging width is usually 15.2 mm. Some refer to packages with widths of 7.52 mm and 10.16 mm as skinny DIP and slim DIP (narrow DIP, respectively). In most cases, however, it is indistinguishable and is simply collectively referred to as DIP. In addition, Ceramic DIP sealed with low melting point glass is also known as Cerdip (see Cerdip). 13. DSO (Dual Small Out-lint)DSO is the alias for SOP (see SOP). Some semiconductor manufacturers use this name. 14. DICP (Dual Tape Carrier Package)DICP is one of the TCP (loaded packages). The pins are made on the insulation tape and drawn from both sides of the package. Due to the use of TAB (Tape Automated Bonding) technology, the package shape is very thin. It is commonly used in liquid crystal display drive LSI, but most of them are customized products. In addition, the 0.5 mm thick memory LSI thin package is in the development stage. In Japan, DICP is named DTP according to the standard of EIAJ (Japanese Electronic Machinery Industry). 15. DIP (Dual Tape Carrier Package)As we mentioned above, it is the name of DTCP in the standard of the Japanese Electronic Machinery Industry Association. (see DTCP). 16. FP (Flat Package)FP is one of the surface mount packages and it is another name of QFP or SOP (see QFP and SOP). Some semiconductor manufacturers use this name.17. Flip-chipFlip-chip is one of the bare chip packaging technologies. The metal bump is made in the electrode region of the LSI chip, and then the metal bump is connected to the electrode area on the printed substrate by pressure welding. The occupied area of packaging is basically the same as the size of the chip, which is the smallest and thinnest of all packaging technologies. 18. FQFP (fine pitch quad flat package)FQFP usually refers to the QFP which the center distance of the pin is less than 0.65 mm (see QFP). Some conductor manufacturers use this name.19. CPAC (Globe Top PAD Array Carrier)CPAC is another name for BGA by Motorola in the United States. 20. CQFP (Quad Fiat Package with Guard Ring)CQFP is one of the plastic QFP. The pins are masked with a resin protective ring to prevent bending deformation. Before assembling the LSI on the printed substrate, we need to cut off the pin from the protective ring and make it become L-shaped. This package has been mass produced by Motorola in the United States. The center distance of the pin is 0.5 mm, and the maximum number of pins is about 208.21. H- (with heat sink)H- represents a mark with a heat sink. For example, HSOP represents a SOP with a heat sink.22. Pin Grid Array (surface mount type)PGA is usually a through-hole package with a pin length of about 3.4 mm. The surface mount PGA has display–shaped pins on the bottom of the package, ranging in length from 1.5 mm to 2.0 mm. Mounting uses the method of butt joint with the printed substrate, so it is also known as butt joint PGA. Because the center distance of the pin is only 1.27 mm, which is half smaller than the through-hole PGA, the package body cannot be made very large, and the number of pins is more than the through-hole type (ranges from 250 to 528). It is a package for large-scale logical LSI. The packaging substrate has a multi-layer ceramic substrate and a glass epoxy resin printing base. Packaging based on multi-layer ceramic substrate has been practical. 23. JLCC (J-Leaded Chip Carrier)JLCC refers to the alias for windowed CLCC and windowed Ceramic QFJ (see CLCC and QFJ). The name used by some semiconductor manufacturers. 24. LCC (Leadless chip carrier)LCC refers to a surface mount package with only electrode contact and no pin on the four sides of the ceramic substrate. It is a high-speed and high-frequency IC package, also known as Ceramic QFN or QFN-C (see QFN). 25. LGA (Land Grid Array)LGA , that is, an array state flat electrode contact package made on the bottom surface. All we need to do is to insert the socket when assembling. Ceramic LGA, with 227 contacts (1.27 mm center distance) and 447 contacts (2.54 mm center distance) has been used in high speed logic LSI circuits. LGA can accommodate more input and output pins in a smaller package than QFP. In addition, because of the small impedance of the lead, it is very suitable for high-speed LSI. However, due to the complexity of socket production and high cost, it is basically not used much now. But the demand for it is expected to increase in the future. 26. LOC (Lead on Chip)LOC is one of the LSI packaging technologies. The front end of the lead frame is located at the top of the chip. A convex solder joint is made near the center of the chip, and the lead is stitched for electrical connection. Compared with the original structure in which the lead frame is arranged near the side of the chip, the chip contained in the package of the same size is up to about 1 mm wide. 27. LQFP (Low Profile Quad Flat Package)LQFP is a kind of QFP whose package body thickness is 1.4 mm and this is the name used by the Japanese Electronics and Machinery Industry according to the new QFP shape specification. 28. L-QUADL-QUAD is one of the Ceramic QFP. The thermal conductivity of aluminum nitride for packaging substrate is 7 to 8 times higher than that of alumina and has good heat dissipation. The frame of the package is sealed with alumina and the chip is sealed by filling method, thus the cost is suppressed. It is a package developed for logical LSI that allows 3 w power under natural air cooling conditions. LSI logic packages with 208 pins (0.5 mm center distance) and 160 pins (0.65 mm center distance) have been developed and put into mass production in October 1993. 29. MCM (Multi-Chip Module)MCM is a package that assembles multiple bare semiconductor chips on a wiring substrate. According to the substrate materials, it can be divided into MCM-L, MCM-C and MCM-D. MCM-L is a module that uses the usual glass epoxy resin multi-layer printed substrate. The wiring density is not that high and the cost is low. MCM-C is a module which uses thick film technology to form multi-layer wiring and uses ceramics (alumina or glass-ceramic) as substrate, which is similar to mixing IC with thick film of multi-layer ceramic substrate. There is no significant difference between them, and the wiring density was higher than that of MCM-L.MCM-D is a module which uses thin film technology to form multi-layer wiring and uses ceramics (alumina or aluminum nitride) or Si and Al as substrate. The wiring density is the highest of the three modules, but the cost is also high. 30. MFP (Mini Flat Package)MFP is another name for plastic SOP or SSOP (see SOP and SSOP) and it is used by some semiconductor manufacturers. 31. MQFP (Metric Quad Flat Package)MQFP is a classification of QFP according to the JEDEC standard. It refers to standard QFP with a pin center distance of 0.65 mm and a body thickness of 3.8 mm~2.0 mm (see QFP). 32. MQUAD (Metal Quad)MQUAD is a kind of QFP package developed by Olin Company in the United States. The substrate and cover are made of aluminum and sealed with adhesive. The power of 2.5 w~2.8 w can be allowed under the condition of natural air cooling. SHINKO ELECTRIC INDUSTRIES CO., LTD. was licensed to start production in 1993. 33. MSP (Mini Square Package)MSP is another name for QFI (see QFI) and is often called in the early days of development. QFI is the name specified by the Electronic Machinery Industry Association of Japan. 34. OPMAC (Over Molded Pad Array Carrier)OPMAC is the name used by Motorola for molded resin seal BGA (see BGA). 35. P- (plastic)P- is the mark that represents a plastic package. For example, PDIP represents Plastic DIP. 36. PAC (Pad Array Carrier)PAC is an alias for BGA (see BGA). 37. PCLP (Printed Circuit Board Leadless Package)Fujitsu of Japan uses the name for Plastic QFN (Plastic LCC) (see QFN). The center distance of the pin can be divided into two specifications: 0.55 mm and 0.4 mm. It is currently in the development phase. 38. PFPF (Plastic Flat Package)PFPF is an alias for Plastic QFP (see QFP) and it is used by some LSI manufacturers. 39. PGA (Pin Grid Array)PGA is one of the through-hole packages, and the vertical pins on the bottom are arranged in the form of display. The packaging substrate is basically multi-layer ceramic substrate. In the case of not specifically indicating the name of the material, most of the Ceramic PGA, are used in high-speed and large-scale logic LSI circuits. The cost is high. The center distance of the pin is usually 2.54 mm, and the number of pins ranges from 64 to 447. In order to reduce the cost, the packaging substrate can be replaced by glass epoxy resin printing substrate. There is also Plastic PGA with 64 to 256 pins. In addition, there is a short pin surface mount PGA (Butt Joint PGA) with a pin center distance of 1.27 mm. (see Surface Mount PGA). 40. Piggy BackIt refers to a ceramic package with sockets and its shape is similar to that of DIP, QFP and QFN. It is used to confirm operation on the evaluation program when developing a device with a microcomputer. For example, plug the EPROM into the socket for debugging. This kind of package is basically custom-made, and there is little circulation on the market. 41. PLCC (Plastic Leaded Chip Carrier)PLCC is one of the surface mount packages. The pin is drawn from the four sides of the package in the shape of T and is made of plastic. Texas Instruments was first used in 64k-bit DRAM and 256k-bit DRAM, and now it has been widely used in logic LSI, DLD (or logic device) and other circuits. The center distance of the pin is 1.27 mm, and the number of pins ranges from 18 to 84. The J-shaped pin is not easy to deform and is easier to operate than QFP, but the appearance inspection after welding is more difficult.PLCC is similar to LCC (also known as QFN). In the past, the only difference between the two was that the former used plastic and the latter used ceramics. But now there are J-shaped pin packages made of ceramics and pin-free packages made of plastic. (marked as plastic LCC, PC LP, P-LCC, etc.) Thus they have been unable to distinguish.To this end, the Japanese Electronics and Machinery Industry decided in 1988 to refer to packages with J-shaped pins on four sides as QFJ, and packages with electrode bumps on four sides as QFN (see QFJ and QFN). 42. P-LCC (Plastic Leadless Chip Carrier)Sometimes it is another name for Plastic QFJ, sometimes it is another name for QFN (Plastic LCC) (see QFJ and QFN). Some LSI manufacturers use PLCC for lead package and P-LCC for lead-free package to show the difference. 43. QFH (Quad Flat High Package)QFH is a kind of Plastic QFP. In order to prevent the package body from breaking, the QFP body is made thicker (see QFP). This is the name used by some semiconductor manufacturers. 44. QFI (Quad Flat I-leaded Package)QFI is one of the surface mount packages. The pin is drawn from the four sides of the package in I-shaped. It is also known as MSP (see MSP). The mount is connected with the printed substrate by butt joint. Because there is no protruding part of the pin, the occupied area of the mount is smaller than that of QFP. Hitachi has developed and used this package for video analog IC. In addition, this package is also used by PLL IC of Motorola, a Japanese company. The center distance of the pin is 1.27 mm, and the number of pins is from 18 to 68.45. QFJ (Quad Flat J-leaded Package)QFJ is one of the surface mount packages. The pin is drawn from the four sides of the package in the shape of J. It is the name stipulated by the Japan Electronic Machinery Industry Association. The center distance of the pin is 1.27 mm. There are two kinds of materials: plastic and ceramics. Plastic QFJ is mostly called PLCC (see PLCC), and it is for microcomputers, gate displays, DRAM, ASSP, OTP, etc. The number of pins ranges from 18 to 84. Ceramic QFJ is also known as CLCC and JLCC (see CLCC). The windowed package is used for ultraviolet erasing EPROM and microcomputer chip circuits with EPROM. The number of pins ranges from 32 to 84.46. QFN (Quad Flat Non-leaded Package)QFN is one of the surface mount packages and it is often called LCC now. QFN is the name specified by the Electronic Machinery Industry Association of Japan. The four sides of the package are equipped with electrode contacts. Because there are no pins, the mounting area is smaller than QFP, and the height is lower than QFP. However, when there is a stress between the printed substrate and the package, it cannot be alleviated at the electrode contact. Therefore, it is difficult for electrode contacts to make as many pins as QFP. The number of pins is generally ranges from 14 to 100.There are two kinds of materials: ceramic and plastic. When marked with LCC, they are basically Ceramic QFN. The center of the electrode contact is 1.27 mm.Plastic QFN is a low-cost package for printing substrate with glass epoxy resin. In addition to 1.27 mm, there are two kinds of electrode contact center distance: 0.65 mm and 0.5 mm. This package is also known as Plastic LCC, PCLC, P-LCC and so on.47. QFP (Quad Flat Package)QFP is one of the surface mount packages, with pins drawn from four sides in L-shaped. There are three kinds of substrate: ceramic, metal and plastic. In terms of quantity, plastic packaging accounts for the vast majority. When the material is not specifically indicated, most of the cases are Plastic QFP. Plastic QFP is the most popular multi-pin LSI package. It is not only used in microprocessor, gate display and other digital logic LSI circuits, but also in VTR signal processing, audio signal processing and other analog LSI circuits. The center distance of pin has 1.0 mm, 0.8 mm, 0.65 mm, 0.5 mm, 0.4 mm, 0.3 mm and other specifications. The maximum number of pins in the 0.65 mm center distance specification is 304.In Japan, QFP with a pin center distance less than 0.65 mm is called QFP (FP). But now the Japanese Electronics and Machinery Industry will re-evaluate the shape of the QFP. There is no difference in the center distance of the pin. But according to the thickness of the package body, it can be divided into three types: QFP (2.0 mm~3.6 mm thickness), LQFP (1.4 mm thickness) and TQFP (1.0 mm thickness).In addition, some LSI manufacturers specifically refer to the QFP with the pin center distance as 0.5 mm as shrink QFP or SQFP, VQFP.However, some manufacturers also call the QFP with pin center distance of 0.65 mm and 0.4 mm SQFP, which makes the name a little confused. The disadvantage of QFP is that when the center distance of the pin is less than 0.65 mm, the pin is easy to bend. In order to prevent pin deformation, several improved QFP varieties have emerged such as BQFP with tree finger buffer pads on the four corners of the package (see BQFP); GQFP with a resin protection ring which covers the front of the pin (see GQFP) and TPQFP (see TPQFP)，which is set test bumps in the package body and can be tested in a special fixture to prevent pin deformation.In the aspect of logical LSI, many development products and highly reliable products are packaged in multi-layer ceramic QFP. Products with a minimum pin center distance of 0.4 mm and a maximum number of pins of 348 have also been introduced. In addition, there are glass-sealed ceramic QFP.48. QFP (FP) (QFP fine pitch)This is the name specified in the standard of the Japan Electronic Machinery Industry Association. The pin center distance is 0.55 mm, 0.4 mm, 0.3 mm and so on, which is smaller than that of 0.65 mm (see QFP).49. QIC (Quad In-line Ceramic Package)QIC is another name for Ceramic QFP and it is used by some semiconductor manufacturers (see QFP, Cerquad).50. QIP (Quad In-line Plastic Package)QIP is another name for Ceramic QFP and is used by some semiconductor manufacturers (see QFP, Cerquad).51. QTCP (Quad Tape Carrier Package)QTCP is one of the TCP packages that forms pins on the insulation tape and leads out from the four sides of the package. It is a thin package using TAB technology (see TAB, TCP).52. QTP (Quad Tape Carrier Package)QTP is the name used by the Japanese Electronic Machinery Industry for the shape specifications developed by QTCP in April 1993 (see TCP).53. QUIL (Quad In-Line)QUIL is an alias for QUIP (see QUIP).54. QUIP (Quad In-line Package)The pin is drawn from both sides of the package and bends down into four columns at every other pin. The pin center distance is 1.27 mm. When inserted into the printed substrate, the insertion center distance becomes 2.5 mm. Therefore, it can be used for standard printed circuit boards.It is smaller package than the standard DIP. Nippon Electric has adopted this kind of package in microcomputer chips for desktop computers and household appliances. There are two kinds of materials: ceramics and plastics. The number of pins is 64. 55. SDIP (Shrink Dual In-line Package)SDIP is one of the through-hole packages with the same shape as the DIP. Its pin center distance (1.778 mm) is less than DIP (2.54 mm) so it gets this name. The number of pins ranges from 14 to 90. It is also known as SH-DIP. There are two kinds of materials: ceramics and plastics.56. SH-DIP (Shrink Dual In-line Package)SH-DIP is the same as SDIP and it is used by some semiconductor manufacturers. 57. SIL (Single In-Line)SIL is an alias for SIP (see SIP). European semiconductor manufacturers often use this name. 58. SIMM (Single In-line Memory Module)A memory module provided with electrodes only near one side of the printed substrate. It usually refers to a module inserted into a socket. The standard SIMM has two specifications: 30 electrodes with center distance of 2.54 mm and 72 electrodes with center distance of 1.27 mm. The SIMM with 1 megabit and 4 megabit DRAM packaged with SOJ on one or both sides of the printed substrate has been widely used in personal computers, workstations and other devices. There are at least 30 to 40 percent of DRAM is installed in SIMM. 59. SIP (Single In-line Package)The pins are drawn from one side of the package and arranged in a straight line. The package is laterally mounted on the printed substrate. The center distance of the pin is usually 2.54 mm, and the number of pins ranges from 2 to 23, most of which are customized products. Packages come in different shapes. Sometimes packages with the same shape as ZIP are called SIP.60. SK-DIP (Skinny Dual In-line Package)SK-DIP is a kind of DIP which has a narrow body with a width of 7.62 mm and a pin center distance of 2.54 mm. It is often collectively referred to as DIP (see DIP).61. SL-DIP (Slim Dual In-line Package)SL-DIP is a kind of DIP which has a narrow body with a width of 10.16 mm and a pin center distance of 2.54 mm. It is commonly referred to as DIP. 62. SMD (Surface Mount Devices)Occasionally, some semiconductor manufacturers classify SOP as SMD (see SOP).63. SO (Small Out-line)SO is another name for SOP and is used by many semiconductor manufacturers in the world. (see SOP).64. SOI (Small Out-line I-leaded Package)SOI is one of the surface mount packages. The pin is drawn down from both sides of the package in I-shaped, with a center distance from 1.27 mm and 26 pins. The occupied area of mounting is smaller than that of SOP. Hitachi uses this package in analog IC (IC for motor drive).65. SOIC (Small Out-line Integrated Circuit)SOIC is an alias for SOP (see SOP). Many semiconductor manufacturers abroad use this name.66. SOJ (Small Out-Line J-Leaded Package)SOJ is one of the surface mount packages. The pin is J-shaped from both sides of the package, so it gets its name. They are usually plastic products and are used in memory LSI circuits such as DRAM and SRAM. But most of them are used in DRAM.Many of the DRAM devices packaged in SOJ are mounted on SIMM. The center distance of the pin is 1.27 mm, and the number of pins ranges from 20 to 40 (see SIMM).67. SOL (Small Out-Line L-leaded Package)The name used for SOP in accordance with the JEDEC standard (see SOP).68. SONF (Small Out-Line Non-Fin)SONF is the SOP without heat sink. As the same as the usual SOP, the NF (non-fin) mark is intentionally added In order to show that there is no heat sink in the power IC package. The name is used by some semiconductor manufacturers (see SOP).69. SOF (Small Out-Line Package)SOF is one of the surface mount packages with pins drawn from both sides of the package in L-shaped. There are two kinds of materials: plastic and ceramics. And it is also known as SOL and DFP.SOP is not only used for memory LSI, but also widely used in small-scale ASSP and other circuits. SOP is the most popular surface mount package in areas where the input and output terminals do not exceed 10 to 40. The center distance of the pin is 1.27 mm, and the number of pins is from 8 to 44.In addition, a SOP with a pin center distance less than 1.27 mm is also known as a SSOP. A SOP with assembly height less than 1.27 mm is called TSOP (see SSOP, TSOP). There is also a SOP with a heat sink. 70. SOW [Small Outline Package(Wide-Type)]SOW refers to wide body SOP and this name is used by some semiconductor manufacturers.71. COG (Chip on Glass)COG (Chip on Glass) packaging technology, which has great influence on the development of Liquid Crystal Display (LCD) technology, is becoming more and more practical in the world.FAQ 1. What is package in IC?The case, known as a "package", supports the electrical contacts which connect the device to a circuit board. In the integrated circuit industry, the process is often referred to as packaging. Other names include semiconductor device assembly, assembly, encapsulation or sealing.2. What are the different types of IC packages?What is IC packaging?DIP (Double In-line Package)SOP/SOIC/SO (Small Outline Package)QFP (Quad Flat Package)QFN/LCC (Quad Flat Non-leaded Package)BGA (Ball Grid Array Package)CSP (Chip Scale Package)3. What is IC and how it works?An integrated circuit, or IC, is small chip that can function as an amplifier, oscillator, timer, microprocessor, or even computer memory. An IC is a small wafer, usually made of silicon, that can hold anywhere from hundreds to millions of transistors, resistors, and capacitors.4. What are the types of ICs?Below is the classification of different types of ICs basis on their chip size.SSI: Small scale integration. 3 – 30 gates per chip.MSI: Medium scale integration. 30 – 300 gates per chip.LSI: Large scale integration. 300 – 3,000 gates per chip.VLSI: Very large scale integration. More than 3,000 gates per chip.5. How do I know my IC type?How to Identify Integrated Circuit ChipsIdentify the manufacturer first. ...Look up data sheets in the manufacturer's printed catalog. ...Look up a part number in an electronic retailer's catalog. ...Use the technical specifications for a piece of equipment to find part numbers and alternates.6. What is the most common type of digital IC package?DIP (Dual in-line packages)DIP, short for dual in-line package, is the most common through-hole IC package you'll encounter. These little chips have two parallel rows of pins extending perpendicularly out of a rectangular, black, plastic housing.7. What are the advantages of IC?The advantages of ICs : (i) Extremely small in size, (ii) Low power consumption, (iii) Reliability, (iv) Reduced cost, (v) Very small weight and (vi) Easy replacement. 8. What is the IC package?What Is the Package in IC? IC packaging refers to the material that contains a semiconductor device. The package is a case that surrounds the circuit material to protect it from corrosion or physical damage and allow mounting of the electrical contacts connecting it to the printed circuit board (PCB). 9.Why IC packaging is important?IC packaging is the ability to provide more and more I/O interconnections to a die (bare chip) that is increasingly shrinking in size is an ever-present problem.10. What are the three basic types of linear IC packages?IC packages can be grouped into three general categories; Dual In-line Packages, Chip Carriers and Grid Arrays. All the packages, regardless of the category has a body style that scales with pin count.