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FPGA vs ASIC: What Is the Difference Between FPGA and ASIC?


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FPGA and ASIC Development


Difference Comparison

What is An FPGA?

Learn the basics of what is an FPGA. This video discusses the history of FPGAs and how they have advanced over time. It discusses some applications that are possible. Finally it will introduce the two languages used to program FPGAs: VHDL and Verilog. 

FPGA State

FPGA (Field Programmable Gate Array) is the product of further development on the basis of PAL,GAL,CPLD and other programmable devices. As a semi-custom circuit in the field of ASIC, it not only solves the deficiency of custom circuit, but also overcomes the shortcoming of the limit of gate of the original programmable device, that is, FPGA allows unlimited programming.

FPGA Parts Explaination

FPGA adopts the concept of LCA (Logic Cell Array), which includes three parts: configurable logic module (CLB), Input Output Block(IOB), and Interconnect. FPGA is a programmable device with different structures compared with traditional logic circuits and gate arrays (such as PAL,GAL and CPLD devices). FPGA uses a small lookup table (16×1RAM) to implement combinatorial logic. Each lookup table is connected to the input of a D-trigger, which drives other logic circuits or drives the I / O. Therefore, the basic logic unit module can realize both combinational logic function and sequential logic function. These logic units connect with mental wires or I/O contract. In addition, the logic of FPGA is to load programming data into internal static storage units. The value stored in the memory cell determines the logical function of the logical unit and the connection between modules or between modules and I / O contracts, and ultimately determine what FPGA can achieve.

What is An ASIC?

Application-specific integrated circuit(ASIC) is a microchip designed for a special application, such as a special kind of transmission protocol or a hand-held computer. People might contrast it with general integrated circuits, such as the microprocessor and the random access memory chips in PCs. ASIC is used in a wide-range of applications, including auto emission control, environmental monitoring, and personal digital assistants (PDAs).

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ASIC State

At present, ASIC is considered to be a kind of integrated circuit designed for special purpose in the field of integrated circuit. An integrated circuit is designed and manufactured at the requirement of a specific user or a particular electronic system. That is, the ASIC is characterized by a request for a specific user. The ASIC is smaller in volume and lower in power consumption than that of a general integrated circuit in mass production, also has the advantages of improved reliability, improved performance, enhanced confidentiality, lower cost and so on.

Full Customization and Semi-customization

ASIC is divided into full customization and semi-customization, so an ASIC can be pre-manufactured for a special application or it can be customized (typically using components from a "building block" library of components) for a particular requirement of customers.

Full customization design requires designers to complete the design of all circuits, so it requires a lot of manpower and material resources, although it has good flexibility but the development efficiency is low. If the design is ideal, full customization can run faster than semi-custom ASIC chips. When using the standard cell, the semi-custom can select SSI (gate), MSI (such as adder, comparator, etc.), data path (such as ALU, memory, bus, etc.),. memory and even system-level modules (e.g. multipliers, microcontrollers, etc.) ) and the IP core from the standard logic unit library. When these logic units have been laid out and designed reliably, the designer can easily complete the system design. Modern ASIC often contains an 32-bit processor, storage units like ROM, RAM, EEPROM, Flash and other modules. Such ASIC is often called SoC(system in chip).

ASIC Development

Programmable ASIC is another characteristic branch of ASIC development. It mainly uses programmable integrated circuit such as PROM, GAL, PLD, CPLD, FPGA or logic array to get ASIC. Its main feature is to provide software design and programming directly, completes the function of ASIC circuit, and it do not need to be processed by IC process line.

There are many kinds of ASIC designs for programmable devices, which can meet different requirements. PLD and FPGA are commonly used programmable devices. It is suitable for the design of digital circuit with short development cycle, certain complexity and circuit scale, especially for electronic system design engineers using EDA tools for ASIC design.


The circuit design with hardware description language (Verilog or VHDL), which can be easily synthesized and distributed, can be quickly made to FPGA for testing. It is the mainstream of modern IC design verification technology. These editable elements can be used to implement basic logic gates (such as AND, OR, XOR, NOT) or more complex combinatorial functions such as decoders or mathematical equations. In most FPGA, these editable components also contain memory elements such as triggers (Flip-flop) or other more complete memory blocks.

System designers can connect blocks of logic inside FPGA via editable connections as needed, as if a circuit test board had been placed in a chip. The logic blocks and connections of a finished FPGA can be changed according to the designer, so FPGA can meet the required logic functions.

The speed of FPGA is generally slower than that of ASIC, and the area of realizing the same function is larger than that of ASIC. But they also have many advantages, such as quick production, modification to correct errors in the program and cheaper costs. Vendors may also offer cheap but poorly edited FPGA. Because these chips have poor editable capabilities, the development of these designs is done on an ordinary FPGA, and then the design is transferred to a chip similar to ASIC. Another way is to use CPLD (Complex Programmable Logic Device).

difference between FPGA and ASIC

There are many differences between FPGA and ASIC. The logic of ASIC is usually much larger than that of FPGA. There is an order of magnitude difference in gate numbers, and the running clock is much higher than FPGA. Moreover, FPGA is relatively flexible than ASIC because it can be programmed, but only in terms of RTL design:

(1) ASIC tends to be more conservative, any changes to logic needed careful consideration, and make alternative choices in case of correction. Any modification to RTL is almost incremental, and even if the previous logic is wrong, it will not be deleted, but one more branch be made.

(2) ASIC has higher requirements for coding style. Coding style requirements for all modules are consistent, thus favouring the fault check.

(3) ASIC design pays more attention to clock and reset. In particular, clocks are critical to the design of ASIC, and reset is critical to BIST testing. ASIC uses libraries to design in this respect. ASIC usually does not use counter to divide frequencies, which can lead to unclean clocks. Unless it's a very low frequency clock, ASIC is also much more cautious about signal processing across clock domains. The closing and opening of clock also needs to be strictly checked.

(4) ASIC has to consider the problems of SCAN testing and BIST, so it is necessary to do BIST insertion for SRAM when designing, and to reserve interfaces for SCAN. Although most of the interfaces are done by tools, RTL authors often have to do some top-level complex work manually, logic such as the source of the SCAN clock.

(5) FPGA often use existing IP, it needs to consider the balance of resources, because there is a problem of resource waste in FPGA. ASIC rarely needed to consider this problem, the main consideration of it is its performance and power consumption, except SRAM and CLK which is related to reset in logic choice, the other are handwritten. So the logic is basically no waste, and more compact.

(6) ASIC timing is more predictable and adjustable, so it can write a lot of logic.

The differences between FPGA and ASIC development processes:

ASIC and FPGA Design Flow

FPGA Design FlowASIC Design Flow

ASIC and FPGA Implementation Steps

FPGA Implementation StepsASIC Implementation Steps

The first step is to implement functionality in a way that is generally described in HDL, such as verilog,VHDL. Of course, for small-scale circuits can also use circuit diagram input mode.

The second step is to ensure the correctness of circuit functions, also known as verification. It can be realized by software simulation, hardware simulation and so on. Software simulation is generally intuitive and easy to debug, because the state of every moment can be seen, this is like debugging software programs. Hardware simulation generally refers to FPGA verification, that is, the circuit is implemented with FPGA, and then run it. The advantage of this is that it is very fast. For example, a video decoding core is used to solve a frame of image, and software simulation can even use the best server, it still takes a lot of seconds to run, but in FPGA, it's basically needs milliseconds. For a large mode verification of the circuit, is essential.

The first two steps for digital IP,  the ASIC and FPGA are basically the same, unless some implementation techniques are different.

The third step is, once the correctness of the circuit you describe is ensured, to implement it by turning the code you write into a real circuit, such as a register or a NAND gate, which is called synthesis. Because the circuit is becoming more and more complex, the most basic circuit is made into cell, such as register, and non-gate, so it will not be refined to the problem of how to use triode. The difference of this step is the smallest unit of the FPGA and the ASIC. FPGA is a well made circuit, generally considering universality and efficiency, so the basic circuit unit is relatively large, such as LUT, consist of register and NAND gate, although it uses one gate, it will take up such a unit. For ASIC, the two-input NAND gate is a simple gate circuit, even in order to distinguish the drive ability and the timing characteristic difference, there are several grades, some area is small, some drive ability is strong. In general, this step is to make sure your description turned into a library-based circuit description.

The fourth step is, when you get a description of the circuit based on the library, you have to consider how these units are placed, which is called layout and wiring. The wiring resources of FPGA is limited, so you need to constantly adjust it to ensure the timing requirements. Map your circuit to the middle of its fixed resource map. ASIC's words are generally based on peripheral circuit requirements, timing requirements, your circuit to a certain location on the chip. After the arrangement, we have to consider whether the connection can pass, whether the delay at all levels can meet the circuit establishing and maintaining time requirements, and so on.

The fifth step is output. FPGA is to output a configuration file to make the FPGA chip to configure its circuit, so that it can achieve the desired function. This file can be downloaded by PC after FPGA power up, or stored in Flash, when the circuit is powered on, automatic configuration will make. ASIC is to output a layout file to tell the manufacturer how to corrode silicon chip, how to connect metal and so on.

The sixth step is cost. ASIC has a great advantage in terms of recurring costs with less material is wasted due to the fixed number of transistors in the design. As for FPGAs, a certain number of transistor elements are always wasted although these packages are standard. This means that the cost of an FPGA is often much higher than that of an ASIC. Although the recurring cost of an ASIC is quite low, its non-recurring cost is relatively high. Although it is non-recurring, its value per IC decreases with increased volume. 

cost comparation

A Field Programmable Gate Array can be seen as the prototyping stage of Application Specific Integrated Circuits: ASIC is very expensive to manufacture, and once it's made there is no going back (as the most expensive fixed cost is the masks [sort of manufacturing "stencil"] and their development). FPGA can reprogrammable many times, however because of the fact that a generic array of gates is connected to accomplish your goal, it is not optimized like ASIC. 

Also, FPGAs are natively dynamic devices in that if you power it off, you loose not only the current state but also your configuration. Boards now exist though that add a FLASH chip and/or a microcontroller to load the configuration at startup so this tends to be a less important argument. Both ASIC and FPGA can be configured with Hardware Description Languages, and sometimes FPGA is used for the end product. But generally ASIC kick in when the design is fixed.

If you analyze the cost of production in relation to the volume, you would find that as you go lower in production numbers, using FPGA actually becomes cheaper than using ASIC.

There are, of course, various auxiliary steps in the process. In general, it's all about making sure that the circuits you design are correct and implemented correctly.


Differences Summary



Reconfigurable circuit

One-time circuit

Design mainly with hardware description languages (HDL)

Similar to the FPGA

FPGA is relatively flexible

ASIC tends to be more conservative

FPGA is not strict with the coding because of its programming feature

ASIC has higher requirements for coding style

FPGA uses small LUT to combine logic configuration

ASIC design pays more attention to clock and reset

FPGA designers generally do not need to care for back-end design

The problems of SCAN testing and BIST

FPGA uses existing IP

performance and power consumption

Analog designs are not possible with FPGA

ASIC can have complete analog circuit

The speed is generally slower

Run fast than FPGA

Allow unlimited programming

An integrated circuit for a special purpose

More power consumption

Much more power efficient than FPGA

Visual Comparsion( means better to select)





Design Flow

Barrier to entry

Time to market

Analog Blocks

Unit size

Power consumption

Cost per unit

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