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PCA9517ADP Level Translating I2C-Bus Repeater: CAD Models, Datasheet, Features [Video&FAQ]

  • Contents

Catalog

Product Overview

PCA9517ADP Related Video Introduction

PCA9517ADP CAD Models

PCA9517ADP Pin Configuration

PCA9517ADP Functional Diagram

PCA9517ADP Features

PCA9517ADP Typical Application

PCA9517ADP Datasheet

PCA9517ADP Specifications

PCA9517ADP Manufacturer

Using Warning

PCA9517ADP FAQ

 

Product Overview

The PCA9517A is a CMOS integrated circuit that provides level shifting between low voltage (down to 0.9 V) and higher voltage (2.7 V to 5.5 V) I2C-bus or SMBus applications. While retaining all the operating modes and features of the I2C-bus system during the level shifts, it also permits extension of the I2C-bus by providing bidirectional buffering for both the data (SDA) and the clock (SCL) lines, thus enabling two buses of 400 pF. Using the PCA9517A enables the system designer to isolate two halves of a bus for both voltage and capacitance. The SDA and SCL pins are overvoltage tolerant and are high-impedance when the PCA9517A is unpowered.

 

The 2.7 V to 5.5 V bus port B drivers behave much like the drivers on the PCA9515A device, while the adjustable voltage bus port A drivers drive more current and eliminate the static offset voltage. This results in a LOW on the port B translating into a nearly 0 V LOW on the port A which accommodates smaller voltage swings of lower voltage logic.

 

The static offset design of the port B PCA9517A I/O drivers prevent them from being connected to another device that has rise time accelerator including the PCA9510, PCA9511, PCA9512, PCA9513, PCA9514, PCA9515A, PCA9516A, PCA9517A (port B), or PCA9518. Port A of two or more PCA9517As can be connected together, however, to allow a star topography with port A on the common bus, and port A can be connected directly to any other buffer with static or dynamic offset voltage. Multiple PCA9517As can be connected in series, port A to port B, with no build-up in offset voltage with only time of flight delays to consider.

 

The PCA9517A drivers are not enabled unless VCC(A) is above 0.8 V and VCC(B) is above 2.5 V. The EN pin can also be used to turn the drivers on and off under system control. Caution should be observed to only change the state of the enable pin when the bus is idle.

 

The output pull-down on the port B internal buffer LOW is set for approximately 0.5 V, while the input threshold of the internal buffer is set about 70 mV lower (0.43 V). When the port B I/O is driven LOW internally, the LOW is not recognized as a LOW by the input. This prevents a lock-up condition from occurring. The output pull-down on port A drives a hard LOW and the input level is set at 0.3VCC(A) to accommodate the need for a lower LOW level in systems where the low voltage side supply voltage is as low as 0.9 V.

 

PCA9517ADP Video Description: Whenever I²C protocol is used as serie bus interface with different voltage domains, the application of voltage translators and repeaters become a necessity.

Join our application marketing team, who will introduce in this short video Nexperia’s newest I²C autosense voltage translators and bus repeaters.

 

PCA9517ADP CAD Models

PCA9517ADP PCB Symbol

Figure: PCA9517ADP PCB Symbol

 

 

 PCA9517ADP Footprint

Figure: PCA9517ADP Footprint

 

 

 PCA9517ADP 3D Models

Figure: PCA9517ADP 3D Models

 

PCA9517ADP Pin Configuration

PCA9517ADP Pin Configuration

Figure: PCA9517ADP Pin Configuration

Pin description

Symbol Pin Description
VCC(A) 1 port A supply voltage (0.9 V to 5.5 V)
SCLA 2 serial clock port A bus
SDAA 3 serial data port A bus
GND 4 supply ground (0 V)
EN 5 active HIGH repeater enable input
SDAB 6 serial data port B bus
SCLB 7 serial clock port B bus
VCC(B) 8 port B supply voltage (2.7 V to 5.5 V)

 

PCA9517ADP Functional Diagram

PCA9517ADP Functional Diagram

Figure: PCA9517ADP Functional Diagram

 

PCA9517ADP Features

  • 2 channel, bidirectional buffer isolates capacitance and allows400 pF on either side of the device
  • Voltage level translation from 0.9 V to 5.5 V and from 2.7 V to 5.5 V
  • Footprint and functional replacement for PCA9515/15A
  • I2C-bus and SMBus compatible
  • Active HIGH repeater enable input
  • Open-drain input/outputs
  • Lock-up free operation
  • Supports arbitration and clock stretching across the repeater
  • Accommodates Standard-mode and Fast-mode I2C-busdevices and multiple masters
  • Powered-off high-impedance I2C-bus pins
  • Port A operating supply voltage range of 0.9 V to 5.5 V
  • Port B operating supply voltage range of 2.7 V to 5.5 V
  • 5 V tolerant I2C-bus and enable pins
  • 0 Hz to 400 kHz clock frequency (the maximum systemoperating frequency may be less than 400 kHz because of the delays added by the repeater)
  • ESD protection exceeds 5500 V HBM per JESD22-A114 and 1000 V CDM perJESD22-C101 
  • Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
  • Packages offered: SO8, TSSOP8 and HWSON8

 

PCA9517ADP Typical Application

PCA9517ADP Typical Application

Figure: PCA9517ADP Typical Application

 

PCA9517ADP Datasheet

You can download the datasheet from the link given below:

PCA9517ADP Datasheet

 

PCA9517ADP Specifications

Product Attribute Attribute Value
Manufacturer: NXP
Product Category: Interface - Signal Buffers, Repeaters
Product: Repeaters
Interface Type: I2C
Propagation Delay Time: 170 ns
Operating Temperature: -40°C ~ 85°C
Mounting Style: SMD/SMT
Package / Case: TSSOP-8
Brand: NXP Semiconductors
Operating Supply Current: 1 mA
Pd - Power Dissipation: 100 mW
Product Type: Signal Buffers, Repeaters
Series: PCA9517
Factory Pack Quantity: 2500
Subcategory: Interface ICs
Supply Voltage - Max: 5.5 V
Supply Voltage - Min: 2.7 V
Type: Voltage Level Translators
Part # Aliases: 9.35286E+11
Unit Weight: 0.004938 oz

 

PCA9517ADP Manufacturer

NXP Semiconductors N.V. is a Netherlands-domiciled American semiconductor manufacturer with headquarters in Eindhoven, Netherlands that focuses in the automotive industry. The company employs approximately 31,000 people in more than 35 countries, including 11,200 engineers in 33 countries.

 

Using Warning

Note: Please check their parameters and pin configuration before replacing them in your circuit.

 

PCA9517ADP FAQ

Why is I2C bus used?

A I2C bus is a bidirectional two-wired serial bus which is used to transport the data between integrated circuits. The I2C stands for “Inter Integrated Circuit”. The I2C bus supports 7-bit and 10-bit address space device and its operation differ with low voltages.

 

What is the difference between I2C and SMBus?

I2C allows several modes, Standard, Fast and High-Speed. Standard mode allows clock frequencies as high as 100kHz while Fast and High-Speed modes are faster. SMbus allows clock frequencies only as high as 100kHz, so it is not necessary to compare SMBus to any but I2C Standard mode.

 

How does an I2C bus work?

I2C is a serial communication protocol, so data is transferred bit by bit along a single wire (the SDA line). Like SPI, I2C is synchronous, so the output of bits is synchronized to the sampling of bits by a clock signal shared between the master and the slave. The clock signal is always controlled by the master.

 

PCB Symbol, Footprint & 3D Model

 

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