DESCRIPTION
The ￥ 4-bit dynamic RAM fabricated in Oki's silicon-gate CMOS technology. The MSM514400D/DL achieves high integration, high-speed operation, and low-power consumption because Oki manufactures the device in a quadruple-layer polysilicon/ single-layer metal CMOS process. The MSM514400D/DL is available a 26/20-pin plastic SOJ, 20pin plastic ZIP, or 26/20-pin plastic TSOP. The MSM514400DL (the low-power version) is specially designed for lower-power applications.
FEATURES
￥ 4-bit configuration Single 5 V power supply, ± 10% tolerance Input : TTL compatible, low input capacitance Output : TTL compatible, 3-state Refresh 1024 cycles/16 ms, cycles/128 ms (L-version) Fast page mode, read modify write capability CAS before RAS refresh, hidden refresh, RAS-only refresh capability Multi-bit test mode capability Package options: 26/20-pin 300 mil plastic SOJ (SOJ26/20-P-300-1.27) (Product 20-pin 400 mil plastic ZIP (ZIP20-P-400-1.27) (Product 26/20-pin 300 mil plastic TSOP (TSOPII26/20-P-300-1.27-K) (Product MSM514400D/DL-xxTS-K) xx indicates speed rank.
Family MSM514400D/DL-60 MSM514400D/DL-70 Access Time (Max.) tRAC tAA tCAC tOEA 20 ns Cycle Time Power Dissipation (Min.) Operating (Max.) Standby (Max.) mW 5.5 mW/ 1.1 mW (L-version)
1 26 VSS DQ4 23 CAS DQ3 3 VSS 5 2 CAS DQ2 2 RAS DQ2 7 RAS A0 9 RAS A3 12 VCC A3 12 VCC 13 VCC 13 26/20-Pin Plastic SOJ 20-Pin Plastic ZIP 26/20-Pin Plastic TSOP (K Type) Pin Name - A9 RAS CAS OE WE VCC VSS Function Address Input Row Address Strobe Column Address Strobe Data Input/Data Output Enable Write Enable Power Supply (5 V) Ground (0 V)
Column Address Buffers Internal Address Counter
