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Kynix Part #: KY32-DS1218
Manufacturer Part#:


Product Category: IC Chips
Manufacturer: Maxim Integrated
  datasheetDS1218 Datasheet
Package: DIP8
Quantity: 456 PCS
Lead Free Status / RoHS Status: Lead free / RoHS Compliant
Moisture Sensitivity Level(MSL): 3(168 Hours)
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Manufacturer: Maxim Integrated
Product Category: IC Chips
Series: -
Packaging: Tube
Package-Case: 8-DIP (0.300", 7.62mm)
Operating-Temperature: 0°C ~ 70°C
Voltage-Supply: 4.5 V ~ 5.5 V
Supplier-Device-Package: 8-PDIP
Controller-Type: Nonvolatile RAM
Features, Applications

Features, Applications


Converts CMOS RAMs into nonvolatile memories Unconditionally write protects when VCC is out of tolerance Automatically switches to battery when power-fail occurs Space saving 8-pin DIP Consumes less than nA of battery current Tests battery condition on power up Provides for redundant batteries Optional or 10% power-fail detection Low forward voltage drop on the VCC switch Optional 16-pin SOIC surface mount package Optional industrial temperature range to +85°C

- RAM Supply - + Battery 1 - Power Supply Tolerance - Ground - Chip Enable Input - Chip Enable Output - + Battery - + Supply - No Connect


The DS1210 Nonvolatile Controller Chip is a CMOS circuit which solves the application problem of converting CMOS RAM into nonvolatile memory. Incoming power is monitored for an out-of-tolerance condition. When such a condition is detected, chip enable is inhibited to accomplish write protection and the battery is switched on to supply the RAM with uninterrupted power. Special circuitry uses a lowleakage CMOS process which affords precise voltage detection at extremely low battery consumption. The 8-pin DIP package keeps PC board real estate requirements to a minimum. By combining the DS1210 Nonvolatile Controller Chip with a CMOS memory and batteries, nonvolatile RAM operation can be achieved.

The DS1210 nonvolatile controller performs five circuit functions required to battery back up a RAM. First, a switch is provided to direct power from the battery or the incoming supply (VCCI) depending on which is greater. This switch has a voltage drop of less than 0.3V. The second function which the nonvolatile controller provides is power-fail detection. The DS1210 constantly monitors the incoming supply. When the supply goes out of tolerance a precision comparator detects power-fail and inhibits chip enable ( CEO The third function of write protection is accomplished by holding the CEO output signal to within 0.2 volts of the VCCI or battery supply. If CE input is low at the time power-fail detection occurs, the CEO output is kept in its present state until CE is returned high. The delay of write protection until the current memory cycle is completed prevents the corruption of data. Power-fail detection occurs in the range of 4.75 volts to 4.5 volts with the tolerance Pin 3 grounded. If Pin 3 in connected to VCCO, then power-fail detection occurs in the range of 4.5 volts to 4.25 volts. During nominal supply conditions CEO will follow CE with a maximum propagation delay of 20ns. The fourth function the DS1210 performs is a battery status warning so that potential data loss is avoided. Each time that the circuit is powered up the battery voltage is checked with a precision comparator. If the battery voltage is less than 2.0 volts, the second memory cycle is inhibited. Battery status can, therefore, be determined by performing a read cycle after power-up to any location in memory, verifying that memory location content. A subsequent write cycle can then be executed to the same memory location altering the data. If the next read cycle fails to verify the written data, then the batteries are less than 2.0V and data is in danger of being corrupted. The fifth function of the nonvolatile controller provides for battery redundancy. In many applications, data integrity is paramount. In these applications it is often desirable to use two batteries to ensure reliability. The DS1210 controller provides an internal isolation switch which allows the connection of two batteries. During battery backup operation the battery with the highest voltage is selected for use. If one battery should fail, the other will take over the load. The switch to a redundant battery is transparent to circuit operation and to the user. A battery status warning will occur when the battery in use falls below 2.0 volts. A grounded VBAT2 pin will not activate a battery-fail warning. In applications where battery redundancy is not required, a single battery should be connected to the BAT1 pin. The BAT2 battery pin must be grounded. The nonvolatile controller contains circuitry to turn off the battery backup. This is to maintain the battery(s) at its highest capacity until the equipment is powered up and valid data is written to the SRAM. While in the freshness seal mode the CEO and VCCO will be forced to VOL. When the batteries are first attached to one or both of the VBAT pins, VCCO will not provide battery back-up until VCCI exceeds VCCTP, as set by the TOL pin, and then falls below VBAT. Figure 1 shows a typical application incorporating the in a microprocessor-based system. Section A shows the connections necessary to write protect the RAM when VCC is less than 4.75 volts and to back up the supply with batteries. Section B shows the use of the DS1210 to halt the processor when VCC is less than 4.75 volts and to delay its restart on power-up to prevent spurious writes. 


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