Features, Applications
The FM24C08U/09U devices are 8192 bits of CMOS non-volatile electrically erasable memory. These devices conform to all specifications in the Standard IIC 2-wire protocol. They are designed to minimize device pin count and simplify PC board layout requirements. The upper half (upper 4Kbit) of the memory of the FM24C09U can be write protected by connecting the WP pin to VCC. This section of memory then becomes unalterable unless WP is switched to VSS. This communications protocol uses CLOCK (SCL) and DATA I/O (SDA) lines to synchronously clock data between the master (for example a microprocessor) and the slave EEPROM device(s). The Standard IIC protocol allows for a maximum 16K of EEPROM memory which is supported by the Fairchild family 4K, 8K, and 16K devices, allowing the user to configure the memory as the application requires with any combination of EEPROMs. In order to implement higher EEPROM memory densities on the IIC bus, the Extended IIC protocol must be used. (Refer to the or FM24C65 datasheets for more information.) Fairchild EEPROMs are designed and tested for applications requiring high endurance, high reliability and low power consumption.
Features
I Extended operating voltage I 400 KHz clock frequency (F) I 200μA active current typical 10μA standby current typical 1μA standby current typical (L) 0.1μA standby current typical (LZ) I IIC compatible interface - Provides bi-directional data transfer protocol I Sixteen byte page write mode - Minimizes total write time per byte I Self timed write cycle Typical write cycle time 6ms I Hardware Write Protect for upper half (FM24C09U only) I Endurance: 1,000,000 data changes I Data retention greater than 40 years I Packages available: 8-pin DIP, 8-pin SO, and 8-pin TSSOP I Available in three temperature ranges - Commercial: +70°C - Extended (E): +85C - Automotive (V): to +125°C
VCC VSS WP H.V. GENERATION TIMING &CONTROL START STOP LOGIC CONTROL LOGIC SLAVE ADDRESS REGISTER & COMPARATOR E2PROM ARRAY
Dual-in-Line Package (N), SO Package (M8) and TSSOP Package (MT8)
A2 VSS SDA SCL NC VCC Device Address Input Ground Serial Data I/O Serial Clock Input No Connection Power Supply
A2 VSS SDA SCL WP VCC NC Device Address Input Ground Serial Data I/O Serial Clock input Write Protect Power Supply No Connection
NOTE: Pins designated as "NC" are typically unbonded pins. However some of them are bonded for special testing purposes. Hence if a signal is applied to these pins, care should be taken that the voltage applied on these pins does not exceed the VCC applied to the device. This will ensure proper operation.
Description
8-pin DIP 8-pin SOIC 8-pin TSSOP to 5.5V and <1μA Standby Current 100KHz 400KHz Ultralite CS100UL 8K with Write Protect CMOS Technology IIC Fairchild Non-Volatile Memory
