MSM56V16160F-10
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Manufacturer Part#:

MSM56V16160F-10

Product Category: IC Chips
Manufacturer: OKI
Description:
  datasheetMSM56V16160F-10 Datasheet
Package: TSOP
Quantity: 438 PCS
Lead Free Status / RoHS Status: Lead free / RoHS Compliant
Moisture Sensitivity Level(MSL): 3(168 Hours)
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Manufacturer: OKI
Product Category: IC Chips
Features, Applications

DESCRIPTION

The ’ 16 bit Synchronous dynamic RAM, fabricated in OKI's CMOS silicon-gate process technology. The device operates at 3.3V. The inputs and outputs are LVTTL compatible.


FEATURES

Silicon gate , quadruple polysilicon CMOS , 1-transistor memory cell ’ 16bit configuration 3.3V power supply ± 0.3V tolerance Input Output Refresh : LVTTL compatible : LVTTL compatible cycles/64 ms


Programmable data transfer mode - CAS Latency (1,2,3) - Burst Length (1,2,4,8,Full page) - Data scramble (sequential , interleave)


CBR auto-refresh, Self-refresh capability Package: 50-pin 400mil plastic TSOP (Type II) (TSOPII50-P-400-0.80-K) (Product xx : indicates speed rank.


Family MSM56V16160F-8 MSM56V16160F-10 Max. Frequency 125MHz 100MHz Access Time (Max.) 6ns 9ns

VCC DQ1 DQ2 VSSQ VSS DQ16 DQ15 VSSQ DQ14 DQ13 VCCQ DQ12 DQ11 VSSQ DQ10 DQ9 VCCQ NC UDQM CLK CKE A5 A4 VSS


Function System Clock Chip Select Clock Enable Address Bank Select Address Row Address Strobe Column Address Strobe Write Enable


Function Data Input/Output Mask Data Input/Output Power Supply (3.3V) Ground (0V) Data Output Power Supply (3.3V) Data Output Ground (0V) No Connection


The same power supply voltage must be provided to every VCC pin and VCCQ pin. The same GND voltage level must be provided to every VSS pin and VSSQ pin.


CLK CS Fetches all inputs at the "H" edge. Disables or enables device operation by asserting or deactivating all inputs except CLK, CKE, UDQM and LDQM. Masks system clock to deactivate the subsequent CLK operation. If CKE is deactivated, system clock will be masked so that the subsequent CLK operation is deactivated. CKE should be asserted at least one cycle prior to a new command. Row & column multiplexed. Row address - RA10 Column Address - CA7 Slects bank to be activated during row address latch time and selects bank for precharge and read/write during column address latch time. A11="L" : Bank A11="H" : Bank B Functionality depends on the combination. For details, see the function truth table. Masks the read data of two clocks later when UDQM and LDQM are set "H" at the "H" edge of the clock signal. Masks the write data of the same clock when UDQM and LDQM are set "H" at the "H" edge of the clock signal. UDQM controls upper byte and LDQM controls lower byte. Data inputs/outputs are multiplexed on the same pin.

Search Part number : "MSM56" Included word is 15
Part Number Manufacturer Package Quantity Description
MSM56V16160J-10T3-K OKI TSOP 18254
MSM56V16160F-8TK OKI TSOP 9060
MSM56V16160F-8TK7R1 OKI TSOP50 3050
MSM56V16160F-8TMCFG OKI TSOP 108
MSM56V16160F-8TSK OKI TSSOP 5265
MSM56V16160F-8TSKR1 OKI TSSOP 1330
MSM56V16160D-8TS-K OKI TSOP 1168
MSM56V16160FP-10TKFA OKI NA 975
MSM56V16160DH OKI TSOP 122
MSM56V16160J-10T3 OKI TSOP 2860
MSM56V16160F-10LSFS1 OKI BGA 40560
MSM56V16160J-10T3-QM OKI TSSOPPB 15787
MSM56V16160F-10T3-K OKI TSOP 4878
MSM56V16160J-7T3-K OKI TSOP 2660
MSM56V16160F-10TSK-7 OKI TSSOP 78
MSM56V16160F-10 RELATED PRODUCT PICTURE
left
  • MSM56V16160J-10T3-K
  • MSM56V16160F-8TK
  • MSM56V16160F-8TK7R1
  • MSM56V16160F-8TMCFG
  • MSM56V16160F-8TSK
  • MSM56V16160F-8TSKR1
  • MSM56V16160D-8TS-K
  • MSM56V16160FP-10TKFA
  • MSM56V16160DH
  • MSM56V16160J-10T3
  • MSM56V16160F-10LSFS1
  • MSM56V16160J-10T3-QM
  • MSM56V16160F-10T3-K
  • MSM56V16160J-7T3-K
  • MSM56V16160F-10TSK-7
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