DS3112
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Manufacturer Part#:

DS3112

Product Category: IC Chips
Manufacturer: Maxim Integrated
Description: IC MUX TEMPE T3/E3 256-BGA
  datasheetDS3112 Datasheet
Package: na
Quantity: 438 PCS
Lead Free Status / RoHS Status: Lead free / RoHS Compliant
Moisture Sensitivity Level(MSL): 3(168 Hours)
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Manufacturer: Maxim Integrated
Product Category: IC Chips
Series: -
Packaging: Tray
Package-Case: 256-BGA
Operating-Temperature: 0°C ~ 70°C
Mounting-Type: Surface Mount
Function: *
Interface: Parallel/Serial
Voltage-Supply: 3.135 V ~ 3.465 V
Supplier-Device-Package: 256-PBGA (27x27)
Number-of-Circuits:
Power-Watts: *
Current-Supply: 150mA
Features, Applications

Features, Applications


FEATURES

§ Operates or E13 multiplexer or as standalone or E3 framer Flexible multiplexer can be programmed for multiple configurations including: - M13 multiplexing (28 T1 lines into a T3 data stream) - E13 multiplexing (16 E1 lines into an E3 data stream) to T3 multiplexing (21 E1 lines into a T3 data stream) Two T1/E1 drop and insert ports Supports T3 C-bit parity mode B3ZS/HDB3 encoder and decoder Generates and detects T3/E3 alarms Generates and detects T2/E2 alarms Integrated HDLC controller handles LAPD messages without host intervention Integrated FEAC controller Integrated BERT supports performance monitoring T3/E3 and T1/E1 diagnostic (Tx to Rx), line (Rx to Tx), and payload loopback supported Nonmultiplexed or multiplexed 16-bit control port (with optional 8-bit mode) 3.3V supply with 5V tolerant I/O Available 256-pin 1.27mm pitch BGA package IEEE 1149.1 JTAG support


APPLICATIONS

Wide Area Network Access Equipment PBXs Access Concentrators Digital Cross-Connect Systems Switches Routers Optical Multiplexers ADMs Test Equipment


Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device may be simultaneously available through various sales channels. For information about device errata, click here: http://www.maxim-ic.com/errata.


INTRODUCTION................................................................................................................................4 2. SIGNAL DESCRIPTION.................................................................................................................. 11 2.1 OVERVIEW/SIGNAL PIN LIST...................................................................................................11 2.2 CPU BUS SIGNAL 2.3 T3/E3 RECEIVE FRAMER SIGNAL 2.4 T3/E3 TRANSMIT FORMATTER SIGNAL DESCRIPTION......................................................21 2.5 LOW SPEED OR E1) RECEIVE PORT SIGNAL DESCRIPTION.......................................23 2.6 LOW SPEED OR E1) TRANSMIT PORT SIGNAL DESCRIPTION...................................24 2.7 HIGH SPEED OR E3) RECEIVE PORT SIGNAL DESCRIPTION......................................26 2.8 HIGH SPEED OR E3) TRANSMIT PORT SIGNAL DESCRIPTION..................................26 2.9 JTAG SIGNAL DESCRIPTION.....................................................................................................27 2.10 SUPPLY, TEST, RESET, AND MODE SIGNAL DESCRIPTION............................................27 3. MEMORY MAP.................................................................................................................................29 4. MASTER DEVICE CONFIGURATION AND STATUS/INTERRUPT......................................31 4.1 MASTER RESET AND ID REGISTER DESCRIPTION..............................................................31 4.2 MASTER CONFIGURATION REGISTERS DESCRIPTION......................................................32 4.3 MASTER STATUS AND INTERRUPT REGISTER DESCRIPTION.........................................37 4.4 TEST REGISTER FRAMER.................................................................................................................................47 5.1 GENERAL 5.2 T3/E3 FRAMER CONTROL REGISTER 5.3 T3/E3 FRAMER STATUS AND INTERRUPT REGISTER 5.4 T3/E3 PERFORMANCE ERROR 6. M13/E13/G.747 MULTIPLEXER AND FRAMER..................................................64 6.1 GENERAL 6.2 T2/E2/G.747 FRAMER CONTROL REGISTER 6.3 T2/E2/G.747 FRAMER STATUS AND INTERRUPT REGISTER 6.4 T1/E1 AIS GENERATION CONTROL REGISTER 7. T1/E1 LOOPBACK AND DROP AND INSERT FUNCTIONALITY.........................................73 7.1 GENERAL 7.2 T1/E1 LOOPBACK CONTROL REGISTER 7.3 T1 LINE LOOPBACK COMMAND STATUS REGISTER 7.4 T1/E1 DROP AND INSERT CONTROL REGISTER BERT...................................................................................................................................................81 8.1 GENERAL DESCRIPTION...........................................................................................................81 8.2 BERT REGISTER DESCRIPTION................................................................................................81


9. HDLC CONTROLLER.....................................................................................................................90 9.1 GENERAL DESCRIPTION...........................................................................................................90 9.2 HDLC CONTROL AND FIFO REGISTER DESCRIPTION........................................................91 9.3 HDLC STATUS AND INTERRUPT REGISTER DESCRIPTION..............................................95 10. FEAC CONTROLLER..................................................................................................................100 10.1 GENERAL DESCRIPTION.......................................................................................................100 10.2 FEAC CONTROL REGISTER DESCRIPTION........................................................................100 10.3 FEAC STATUS REGISTER JTAG................................................................................................................................................103 11.1 JTAG DESCRIPTION................................................................................................................103 11.2 TAP CONTROLLER STATE MACHINE DESCRIPTION......................................................104 11.3 INSTRUCTION REGISTER AND INSTRUCTIONS...............................................................106 11.4 TEST REGISTERS.....................................................................................................................107 12. ELECTRICAL CHARACTERISTICS........................................................................................113 13. MECHANICAL DIMENSIONS...................................................................................................124 14. APPLICATIONS AND STANDARDS OVERVIEW.................................................................125 14.1 APPLICATION G.747 BASICS............................................................................................................................134  



Search Part number : "DS311" Included word is 2
Part Number Manufacturer Package Quantity Description
DS3112+ Maxim Integrated BGA256 107 IC MUX TEMPE T3/E3 256-BGA
DS3112N+ Maxim Integrated 256-BGA 99 IC MUX TEMPE T3/E3 256-BGA
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