CS5330A-KSZR
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CS5330A-KSZR

Product Category: IC Chips
Manufacturer: CIRRUS
Description:
  datasheetCS5330A-KSZR Datasheet
Package: SOP8
Quantity: 29689 PCS
Lead Free Status / RoHS Status: Lead free / RoHS Compliant
Moisture Sensitivity Level(MSL): 3(168 Hours)
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Manufacturer: CIRRUS
Product Category: IC Chips
Features, Applications

Features

Single +5 V Power Supply 18-Bit Resolution 94 dB Dynamic Range Linear Phase Digital Anti-Alias Filtering


The is a complete stereo analog-to-digital converter that performs antialias filtering, sampling and analog-to-digital conversion generating 18-bit values for both left and right inputs in serial form. The output sample rate can be infinitely adjusted between 2 kHz and 50 kHz. The CS5330A/31A operates from a single +5 V supply and requires only 150 mW for normal operation, making it ideal for battery-powered applications. The ADC uses delta-sigma modulation with 128X oversampling, followed by digital filtering and decimation, which removes the need for an external anti-alias filter. The linear-phase digital filter has a passband to 21.7 kHz, 0.05 dB passband ripple and >80 dB stopband rejection. The device also contains a high-pass filter to remove DC offsets. The device is available an 8-pin SOIC package in both Commercial +70° C) and Automotive grades to +85° C). Please refer to "Ordering Information" on page 16 for complete details.


0.05 dB Passband Ripple 80 dB Stopband Rejection Power-Down Mode for Portable Applications Delta-Sigma A/D Converters Digital Anti-Alias Filtering S/H Circuitry and Voltage Reference


Serial Output Interface 8 LP Filter S/H DAC Digital Decimation Filter Comparator DAC 7 VA+ High Pass Filter Digital Decimation Filter Comparator


1. PIN DESCRIPTIONS................................................................................................................ 3 2. CHARACTERISTICS AND SPECIFICATIONS........................................................................ 4 SPECIFIED OPERATING CONDITIONS................................................................................. 4 ABSOLUTE MAXIMUM RATINGS........................................................................................... 4 ANALOG INPUT CHARACTERISTICS.................................................................................... 5 DIGITAL CHARACTERISTICS................................................................................................. 6 DIGITAL FILTER CHARACTERISTICS................................................................................... 6 SWITCHING CHARACTERISTICS.......................................................................................... 7 3. GENERAL DESCRIPTION....................................................................................................... 9 3.1 System Design.................................................................................................................. 9 3.1.1 Master Clock......................................................................................................... 9 3.1.2 Serial Data Interface............................................................................................ 9 3.1.3 Master Mode......................................................................................................... 9 3.1.4 Slave Mode......................................................................................................... 10 3.1.7 Analog Connections............................................................................................ 11 3.1.8 High-Pass Filter.................................................................................................. 11 3.1.9 Initialization and Power-Down............................................................................. 11 3.1.10 Grounding and Power Supply Decoupling........................................................ 12 3.1.11 Digital Filter....................................................................................................... 13 4. PARAMETER DEFINITIONS.................................................................................................. 14 5. REFERENCES........................................................................................................................ 15 6. PACKAGE DESCRIPTIONS.................................................................................................. 15 7. ORDERING INFORMATION................................................................................................. 16 8. REVISION HISTORY.............................................................................................................. 16


Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Typical Connection Diagram......................................................................................... 8 Data Output Timing-CS5330A.................................................................................... 10 Data Output Timing - CS5331A (I2S Compatible)....................................................... 10 CS5330A/31A Initialization and Power-Down Sequence............................................ 12 CS5330A/31A Digital Filter Stopband Rejection......................................................... 13 CS5330A/31A Digital Filter Transition Band............................................................... 13 CS5330A/31A Digital Filter Passband Ripple............................................................. 13 CS5330A/31A Digital Filter Transition Band............................................................... 13


SERIAL DATA OUTPUT SERIAL DATA CLOCK LEFT/RIGHT CLOCK MASTER CLOCK SDATA SCLK LRCK MCLK

LEFT ANALOG INPUT ANALOG POWER ANALOG GROUND RIGHT ANALOG INPUT

Pin Description Audio Serial Data Output (Output) - Two's complement MSB-first serial data is output on this pin. 47 k resistor on this pin will place the CS5330A/31A into Master Mode. Serial Data Clock (Input/Output) - SCLK is an input clock at any frequency from to 64x the output word rate. SCLK can also be an output clock if in the Master Mode. Data is clocked out on the falling edge of SCLK. Left/Right Clock (Input/Output) - LRCK selects the left or right channel for output on SDATA. The LRCK frequency must be at the output sample rate. LRCK is an output clock if in Master Mode. Although the outputs of each channel are transmitted at different times, the two words in an LRCK cycle represent simultaneously sampled analog inputs. Master Clock Input (Input) - Source for the delta-sigma modulator sampling and digital filter clock. Sample rates and digital filter characteristics scale to the MCLK frequency. Analog Right Channel Input (Input) - Analog input for the right channel. Typically 4 Vpp for a full-scale input signal. Analog Ground (Input) - Analog ground reference. Positive Analog Power (Input) - Positive analog supply (Nominally +5 V). Analog Left Channel Input (Input) - Analog input for the left channel. Typically 4 Vpp for a fullscale input signal.

Search Part number : "CS533" Included word is 15
Part Number Manufacturer Package Quantity Description
CS5333KZ CRYSATL SOP 17830
CS5331 B3 CORTINA BGA 520
CS5333-KZ CIRRUS SOP16 3046
CS5331ABS CIRRUS SOP8 3942
CS5333KZ TSSOP16 TSSOP16 1023
CS5331-ABS CRYSTAL SOP/20 761
CS5333-KZZR CIRRUS TSSOP-16 2618
CS5331A-BS CRYSTAL SOP8 44538
CS5334KS CRYSTAL SSOP20 89
CS5331A-BSR CIRRUS SOP8 6060
CS5335-KS CRYSTAL SSOP 1161
CS5331A-BSZR CIRRUS SOP8 1060
CS5335KSEP CRYSTAL SSOP20 917
CS5330ABS CRYSTAL SOP-8 19946
CS5331A-DSZR CRYSTAL SOP8 40994
CS5330A-KSZR RELATED PRODUCT PICTURE
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  • CS5333KZ
  • CS5331 B3
  • CS5333-KZ
  • CS5331ABS
  • CS5333KZ TSSOP16
  • CS5331-ABS
  • CS5333-KZZR
  • CS5331A-BS
  • CS5334KS
  • CS5331A-BSR
  • CS5335-KS
  • CS5331A-BSZR
  • CS5335KSEP
  • CS5330ABS
  • CS5331A-DSZR
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