COP8782CN
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COP8782CN

Product Category: IC Chips
Manufacturer: NS
Description:
  datasheetCOP8782CN Datasheet
Package: DIP
Quantity: 3232 PCS
Lead Free Status / RoHS Status: Lead free / RoHS Compliant
Moisture Sensitivity Level(MSL): 3(168 Hours)
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Manufacturer: NS
Product Category: IC Chips
Features, Applications

The COP8780C COP8781C and COP8782C are members of the COPSTM 8-bit microcontroller family They are fully static microcontrollers fabricated using double-metal double poly silicon gate microCMOS EPROM technology These devices are available as UV erasable or One Time Programmable (OTP) These low cost microcontrollers are complete microcomputers containing all system timing interrupt logic EPROM RAM and I O necessary to implement dedicated control functions in a variety of applications Features include an 8-bit memory mapped architecture MICROWIRE PLUSTM serial a 16-bit timer counter with associated 16-bit autoreload capture register and a multisourced interrupt Each I O pin has software selectable options to adapt the device to the specific application These devices operate over a voltage range 0V An efficient regular instruction set operating 1 ms instruction cycle rate provides optimal throughput The COP8780C COP8781C and COP8782C can be configured to EMULATE the COP880C COP840C and COP820C microcontrollers


Schmitt trigger inputs on Port G MICROWIRE PLUS serial I O Packages 44 PLCC OTP Emulates I O pins 40 DIP OTP Emulates I O pins 28 DIP OTP Emulates I O pins 20 DIP OTP Emulates I O pins 20 SO OTP 44 LDCC UV Erasable 40 CERDIP 28 CERDIP 20 CERDIP UV Erasable


1 ms instruction cycle time Three multi-source interrupts servicing External interrupt with selectable edge Timer interrupt Software interrupt Versatile and easy to use instruction set 8-bit Stack Pointer (SP) stack in RAM Two 8-bit Register Indirect Data Memory Pointers (B and X)


16-bit multi-function timer supporting PWM mode External event counter mode Input capture mode Crystal RC or External Oscillator user configurable 4 kbytes on-chip OTP EPROM with security feature or 64 bytes of on-chip RAM user configurable


Low current drain (typically k 1 mA) Extra-low current static HALT mode Single supply operation 6 0V Temperature range 85 C


Memory-mapped I O Software selectable I O options (TRI-STATE Pull Weak Pull-Up Input High Impedance input)


Emulation device for the COP880C COP840C and COP820C Real-time emulation and full program debug offered by MetaLink development system


TRI-STATE is a registered trademark of National Semiconductor Corporation COPSTM microcontrollers MICROWIRETM MICROWIRE PLUSTM and WATCHDOGTM are trademarks of National Semiconductor Corporation iceMASTERTM is a trademark of MetaLink Corporation C1996 National Semiconductor Corporation DD11299 RRD-B30M96 Printed S A


If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Supply Voltage (VCC) Programming Voltage VPP (RESET pin) and ME (pin G6) Voltage at any Pin 13 4V Total Current into VCC Pin (Source) Total Current out of GND Pin (Sink) 150 C Storage Temperature Range Note Absolute maximum ratings indicate limits beyond which damage to the device may occur DC and AC electrical specifications are not ensured when operating the device at absolute maximum ratings


Parameter Operating Voltage Power Supply Ripple (Note 1) Supply Current CKI e 10 MHz (Note 2) HALT Current (Note 3) Input Levels RESET CKI Logic High Logic Low All Other Inputs Logic High Logic Low Hi-Z Input Leakage Input Pullup Current G Port Input Hysteresis Output Current Levels D Outputs Source Sink All Others Source (Weak Pull-Up) Source (Push-Pull Mode) Sink (Push-Pull Mode) TRI-STATE Leakage Allowable Sink Source Current per Pin D Outputs (Sink) All Others Maximum Input Current (Notes 4 6) without Latchup (Room Temp) RAM Retention Voltage Vr (Note 5) Input Capacitance Load Capacitance on D2 (Note 6) (Note 6) Room Temp Condition Peak to Peak


Note 1 Rate of voltage change must be less than 5V ms Note 2 Supply current is measured after running 2000 cycles with a square wave CKI input CKO open inputs at rails and outputs open Note 3 The HALT mode will stop CKI from oscillating in the RC and the crystal configurations Halt test conditions All Inputs tied to VCC L C and G port I O's configured as outputs and programmed low D outputs programmed low the window for UV erasable packages is completely covered with an opaque cover to prevent light from falling onto the die during HALT mode test Parameter refers to HALT mode entered via setting bit 7 of the G Port data register Note 4 Pins G6 and RESET are designed with a high voltage input network for factory testing These pins allow input voltages greater than VCC and the pins will have sink current to VCC when biased at voltages greater than VCC (the pins do not have source current when biased at a voltage below VCC) The effective resistance to VCC is 750X (typ) These two pins will not latch up The voltage at the pins must be limited to less than 14V Note 5 To maintain RAM integrity the voltage must not be dropped or raised instantaneously Note 6 Parameter characterized but not tested

Search Part number : "COP87" Included word is 15
Part Number Manufacturer Package Quantity Description
COP8782CWM NS SOP-7.220 116
COP87L88RGV-XE NS PLCC44 544
COP8788CN NS DIP 660
COP8788EGN-X NS DIP40 586
COP8788EGV NS PLCC 2276
COP878CV SN PLCC 86
COP87L40CJM-1N NS SMD28 440
COP87L42CJN-1N NS DIP20 832
COP87L42CJN-3N NSC DIP20 78
COP87L84EGM-XE NS 114
COP87L84EKM-XE NS SOP-28 113
COP8780CN NS DIP40 4237
COP87L88CFN-XE NSC DIP20 78
COP87L88CLN-XE NS DIP 2375
COP8780CV NS PLCC44 108
COP8782CN RELATED PRODUCT PICTURE
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  • COP8782CWM
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  • COP8788CN
  • COP8788EGN-X
  • COP8788EGV
  • COP878CV
  • COP87L40CJM-1N
  • COP87L42CJN-1N
  • COP87L42CJN-3N
  • COP87L84EGM-XE
  • COP87L84EKM-XE
  • COP8780CN
  • COP87L88CFN-XE
  • COP87L88CLN-XE
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